EP2965362A1 - Monolithic silicon wafer having alternating n-doped areas and p-doped areas - Google Patents
Monolithic silicon wafer having alternating n-doped areas and p-doped areasInfo
- Publication number
- EP2965362A1 EP2965362A1 EP14713263.3A EP14713263A EP2965362A1 EP 2965362 A1 EP2965362 A1 EP 2965362A1 EP 14713263 A EP14713263 A EP 14713263A EP 2965362 A1 EP2965362 A1 EP 2965362A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- zones
- wafer
- doped
- type
- areas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
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- 239000010703 silicon Substances 0.000 title claims abstract description 40
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 39
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 30
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
- H01L31/03529—Shape of the potential jump barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/047—PV cell arrays including PV cells having multiple vertical junctions or multiple V-groove junctions formed in a semiconductor substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0687—Multiple junction or tandem solar cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to a new monolithic silicon wafer having, in a vertical sectional plane, an alternation of n-doped zones and p-doped zones, and to different process variants for its preparation.
- Such a wafer is particularly advantageous in the context of the development of photovoltaic cells and modules.
- PV photovoltaic modules
- PV modules of reasonable size of the order of the m 2 , the size standard for the wafers (156 x 156 mm) makes the open circuit voltages (V oc in English terminology) of the PV modules are limited. a few tens of volts.
- a first option could be to use materials other than crystalline silicon (Si), in particular semiconductors with band gap amplitudes exceeding 1, 1 eV (electronvolt).
- silicon such as an amorphous Si type material on crystalline Si, resulting from the so-called heterojunction technology, or even CdTe type materials (cadmium telluride).
- CdTe type materials cadmium telluride
- Pozner et al. [1] have modeled the serialization of cells with vertical p / n junction planes, unlike the configuration of conventional wafers where the junction plane is horizontal.
- the advantage of this approach is to be able to consider a collective type of treatment, monolithic substrate, for the realization of cells.
- many technical questions remain open as to the practical realization of such a structure, the cost of which, moreover, may be very high.
- Gatos et al. [2] propose to take advantage of the heterogeneous incorporation of oxygen during the growth of a silicon crystal by Czochralski directed solidification. The origin of these fluctuations in oxygen concentration is poorly known, but this principle is used by Gatos et al. to obtain structures of alternating conductivity n / p by thermal annealing.
- thermal anneals at temperatures of 400-500 ° C, allow the formation of thermal donors (DT ), small agglomerates of oxygen (typically formed from the combination of 3 to 20 oxygen atoms) that behave as electron donors in silicon.
- thermal donors typically formed from the combination of 3 to 20 oxygen atoms
- these thermal donors can cause compensation of the material and its change in conductivity.
- an annealing for example at a temperature of 450 ° C for 50 hours of a wafer cut into a Czochralski ingot parallel to the direction of solidification, thus provides structures p / n.
- the size of the n and p zones typically of the order of one hundred microns [2] can not be controlled. It is therefore not possible to define the output voltage of such a structure, which represents a major obstacle for the integration of these structures in a complete solar system. Moreover, in a configuration where the sub-cells are connected in series to obtain high voltages, it is then impossible to balance the currents, which is a very strong limitation with respect to the energy conversion efficiency of the 'together.
- the present invention aims to provide a new monolithic silicon wafer to overcome the aforementioned drawbacks, as well as methods for accessing such a wafer.
- the present invention relates, according to a first of its aspects, to a monolithic silicon wafer, having, in at least one vertical section plane, an alternation of n-doped zones and of p-doped zones, each of the zones extending throughout the thickness of the wafer, characterized in that:
- said p-doped and p-doped zones each have, in the plane of section, a width (Li, L 2 ) of at least 1 mm; the n-doped zones have a concentration of thermal donors based on interstitial oxygen (DT) distinct from that of the p-doped zones; and
- n-doped zones and said p-doped zones are separated from one another by zones of electrical insulation.
- the wafer is characterized when observed in its horizontal position.
- the wafer is defined as having an alternation of n-doped zones and p-doped zones extending over the entire thickness of the wafer, in a vertical cutting plane of the wafer positioned horizontally.
- thermal donors or more simply under the abbreviation "DT", the thermal donors based on interstitial oxygen.
- electrical insulation zone is meant a zone having a high electrical resistivity, in particular greater than or equal to 2 k ⁇ cm and advantageously greater than or equal to 10 k ⁇ cm.
- the electrical isolation zone may be a so-called intrinsic zone, namely a zone of the wafer in which the electron-type charge carrier and hole-type charge carrier concentrations are similar.
- the present invention proposes methods making it possible to easily access such a wafer from a p-doped silicon wafer.
- the present invention thus relates to a method of manufacturing a wafer as defined above, comprising at least the steps consisting in:
- step (ii) subjecting said wafer of step (i) to an overall heat treatment, conducive to activation of interstitial oxygen-based heat donors and conversion of the entire wafer to n-type; (iii) subjecting areas of the wafer obtained at the end of step (ii), dedicated to forming the p-doped zones, to a localized heat treatment that is favorable for the annihilation of the thermal donors and to the conversion of said zones of type n in type p; and
- the present invention relates to a method of manufacturing a wafer as defined above, comprising at least the steps consisting in:
- step (c) subjecting said wafer of step (b) to an overall heat treatment conducive to the activation of the interstitial oxygen-based thermal donors at the hydrogen-doped regions, and to the conversion of said zones (1 1) p-type type n and said zones (13) in electrical isolation zones, to obtain the expected wafer.
- these methods make it possible, by controlling the local concentrations of thermal donors, to control, with precision, the size of the n and p zones formed, as well as the conductivity and the size of the electrical insulation zones.
- the present invention relates to a photovoltaic device, in particular a photovoltaic cell, comprising a silicon wafer as defined above.
- the silicon wafers according to the invention divided into a plurality of sub-cells of controlled sizes, advantageously make it possible to produce PV modules having an increased open circuit voltage, while maintaining a reasonable standard size of the order of 2 m 2. .
- Other characteristics, advantages and modes of application of the wafers according to the invention and processes for its preparation will become more apparent on reading the detailed description which will follow, examples of embodiments of the invention and the examination annexed drawings, in which:
- FIG. 1 shows, schematically, in a vertical sectional plane, the structure of a silicon wafer according to the invention
- FIG. 2 shows schematically the various steps of the method of manufacturing a wafer according to the invention, according to a first embodiment
- FIG. 3 shows schematically the various steps of the method of manufacturing a wafer according to the invention, according to a second embodiment
- FIG. 4 represents, in a view from above, for the method of example 1, the zones (12) irradiated with the laser of the wafer during step (iii) for the formation of the p-doped zones (FIG. 4a) and during step (iv) for the formation of the electrical insulation zones (FIG. 4b);
- FIG. 5 represents, in a view from above, for the method of example 2, the masking in step (b) of the zones (12) of the wafer during the first ion implantation step (FIG. 5a) and the masking the zones (12) and (13) during the second ion implantation step (FIG. 5b); and the distribution of the zones formed at the end of step (c) (FIG. 5c).
- a wafer according to the invention may have a thickness (e) ranging from 100 to 500 ⁇ , in particular from 150 to 300 ⁇ .
- L may have a total length (L) ranging from 10 to 30 cm, in particular from 15 to 20 cm.
- a wafer of the invention comprises an interstitial oxygen concentration of between 10 17 and 2.10 18 cm “3, in particular between 5.1017 and 1,5.1018 cm" 3. This concentration takes into account the content in interstitial oxygen, which are not in the form of agglomerates (thermal donors) in the silicon wafer.
- the interstitial oxygen concentration may for example be obtained by Fourier Transformed InfraRed Spectroscopy (FTIR) analysis.
- FTIR Fourier Transformed InfraRed Spectroscopy
- a silicon wafer according to the invention has an alternation of n-doped zones (1 10) and p-doped zones (120), separated from each other by electrical isolation zones (130).
- the doped regions n (110) of the wafer may be, independently of each other, an electron type of charge carrier density between 10 14 and 2.10 16 cm “3, in particular from 5.10 14 to 5.10 15 cm “3 .
- the concentration of electron-type charge carriers can be determined, for example, by measuring the Hall effect (which makes it possible to determine the type of doping).
- They may have, independently of each other, a width (Li) in the cutting plane ranging from 1 mm to 10 cm, in particular from 5 mm to 5 cm.
- the p-doped areas (120) of the wafer may have, independently of one another, a hole-type charge carrier density ranging from 10 14 to 2.10 16 cm- 3 , in particular from 5.10 14 to 5.10 15 cm- 3. .
- the concentration of charge carriers of the hole type can be deduced from a measurement of the resistivity, for example by the Hall effect measurement method.
- They may have, independently of each other, a width (L 2 ) in the section plane ranging from 1 mm to 10 cm, in particular from 5 mm to 5 cm.
- the expression "independently of one another” means that the width may differ from one n-doped zone to another n-doped zone, or from one p-doped zone to another p-doped zone.
- these widths (Li, L 2 ) can be adjusted according to the knowledge of those skilled in the art.
- the n-type materials are generally less sensitive to metallic impurities than the p-type materials, the photogenerated currents are generally higher in n-doped zones than in p-doped zones.
- the widths (Li, L 2 ) of the p-doped and n-doped zones can be adapted during the preparation of the wafer, in particular with a view to optimally matching these currents in the final silicon wafer.
- n-doped zones (110) of the wafer according to the invention have a concentration of oxygen-based thermal donors (DT) distinct from that of the p-doped zones (120).
- control of the local DT concentration provides access to the alternating electrical conductivity n and p of the wafer.
- an overall annealing of a wafer according to the invention for example at a temperature greater than or equal to 600 ° C, in particular between 600 and 700 ° C, allows dissolution (also called “annihilation”). ) of all the DTs and leads to finding a platelet of homogeneous conductivity.
- This characteristic can advantageously be used to distinguish a wafer according to the invention from wafers which would not be obtained by a method according to the invention.
- the electrical isolation zones (130), separating an n-doped zone (110) and a p-doped zone (120), preferably have a resistivity greater than or equal to 2 k ⁇ cm, in particular greater than or equal to 10 k ⁇ . cm.
- the resistivity can be measured by any conventional method, such as, for example, by the so-called 4-point measurement method, or by measuring the effect of eddy currents induced by an alternating magnetic field.
- each of the electrical isolation zones (130) advantageously has a width (L 3 ) in the section plane ranging from 50 ⁇ to 5 mm, in particular from 200 ⁇ to 1 mm.
- a zone of electrical insulation too long in the final silicon wafer is likely to lead to an active loss and therefore a drop in energy efficiency at the module that will be formed from these wafers.
- a zone of electrical insulation that is too short may be insufficient to ensure good isolation between the sub-cells (n-doped zones and p-doped zones), which can also lead to a drop in efficiency at the module level. resulting.
- the zones n and p can be arranged so as to form a two-dimensional pattern.
- the arrangement of the alternating zones n and p may form a checker pattern.
- the side of a square (zones n and p) of the checkerboard may be between 1 mm and 10 cm, preferably between 5 mm and 5 cm.
- the electrical insulation zones (130) then form the perimeter of each of the zones n and the zones p. This configuration is for example implemented in the examples which follow.
- the invention is not limited to such an arrangement; different configurations, other than a checkerboard pattern, may be envisaged within the context of the present invention (for example rectangular, polygonal patterns, etc.).
- a wafer (10) according to the invention can be produced, according to various alternative embodiments, from a wafer (1) made of p-doped silicon, comprising a concentration of charge carriers of the hole type (p 0 ) between 10 14 and 2.10 16 cm -3 and an interstitial oxygen concentration [Oi]
- the p-doped silicon wafer (1) has a concentration of hole-type charge carriers (p 0 ) ranging from 5.10 14 to 10 16 , in particular from 5.10 14 to 5.10 15 cm -3 .
- the p-doped silicon wafer (1) has an interstitial oxygen concentration [Oi] ranging from 5 ⁇ 10 17 to 1.5 ⁇ 10 18 cm -3 .
- the relative variation of the interstitial oxygen concentration in the silicon wafer (1) is less than 40%, in particular less than
- Such a p-doped silicon wafer (1) may for example be obtained by cutting a shaped silicon ingot, according to techniques known to those skilled in the art, by directed solidification of a molten bath, in particular by the technique gradient cooling (also known as "gradient freeze” in English) or by liquid or gaseous epitaxy.
- the methods according to the invention implement one or more steps of activation or annihilation of DTs.
- activation is meant the formation of these thermal donors based on interstitial oxygen. They are generally formed during annealing at a temperature of 300-500 ° C. Such annealing allows the association of oxygen atoms to form a species with more complex stoichiometry that has an electron donor behavior in silicon.
- the thermal donors thus formed are stable at room temperature, but annealing at a temperature above 600 ° C. allows their dissociation, which cancels out the effects of the thermal activation previously carried out. This is called “annihilation” or “dissolution” of DTs.
- Activation / annihilation treatments used according to the invention can be operated under air or under an inert atmosphere. 1st embodiment
- a wafer (10) according to the invention can be obtained via a method comprising at least the following steps:
- step (ii) subjecting said wafer of step (i) to an overall heat treatment, conducive to activation of interstitial oxygen-based heat donors and conversion of the entire wafer to n-type;
- the overall heat treatment in step (ii) may for example be carried out by thermal annealing of the entire wafer, for example in an oven.
- the annealing may for example be carried out at a temperature greater than or equal to 300 ° C and strictly less than 600 ° C, in particular ranging from 400 to 500 ° C and more particularly about 450 ° C.
- the duration of the thermal anneal may be greater than or equal to 30 minutes, in particular be between 1 hour and 20 hours, in particular be approximately 4 hours.
- the wafer () obtained, in n-doped silicon may have a content of electron-type charge carriers (n 0 ) ranging from 10 14 to 2.10 16 , in particular from 5.10 to 14 to 5.10 15 cm “3 .
- step (iii) a person skilled in the art is able to adjust the conditions of the localized heat treatment in step (iii) suitable for the annihilation of the thermal donors in the zones (12) of the wafer dedicated to forming p-doped zones and the reconversion of these n-type zones into p-type.
- localized is meant that the heat treatment affects only the determined areas (12) of the wafer, unlike a global heat treatment that affects the entire wafer.
- these areas (12) of the wafer subjected to heat treatment, for example laser irradiation, are determined with respect to the architecture of the desired final wafer.
- the areas (12) of the wafer which are desired to become p-type can be brought to a temperature greater than or equal to 600 ° C, in particular ranging from 600 to 1000 ° C, in particular for at least 10 seconds. It is up to those skilled in the art to use known means for channeling heat fluxes and limiting the lateral propagation of heat to keep n / p zones well defined.
- the localized heat treatment can be advantageously operated by exposing the zones (12) to be treated to a laser beam, preferably a broad-spot laser if it is desired to irradiate large areas, for example with a spot size of 1. order of the cm.
- the laser can for example operate at a wavelength greater than or equal to 500 nm, in particular ranging from 500 nm to 1100 nm, which allows a propagation of heat deep in the material.
- step (iv) The adjustment of the heat treatment conditions in step (iv) to transform the portions (13) of each of the n-type zones contiguous to a p-type zone into electrical insulation zones is also within the competence of the skilled person.
- Step (iv) can be advantageously carried out by exposure of each portion
- this additional laser treatment must be more localized than that implemented in step (iii) to achieve the width (L 3 ) of the desired electrical insulation zones, and thus achieve a good compromise between quality insulation and limitation of the size of the compensated zone, inactive from the photovoltaic point of view.
- the irradiation time and laser power parameters can be adjusted to annihilate a fraction of the thermal donors in the treated areas (13) and convert them into areas of high resistivity electrical insulation.
- the wafer may be subjected, subsequent to step (iv), to a surface treatment, in particular by etching, to remove any hardened surface regions resulting from the laser treatment.
- etching can be carried out using a solution formed of a mixture HN0 3 , HF and CH 3 COOH, also known as CP133. 2 ° embodiment
- a wafer (10) according to the invention can be obtained via a method comprising at least the following steps:
- step (c) subjecting said wafer of step (b) to an overall heat treatment conducive to the activation of the interstitial oxygen-based heat donors at the hydrogen-doped zones (1 1) and (13), and converting said n-type p-type zones (11) and said zones (13) into electrical isolation zones to obtain the expected wafer (10).
- step (b) it is up to those skilled in the art to adjust the hydrogen doping levels of the zones (11) and (13) in step (b) to obtain the desired conversion of the zones in step (c), without affecting the zones (12). ) devoid of hydrogen and dedicated to form the areas p of the final wafer.
- the doping is operated so as to allow a uniform volume distribution of hydrogen in the areas concerned and over the entire thickness of the wafer.
- the doping in step (b) can be carried out via a first step (bl) of implantation of hydrogen on the surface or sub-surface of the zones to be doped, followed by a second step ( b2) of diffusion of hydrogen over the entire thickness (e) of the wafer.
- substrate hydrogen implantation means implantation at depths ranging from a few nanometers to a few tens of nanometers.
- the hydrogen implantation can be carried out by conventional techniques, for example by plasma treatment, in particular by chemical phase deposition.
- PECVD Plasma assisted vapor
- MIRHP microwave - induced remote hydrogen plasma
- the plasma treatment is carried out on both sides of the wafer.
- the hydrogen implantation zones may be defined using a mask (for example, a metal grid), leaving only the surfaces of the areas to be doped accessible, as illustrated in example 2 which follows, for example by PECVD.
- a mask for example, a metal grid
- the hydrogen may be uniformly deposited over the entire surface of the wafer, and the deposit may be etched, for example with hydrofluoric acid (HF), in the zones (12) which it is desired to remain type p.
- HF hydrofluoric acid
- the hydrogen doping rate is preferably increased at the zones (11) intended to form the n-doped zones.
- the implantation of hydrogen at the zones (11) and (13) can thus comprise:
- the volume doping rate of the zones (11) dedicated to form the doped zones n can be between 1 and 4.10 13 cm -3 .
- the volume doping rate of the zones (13) dedicated to form the zones of isolation electrical can be between 1 and 4.10 11 cm “3 .
- the diffusion of hydrogen into the zones to be doped (step (b2)) can be performed, for example, by exposing said zones to ultrasound, in particular using piezoelectric transducers.
- piezoelectric transducers working between 20 kHz and 1 MHz, preferably between 50 and 500 kHz, acoustic deformations induced between 5.10 “6 and 2.10 " 5 , and treatment times between 5 and 120 minutes, preferentially between 10 and 60 minutes.
- the diffusion of hydrogen in step (b2) can be carried out by thermal annealing of the wafer, in particular in an oven, in particular at a temperature ranging from 400 ° C. to 1000 ° C., and for a period ranging from 5 seconds to 5 hours.
- doping with hydrogen will accelerate the activation kinetics of thermal donors in the doped zones.
- An overall thermal treatment of the wafer can thus be operated under conditions conducive to the privileged activation of thermal donors in the zones provided with hydrogen, and without affecting the areas which are devoid of them.
- the overall heat treatment in step (c) may for example be carried out by thermal annealing at a temperature greater than or equal to 300 ° C. and strictly less than 600 ° C., in particular from 400 ° to 500 ° C., and more particularly from approximately 450 ° C.
- the annealing time may be greater than or equal to 30 minutes, in particular between 1 hour and 20 hours, and more particularly about 3 hours.
- a low temperature technology of heterojunction type (amorphous silicon on crystalline silicon) is used, for the realization of the photovoltaic cell.
- a first layer of intrinsic amorphous silicon typically of a thickness of the order of 5 nm
- a p + or n + doped amorphous layer on each of the faces of the wafer
- metallizations also called “conductive contacts”
- Formation of one or more metallizations front and / or back of the wafer in particular by screen printing Ag or Ag / Al.
- a step of annealing the metallizations is then carried out in a passage oven at 800 ° C for a few seconds.
- the PV cells obtained according to the invention can then be assembled to produce a photovoltaic module of reasonable size, conventionally of dimension of the order of m 2 , and having an increased voltage compared to modules developed from conventional cells.
- the invention thus relates to a photovoltaic module formed of a set of photovoltaic cells according to the invention.
- a p-type silicon wafer 220 ⁇ in thickness is used, obtained by cutting an ingot developed by solidification directed by the gradient-freeze technique.
- This wafer has a content type of charge carriers holes, determined via the measurement of the resistivity of 5.10 15 cm “3, and an interstitial oxygen concentration as determined by FTIR analysis, 1.5x10 18 cm" 3.
- the wafer is annealed at 450 ° C for 4 hours to activate thermal donors. This annealing allows the conversion of the p-type wafer to n-type, with an electron content, determined by measurement of the Hall effect, of 2.10 15 cm -3 .
- the wafer is then positioned under a laser beam, shaped according to the pattern shown in FIG. 4a.
- the non-irradiated areas are those that we want to keep n-type, and the irradiated areas (12) are the areas that we want to re-switch p-type.
- the reasons are of dimension 4x4 cm 2 .
- the laser beam uses a wavelength in the red / infrared, in order to bring heat deep down.
- the laser power is adjusted in order to raise the temperature of the substrate to at least 600 ° C, in order to dissolve the majority of the thermal donors in the presence and convert the zone back to type p, while limiting as much as possible the degradation of the surface of the sample.
- a power of 30 W for a 100 ⁇ beam diameter is a good example of an operating point, with a zone scan.
- the duration of the laser treatment is adjusted so as to allow the rise in temperature of all irradiated areas beyond the threshold of 600 ° C for at least 10 minutes. seconds, while limiting the lateral diffusion of heat, in order to obtain a mosaic of types as sharp as possible.
- the wafer undergoes a second laser step, aiming at the development of highly resistive zones between the different regions of opposite types.
- the beam is scanned around the perimeter (13) of each n-type sub-element, over a width of 1 mm (in black in FIG. 4b).
- the parameters of irradiation duration and laser power are adjusted in order to obtain localized zones where only a fraction of the thermal donors has been dissolved, making it possible to obtain an electrical isolation zone, and therefore very resistive .
- the wafer undergoes a chemical attack type CP133 (HF, HN0 3 , CH3COOH) in order to remove any hardened surface areas resulting from the laser steps.
- CP133 chemical attack type
- the surfaces of the wafer are previously polished by a chemical attack type CP133.
- a first masking step, using a metal grid placed above the substrate, is performed in accordance with the patterns, shown in Figure 5a.
- the masked areas (12) correspond to the areas of the wafer which will remain of type p.
- the open areas correspond to the zones (11) and (13) of the wafer intended to form the n-type zones and the electrical insulation zones.
- This first masking step is followed by an ion implantation of hydrogen, by plasma immersion using a standard equipment, at a surface dose Dl of 4.10 9 cm -2 , which will correspond for the wafer of 200 ⁇ of thickness at a volume dose of 2.10 11 cm -3 .
- the implantation energy of the hydrogen used for this application is close to 135 keV.
- This first ion implantation step is then followed by a new masking step, as shown in FIG. 5b.
- the masked areas are then the areas of the wafer (12) which will remain p-type (non-implanted areas) as well as the areas (implanted at the dose Dl) of the wafer (13) intended to form the areas of electrical insulation.
- This second masking step is followed by a second step of ion implantation under 135 keV energy at an implantation dose D 2 of 4.10 11 cm -2 , which, in a 200 ⁇ thick wafer, corresponds to at a volume dose of 2.10 13 cm -3 .
- the wafer is thermally annealed at a temperature in the region of 450 ° C. for a period of 3 hours, in order to transform the p-doped zones comprising hydrogen into n-doped zones, as shown schematically in FIG. 5c.
- the wafer has an alternation of n-doped zones and p-doped zones, each of the n and p zones being separated by an electrical insulation zone (130) of high resistivity.
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Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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FR1352096A FR3003089B1 (en) | 2013-03-08 | 2013-03-08 | MONOLITHIC SILICON PLATE WITH MULTI-JOINT P / N VERTICAL. |
PCT/IB2014/059497 WO2014136082A1 (en) | 2013-03-08 | 2014-03-06 | Monolithic silicon wafer having alternating n-doped areas and p-doped areas |
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EP2965362A1 true EP2965362A1 (en) | 2016-01-13 |
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EP14713263.3A Withdrawn EP2965362A1 (en) | 2013-03-08 | 2014-03-06 | Monolithic silicon wafer having alternating n-doped areas and p-doped areas |
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EP (1) | EP2965362A1 (en) |
CN (1) | CN105190863A (en) |
FR (1) | FR3003089B1 (en) |
WO (1) | WO2014136082A1 (en) |
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FR3030888A1 (en) * | 2014-12-22 | 2016-06-24 | Commissariat Energie Atomique | MONOLITHIC SILICON PLATE TYPE P / TYPE N |
CN109473490A (en) * | 2018-11-08 | 2019-03-15 | 天津理工大学 | A kind of vertical multijunction structure molybdenum disulfide solar battery and preparation method thereof |
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US4110122A (en) * | 1976-05-26 | 1978-08-29 | Massachusetts Institute Of Technology | High-intensity, solid-state-solar cell device |
US4320247A (en) * | 1980-08-06 | 1982-03-16 | Massachusetts Institute Of Technology | Solar cell having multiple p-n junctions and process for producing same |
US8405183B2 (en) * | 2003-04-14 | 2013-03-26 | S'Tile Pole des Eco-Industries | Semiconductor structure |
US8962376B2 (en) * | 2009-04-21 | 2015-02-24 | The Silanna Group Pty Ltd | Optoelectronic device with lateral pin or pin junction |
-
2013
- 2013-03-08 FR FR1352096A patent/FR3003089B1/en not_active Expired - Fee Related
-
2014
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- 2014-03-06 CN CN201480024908.4A patent/CN105190863A/en active Pending
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FR3003089A1 (en) | 2014-09-12 |
FR3003089B1 (en) | 2015-04-10 |
WO2014136082A1 (en) | 2014-09-12 |
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