EP2943875A4 - Data processor and method for data processing - Google Patents

Data processor and method for data processing

Info

Publication number
EP2943875A4
EP2943875A4 EP13870831.8A EP13870831A EP2943875A4 EP 2943875 A4 EP2943875 A4 EP 2943875A4 EP 13870831 A EP13870831 A EP 13870831A EP 2943875 A4 EP2943875 A4 EP 2943875A4
Authority
EP
European Patent Office
Prior art keywords
data
data processing
processor
data processor
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP13870831.8A
Other languages
German (de)
French (fr)
Other versions
EP2943875A1 (en
Inventor
Itzhak Barak
Aviram Amir
Zeev Eliezer Ben
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of EP2943875A1 publication Critical patent/EP2943875A1/en
Publication of EP2943875A4 publication Critical patent/EP2943875A4/en
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8061—Details on data memory access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/764—Masking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Executing Machine-Instructions (AREA)
EP13870831.8A 2013-01-10 2013-01-10 Data processor and method for data processing Ceased EP2943875A4 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IB2013/050220 WO2014108749A1 (en) 2013-01-10 2013-01-10 Data processor and method for data processing

Publications (2)

Publication Number Publication Date
EP2943875A1 EP2943875A1 (en) 2015-11-18
EP2943875A4 true EP2943875A4 (en) 2016-11-30

Family

ID=51166573

Family Applications (1)

Application Number Title Priority Date Filing Date
EP13870831.8A Ceased EP2943875A4 (en) 2013-01-10 2013-01-10 Data processor and method for data processing

Country Status (3)

Country Link
US (1) US20150356054A1 (en)
EP (1) EP2943875A4 (en)
WO (1) WO2014108749A1 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015060256A (en) * 2013-09-17 2015-03-30 富士通株式会社 Data supply circuit, arithmetic processing circuit, and data supply method
US10447823B2 (en) * 2014-01-08 2019-10-15 Marvell Semiconductor, Inc. Packet parsing engine
US10762164B2 (en) 2016-01-20 2020-09-01 Cambricon Technologies Corporation Limited Vector and matrix computing device
GB2552154B (en) 2016-07-08 2019-03-06 Advanced Risc Mach Ltd Vector register access
GB2552153B (en) 2016-07-08 2019-07-24 Advanced Risc Mach Ltd An apparatus and method for performing a rearrangement operation
KR102659495B1 (en) 2016-12-02 2024-04-22 삼성전자주식회사 Vector processor and control methods thererof
US11551067B2 (en) 2017-04-06 2023-01-10 Shanghai Cambricon Information Technology Co., Ltd Neural network processor and neural network computation method
EP3633526A1 (en) * 2017-04-06 2020-04-08 Shanghai Cambricon Information Technology Co., Ltd Computation device and method
US10929143B2 (en) * 2018-09-28 2021-02-23 Intel Corporation Method and apparatus for efficient matrix alignment in a systolic array

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020027552A1 (en) * 2000-05-05 2002-03-07 Lee Ruby B. Method and system for performing subword permutation instructions for use in two-dimensional multimedia processing
US20080077733A1 (en) * 2006-09-25 2008-03-27 Kabushiki Kaisha Toshiba Data transfer apparatus
US20100106944A1 (en) * 2004-07-13 2010-04-29 Arm Limited Data processing apparatus and method for performing rearrangement operations

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5513366A (en) * 1994-09-28 1996-04-30 International Business Machines Corporation Method and system for dynamically reconfiguring a register file in a vector processor
US6877020B1 (en) * 2001-12-31 2005-04-05 Apple Computer, Inc. Method and apparatus for matrix transposition
US7143264B2 (en) * 2002-10-10 2006-11-28 Intel Corporation Apparatus and method for performing data access in accordance with memory access patterns
US6944747B2 (en) * 2002-12-09 2005-09-13 Gemtech Systems, Llc Apparatus and method for matrix data processing
US20100076941A1 (en) * 2008-09-09 2010-03-25 Microsoft Corporation Matrix-based scans on parallel processors

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020027552A1 (en) * 2000-05-05 2002-03-07 Lee Ruby B. Method and system for performing subword permutation instructions for use in two-dimensional multimedia processing
US20100106944A1 (en) * 2004-07-13 2010-04-29 Arm Limited Data processing apparatus and method for performing rearrangement operations
US20080077733A1 (en) * 2006-09-25 2008-03-27 Kabushiki Kaisha Toshiba Data transfer apparatus

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2014108749A1 *

Also Published As

Publication number Publication date
WO2014108749A1 (en) 2014-07-17
US20150356054A1 (en) 2015-12-10
EP2943875A1 (en) 2015-11-18

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