SG11201406379RA - Data processing device and data processing method - Google Patents

Data processing device and data processing method

Info

Publication number
SG11201406379RA
SG11201406379RA SG11201406379RA SG11201406379RA SG11201406379RA SG 11201406379R A SG11201406379R A SG 11201406379RA SG 11201406379R A SG11201406379R A SG 11201406379RA SG 11201406379R A SG11201406379R A SG 11201406379RA SG 11201406379R A SG11201406379R A SG 11201406379RA
Authority
SG
Singapore
Prior art keywords
data processing
data
processing
Prior art date
Application number
SG11201406379RA
Inventor
Yuji Shinohara
Makiko Yamamoto
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2013023883 priority Critical
Application filed by Sony Corp filed Critical Sony Corp
Priority to PCT/JP2014/051624 priority patent/WO2014123018A1/en
Publication of SG11201406379RA publication Critical patent/SG11201406379RA/en

Links

Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/1177Regular LDPC codes with parity-check matrices wherein all rows and columns have the same row weight and column weight, respectively
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/033Theoretical methods to calculate these checking codes
    • H03M13/036Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/116Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707Simple row-column interleaver, i.e. pure block interleaving
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/356Unequal error protection [UEP]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152Bose-Chaudhuri-Hocquenghem [BCH] codes
SG11201406379RA 2013-02-08 2014-01-27 Data processing device and data processing method SG11201406379RA (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2013023883 2013-02-08
PCT/JP2014/051624 WO2014123018A1 (en) 2013-02-08 2014-01-27 Data processing device and data processing method

Publications (1)

Publication Number Publication Date
SG11201406379RA true SG11201406379RA (en) 2014-11-27

Family

ID=51299615

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201406379RA SG11201406379RA (en) 2013-02-08 2014-01-27 Data processing device and data processing method

Country Status (9)

Country Link
US (3) US20150046765A1 (en)
EP (1) EP2955855A4 (en)
JP (1) JPWO2014123018A1 (en)
KR (1) KR102091888B1 (en)
CN (1) CN104221292B (en)
CA (1) CA2868419A1 (en)
MX (1) MX2014011863A (en)
SG (1) SG11201406379RA (en)
WO (1) WO2014123018A1 (en)

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AU2014279263B2 (en) 2013-06-12 2017-10-26 Sony Corporation Data processing device, and data processing method
CN105556853A (en) * 2013-09-20 2016-05-04 索尼公司 Data processing device and data processing method
TWI528732B (en) * 2013-12-30 2016-04-01 衡宇科技股份有限公司 Decoder having ldpc code and bch code and decoding method thereof
JP2015179960A (en) * 2014-03-19 2015-10-08 ソニー株式会社 Data processing device and data processing method
EP3131288A4 (en) 2014-04-08 2017-11-29 LG Electronics Inc. Broadcasting signal transmission device, broadcasting signal reception device, broadcasting signal transmission method, and broadcasting signal reception method
KR102240740B1 (en) * 2015-01-27 2021-04-16 한국전자통신연구원 Bit interleaver for 256-symbol mapping and low density parity check codeword with 16200 length, 2/15 rate, and method using the same
KR102287621B1 (en) * 2015-02-16 2021-08-10 한국전자통신연구원 Bit interleaver for 256-symbol mapping and low density parity check codeword with 64800 length, 3/15 rate, and method using the same
CN108667556B (en) * 2017-03-29 2021-07-30 上海交通大学 Bit interleaving coding modulation method
JP2019126016A (en) * 2018-01-18 2019-07-25 ソニー株式会社 Transmission method and reception device
JP2019125949A (en) * 2018-01-18 2019-07-25 ソニー株式会社 Transmission method and reception device

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Also Published As

Publication number Publication date
MX2014011863A (en) 2014-11-03
US20200403637A1 (en) 2020-12-24
CN104221292B (en) 2019-07-02
US20150046765A1 (en) 2015-02-12
CA2868419A1 (en) 2014-08-14
JPWO2014123018A1 (en) 2017-02-02
US10804934B2 (en) 2020-10-13
US20190007061A1 (en) 2019-01-03
EP2955855A1 (en) 2015-12-16
WO2014123018A1 (en) 2014-08-14
KR20150116378A (en) 2015-10-15
KR102091888B1 (en) 2020-04-14
EP2955855A4 (en) 2016-08-17
CN104221292A (en) 2014-12-17

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