EP2936715B1 - Verfahren zur anlockung eines systems zum abfangen und stören durch einfügen von dummy-synchronisationsmustern in das emittierte signal und emitter zur umsetzung des verfahrens - Google Patents

Verfahren zur anlockung eines systems zum abfangen und stören durch einfügen von dummy-synchronisationsmustern in das emittierte signal und emitter zur umsetzung des verfahrens Download PDF

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EP2936715B1
EP2936715B1 EP13805372.3A EP13805372A EP2936715B1 EP 2936715 B1 EP2936715 B1 EP 2936715B1 EP 13805372 A EP13805372 A EP 13805372A EP 2936715 B1 EP2936715 B1 EP 2936715B1
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Prior art keywords
sequence
bits
transmission chain
dummy
code
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French (fr)
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EP2936715A1 (de
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Sébastien MALLIER
François SIRVEN
François Delaveau
Philippe Viravau
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Thales SA
ETAT FRANCAIS REPRESENTE PAR LE DELEGUE GENERAL
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Direction General pour lArmement DGA
Thales SA
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04KSECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K3/00Jamming of communication; Counter-measures
    • H04K3/20Countermeasures against jamming
    • H04K3/28Countermeasures against jamming with jamming and anti-jamming mechanisms both included in a same device or system, e.g. wherein anti-jamming includes prevention of undesired self-jamming resulting from jamming
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04KSECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K3/00Jamming of communication; Counter-measures
    • H04K3/60Jamming involving special techniques
    • H04K3/65Jamming involving special techniques using deceptive jamming or spoofing, e.g. transmission of false signals for premature triggering of RCIED, for forced connection or disconnection to/from a network or for generation of dummy target signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04KSECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K3/00Jamming of communication; Counter-measures
    • H04K3/80Jamming or countermeasure characterized by its function
    • H04K3/82Jamming or countermeasure characterized by its function related to preventing surveillance, interception or detection
    • H04K3/825Jamming or countermeasure characterized by its function related to preventing surveillance, interception or detection by jamming
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04KSECRET COMMUNICATION; JAMMING OF COMMUNICATION
    • H04K3/00Jamming of communication; Counter-measures
    • H04K3/40Jamming having variable characteristics
    • H04K3/45Jamming having variable characteristics characterized by including monitoring of the target or target signal, e.g. in reactive jammers or follower jammers for example by means of an alternation of jamming phases and monitoring phases, called "look-through mode"

Definitions

  • the technical field of the invention is that of the fight against the jamming of telecommunications systems and the intrusion into such systems.
  • the invention aims to provide a solution for preventing the interception and / or jamming of a signal emitted by a transmitting equipment, such as a telephone or a portable terminal.
  • the invention relates to a method of decoying an interception and jamming system by inserting dummy synchronization patterns into the signal transmitted by the transmitting equipment.
  • the dummy patterns inserted are intended to disrupt the signal analysis of the transmitter by the interception and jamming system and to disperse both the computing power of its interception function and the power of the interference signal.
  • the dummy synchronization pattern (s) are introduced into the transmitted signal by generating a bit sequence adapted directly in the binary data sequence to be transmitted. The invention does not require any modification of the transmitter equipment because it intervenes at the input of the transmission channel.
  • the communication systems use, during the generation of the signal to be transmitted, particular sequences, inserted in the signal, which are used to synchronize the transmitter and receiver equipment with each other. These synchronization sequences are fixed once and for all by the communication protocol or the system implementation standard and are inserted in the signal to be transmitted with the modulated information sequences.
  • An interception and jamming system has interception and analysis functions by which it can detect a synchronization sequence within a signal emitted by a transmitter, then scramble this sequence precisely in a coherent manner with respect to a receiver, so that the synchronization between the transmitter and a compatible receiver of the transmitter is no longer possible.
  • a system of deception against an interception system is disclosed in the document US8055184 .
  • a problem to be solved relates to the development of a decoy solution implemented in a transmission transmitter to prevent or making more complex and / or less effective scrambling synchronization sequences within the transmitted signal.
  • An associated subproblem is to design a solution that is weakly complex, from the point of view of its implementation, and that requires little or no modification of the transmitting and / or receiving equipment of the communication system.
  • the solution must make it possible to maintain compatibility with the telecommunications standard implemented and to preserve synchronization between transmitters and receivers despite the presence of jammers.
  • the aim of the invention is to solve the aforementioned problems and to eliminate the limitations of the solutions of the prior art by proposing a method of decoying interception and scrambling systems consisting in carrying out a specific coding of the useful data to be transmitted so as to generate indirectly in the signal emitted in fine, one or more dummy synchronization patterns in the form of stationary patterns.
  • the implementation of the method according to the invention at the level of the useful data to be transmitted and not at the output of the transmission channel makes it possible not to alter the properties of the transmitter with respect to the respect of the telecommunications standard used. .
  • the implementation of the decoying method according to the invention applied to a communication system gives it resistance to a selective interception and scrambling system that will then hang on. and selectively scrambling the dummy synchronization sequences instead of hooking and selectively scrambling the synchronization patterns actually used by a compatible receiver of said communication system.
  • the expression “useful data”, “useful bits”, “useful information” or “useful symbols” is used to designate the binary data to be transmitted between the application executed by a transmitter and the application. correspondingly performed by a receiver as opposed to the binary data present in the transmitted frames but which are not intended for the application executed by the receiver but are used for signaling purposes, synchronization or any other function necessary for the proper functioning of the system. communication.
  • the figure 1 illustrates, in a diagram, the problem of jamming synchronization sequences in a signal transmitted by a transmitter and sent to a receiver.
  • a wireless communication system in the form of an emitter EM which communicates with a receiver REC by radio wave.
  • the transformation of the binary data to be transmitted into a radio signal S can be specified by a standard or a telecommunications standard.
  • This specification defines, in particular, the insertion, within the signal to be transmitted, of synchronization sequences SYNC.
  • Such sequences consist of symbols known from the system equipment and positioned periodically or in a time pattern also known from both the EM transmitter and the REC receiver that implement the same telecommunications standard.
  • the receiver REC can synchronize temporally with the transmitter by detecting for example the beginning or the end of a frame, indicated by the presence of said sequence, within of the transmitted signal.
  • INT interceptors In the field of passive listening, there are devices called INT interceptors which are able to intercept the signal emitted by an EM transmitter, to synchronize with synchronization SYNC sequences and to demodulate and / or analyze if necessary symbols intercepted to decode the information or reproduce the corresponding signal.
  • BR jammers coupled to INT interceptors, which aim to neutralize the EM communications system, REC by transmitting at the same radio frequency a high power signal, compatible, strongly correlated or similar with the signals expected by the target receiver, resulting in the loss of synchronization of the system.
  • the interception and scrambling systems BR, INT thus have both interception functions by which they can detect, identify and regenerate synchronization sequences within an emitted signal, and scrambling functions based on signals that are highly correlated or identical with the signal expected by the target receiver.
  • the interference efficiency is enhanced because it concentrates its jamming power, on the temporal parts of the transmitted signal that are the most vulnerable, namely the synchronization sequences, and thus penetrates deeply into the reception channel of the REC receiver .
  • synchronization sequences is not limiting and can be extended to any sequence of known symbols fixed a priori by the telecommunications standard or the radio access technology and which, when they are scrambled, cause a malfunction of the system.
  • sequences also include the equalization sequences and frame synchronization patterns within the signal. These sequences, as the case may be, precede or are multiplexed with the information to be transmitted. They most often have a limited combinatorial position and value which increases their vulnerability to interception and jamming.
  • the figure 2 illustrates, on a similar pattern to that of the figure 1 , the principle underlying the invention for decoying an interception system INT and / or a scrambler BR to preserve the synchronization within the communication system EM, REC.
  • one or more dummy sync patterns SYNC F are introduced in the signal transmitted by the transmitter EM.
  • These dummy sequences have stationary characteristics that are easily detectable by an interceptor. They are inserted periodically or in a predetermined temporal pattern within the signal to be transmitted. For example, they may be inserted with a period identical to that of the actual synchronization patterns SYNC present in the signal but with a time offset and / or a frequency offset so that the dummy synchronization sequences do not replace, in whole or in part , the actual synchronization sequences that must be preserved to ensure the proper functioning of the communication system.
  • the SYNC F dummy sequence (s) may advantageously be positioned on the least vulnerable or best protected parts of the signal, for example on parts protected by a robust correction code or on frequencies or blanking time intervals of useful data. and not exploited for taking synchronization or access to the network, or on frequencies or time intervals empty of useful data and dedicated for this purpose.
  • the symbol values and positions of the SYNC F dummy synchronization sequences are defined by values and / or positions different from those used by the legitimate receiver for the purposes specific to the establishment of the radiocommunication with the transmitter, in order to avoid confusion with the sequences used by the legitimate receiver.
  • the expression legitimate receiver here designates a REC compatible receiver of the communication system and able to communicate with an EM transmitter of said system.
  • the values and periodicity characteristics of the SYNC F fake synchronization sequences are preferably chosen from patterns similar to those used in the telecommunications field and easy to identify for an interceptor. It may for example be patterns close to those commonly intended for frequency synchronization consisting of series of identical symbols "0000 " or "1111 ". It may also be patterns close to those commonly intended for time synchronization consisting of series of alternating symbols "010101 ". It may also be sequences of symbols similar to those used in certain known civil standards operating the same frequency ranges as the transmitter. In any case, the values and positions of the symbols of the dummy synchronization sequences must, however, be different from those used by the communication system to ensure synchronization between a transmitter and a receiver.
  • dummy synchronization sequences does not disturb the synchronization between the transmitter EM and receiver REC equipment because the dummy sequences chosen are sufficiently decorrelated from the actual synchronization sequences used within the communication system.
  • the values and positions, in the time-frequency domain, of the symbols of the dummy sequences are chosen such that they are different from the values and positions of the actual synchronization sequences.
  • the dummy sequences can be processed by a receiver of the communication system either as random data comparable to transmitted data, or as decoys whose values and positions are known a priori and which are therefore easily identifiable to be eliminated during the synchronization process.
  • the purpose of inserting dummy synchronization sequences into the signal is to decoy an interception and interference system INT, BR.
  • the ability of the scrambler to identify and analyze the signal is impaired by the existence of such dummy sequences that the scrambler tends to detect and identify as actual synchronization sequences.
  • the computational capacity of the interception function of the interferer is solicited on non-significant sequences of the signal, the scrambling signal will tend to be transmitted on the time zones of the signal corresponding to the dummy sequences while the actual synchronization sequences are preserved.
  • Oriented identification techniques that the interception function could implement are disrupted by the appearance of dummy signals, and even more so if they are produced in large quantities and are variable from one communication to another or managed. with long-term fluctuation mechanisms.
  • the performance of an interception and jamming system is further diminished by the fact that a large number of Fake synchronization is present in the transmitted signal: Indeed, the scrambler analysis system is obliged to disperse its computational efforts, until possible saturation of its computing capabilities, on artificial patterns other than the actual synchronization pattern since he has no way of recognizing it a priori. Even if the scrambler analysis system is working with a database of signals to be identified (according to an oriented analysis and identification approach), the implementation of the invention will tend to charge artificially said database, to disperse the efforts of analysis and oriented research and to penalize the identification, especially if the artificial artificially created motives are made intentionally fluctuating according to the time.
  • the invention thus makes it possible to lure an intelligent jammer but also to prevent synchronization of the signal emitted by any receiving or intercepting equipment which does not have the knowledge of the real synchronization pattern.
  • Inserting a dummy synchronization pattern into a modulated symbol frame at the output of the transmission chain leads to modifying the transmission channel itself and therefore the transmitter itself, which is not always technically possible on the one hand, or desirable from the point of view of the complexity of implementation.
  • the aim of the invention is to allow the introduction of false synchronization patterns by intervening at the input of the transmission channel, that is to say directly on the binary data to be transmitted, without modifying the transmission chain, and by through software means.
  • FIGS. 3a, 3b illustrate the method of generating dummy sequences according to the invention.
  • the figure 3a schematically illustrates the transformation undergone by a sequence of useful binary data Du to be transmitted to obtain a sequence of modulated symbols S T , ready to be transmitted in the form of a radio signal.
  • the transformation executed corresponds to the transfer function F of the transmission chain of the transmitter.
  • the sequence of modulated symbols S T is constituted on the one hand by useful symbols S U resulting from the transformation of the useful binary data Du and on the other hand by at least one synchronization sequence SYNC or an equivalent sequence composed of symbols known from all the equipment of the communication system.
  • the figure 3b illustrates the implementation of the method according to the invention.
  • the location and constitution of the SYNC F dummy synchronization sequence are chosen in an empty frame T F , of the same size as a real frame of modulated symbols S T and on a given frequency channel f.
  • the selected time position and / or frequency channel are different from the time position and / or the frequency channel of a real synchronization sequence.
  • the size and exact nature of the dummy sequence can be variable.
  • a second step it is estimated the value and the position of the dummy bits B F to be inserted within the data sequence to be transmitted, at the input of the transmission channel, so as to obtain, at the output of the chain of emission, the value and the predefined temporal position of the symbols of said fake sequence SYNC F.
  • This operation can be performed by calculating the inverse transfer function F -1 of the transfer function F implemented by the transmission chain and then applying the inverse transfer function F -1 to the dummy frame T F to obtain a frame modulated D F comprising the dummy bits B F.
  • the dummy bits B F are then inserted into the actual data sequence to be transmitted from the input of the transmission chain by punching, shifting or multiplexing the useful bits corresponding to the actual data sequence.
  • the sequence of modulated symbols obtained at the output of the transmission chain comprises both the useful symbols S U , the real synchronization pattern SYNC and the dummy synchronization pattern SYNC F.
  • the dummy bits can thus be introduced directly into the data sequence to be transmitted without modifying or intruding into the transmission chain of the transmitting equipment.
  • the data to be transmitted comes from an application, for example an audio or video source coder, it is possible to intercept the application binary data before entering the transmission chain which is implemented at the level of the physical layer. a modem. This interception can be done at an intermediate layer, for example at the network layer.
  • the dummy bits are deleted from the demodulated and decoded data sequence.
  • the figure 4 represents a block diagram of the various functions successively implemented by a transmitter of a communication system for transmitting a signal containing data to be transmitted.
  • the main functions traditionally used are represented, it being understood that the diagram of the figure 4 is given as an illustration and not a limitation. In particular, some functions may be omitted and the order of some functions may be changed.
  • the transfer function F of the transmission chain is equal to the composition of the transfer functions of each functional block independent of the chain, it being understood that the blocks are connected in series.
  • the inverse transfer function F -1 is, when it exists, equal to the composition, in reverse order, of the inverse transfer functions of each block. In other words, if f 1 , f 2 , ...
  • the direct transfer function F of the transmission channel can be known when the invention is implemented by the system designer communication system or when said system complies with a known standard. It can also be estimated by testing the sending equipment, for example by injecting test signals at its input and by analyzing the signals obtained at the output.
  • the transformations applied in the transmission channel on the bitstream are generally reversible, that is to say that it is possible from the bitstream output to find the input bitstream. This is the operation performed by the receiver.
  • the practical implementation consists in successively analyzing the various transformations of the bit stream, starting with the transformation that occurs last in the transmission chain. For each transformation, the inputs to be applied are determined to output the desired coded bitstream.
  • the transmission channel 400 shown in FIG. figure 4 comprises an application 401 capable of generating or transforming a sequence of binary data to be transmitted.
  • the data to be transmitted can be text, audio, video or any other information.
  • the application 401 may also include a source coding function, for example an audio, image or video coder able to suppress or reduce the redundancy of information or to reduce the noise affecting the sequence.
  • the application 401 outputs a useful bit sequence T to be transmitted.
  • the invention is advantageously implemented at the output of the application 401 by modifying the useful binary sequence T to insert dummy bits therein so as to obtain at the output of the transmission channel a sequence of modulated symbols F (T) (t). ) to be transmitted comprising at least one dummy synchronization pattern.
  • the transmission channel 400 may also include a correction coding module 402.
  • the objective of a corrective coding function is to transform the binary sequence of useful data received at the output of the application 401 into a protected bit sequence so that the impact of the errors due to the transmission channel is as small as possible. .
  • the corrector coding function adds redundancy to this bit sequence.
  • the determination of the inverse transfer function of a correction coding module is equivalent to finding the bit sequence to be produced at the input of the correction coder in order to obtain an encoded sequence in which the value and the position of a predetermined number of bits are imposed.
  • correcting codes There are different types of correcting codes including linear block codes, convolutional codes or turbo codes and LDPC low density codes.
  • a k / n efficiency linear block corrector code transforms a binary sequence comprising k symbols into a protected bit sequence comprising n symbols with n strictly greater than k. Such a code thus introduces nk redundancy symbols.
  • the symbols may be bits or consist of several concatenated bits.
  • the block coding consists in producing the product of an input information vector of k bits by a binary matrix, of full rank, of size k * n, called generator matrix, to obtain an encoded vector of n bits.
  • the code is said systematically on the left, respectively on the right, when the first k, respectively the last k, bits of the encoded vector of n bits correspond to the k bits of the input information vector.
  • the encoding operation can be illustrated by the following relation, where i 0 , ... i k-1 are the bits of the input useful sequence, c 0 , ... c n-1 are the bits of the sequence coded and m i, j are the coefficients of the generator matrix of the code. vs 0 ...
  • vs not - 1 i 0 ... i k - 1 ⁇ m 0 , 0 m 0 , 1 m 0 , 2 ⁇ m 0 , not - 1 ⁇ ⁇ ⁇ ⁇ ⁇ m k - 1 , 0 m k - 1 , 1 m k - 1 , 2 ⁇ m k - 1 , not - 1
  • the coded sequence is written [ i 0 ⁇ i k -1 c k ⁇ c n-1 ] .
  • the inverse transform of the coding operation is to analyze the received word to determine if it is a possible code word. If it is not a possible code word, it must be replaced by the codeword at a minimum distance from the received code word. Then, as the code is systematic, the information is obtained by removing the last nk bits of the word. In other words, it is possible to impose, by the choice of the input sequence, the output value of the first k bits of the codeword. The values of the remaining nk bits are then deduced from the values chosen for the k bits that were forced. It is exactly the same for a systematic block code on the right.
  • This encoding operation consists of calculating the division of i ( x ) ⁇ x n - k by g ( x ). The remainder of the division is v ( x ) (of degree less than or equal to nk-1) and the quotient of the division is k ( x ) .
  • any circular permutation of a code word is also a code word, it means that it is also possible, always for the cyclic codes, to impose the value of any group of k consecutive bits of code. 'a code word.
  • the dependence between the values of the input bits of the encoder and the bits at the output of the encoder is linear.
  • the values of the bits that must be forced into the encoder input depend linearly on the values of the other bits at the input of the encoder and the values of the forced bits at the output of the encoder.
  • a sufficient condition to be able to impose the value of a group of d bits at the output of the encoder, with d less than or equal to k, is that set of the positions p 1 , p 2 , ...
  • bits in the coded sequence must be such that the sub-matrix of the matrix generating the code: m 0 , p 1 m 0 , p 2 m 0 , p 3 ⁇ m 0 , p d ⁇ ⁇ ⁇ ⁇ m k - 1 , p 1 m k - 1 , p 2 m k - 1 , p 3 ⁇ m k - 1 , p d is of full rank, that is to say of rank equal to d.
  • the sub-matrix of the generator matrix of the block code corresponding to the positions of the bits or symbols to be fixed is of full rank.
  • some submatrices of the generating matrix may not be of full rank.
  • the rank of a matrix corresponds to the number of independent columns of the matrix or equivalently to the number of independent rows of the matrix. It is therefore not possible to force the values of these 4 bits (the second, fourth, fifth and sixth) of the coded word: if the value of 3 of these bits is forced, the value of the fourth bit is deduced. values imposed on the three forced bits.
  • bit values forced in encoder input depend linearly on the values of bits of the pattern eh encoder output (c 0 and c 1) and the values of other encoder input bit .
  • Convolutional codes are the second major family of error-correcting codes. While linear block codes are used to split the message into blocks of k symbols, the convolutional codes apply a sliding window of k * ( m + 1) symbols to the message and produce a continuous sequence of encoded symbols.
  • the symbols are binary (ie at value 0 or 1 in the Welsh GF body (2), "+” means the addition modulo 2 and ".” multiplication modulo 2).
  • a j be an information symbol
  • n symbols at the output of the encoder depend linearly on the k * ( m +1) last symbols at the input of the encoder.
  • the convolutional coding is a periodic k-bit period coding on the input binary signal. For each new group of k bits, n coded bits are calculated. The n coded bits are bit combinations relating to the ( m +1) last groups of k bits. m is the constraint length of the code.
  • the step of the method according to the invention which consists in inverting the transfer function of a convolutional code, that is to say, determining the sequence of bits to be produced at the input to obtain an output of a signal, is illustrated in a nonlimiting example. encoded sequence in which the value and the position of a predetermined number of bits are set.
  • the polynomials G 1 and G 2 are applied to the input bits to respectively form the even-numbered output bits and the odd-numbered output bits interleaved two by two in the form b 2n b 2n + 1 to form a bit stream of size equal to a multiple of 2. It is illustrated below the possibility of choosing the input bit stream so as to generate desired patterns after coding.
  • the two bits (b 2n , b 2n + 1 ) at the output are to be chosen from either (0,0) or (1,1), or (0,1) or (1, 0).
  • the last bit that enters the encoder is used for the calculation of each of the two outputs of the encoder: by changing this bit, the values of the two outputs are changed.
  • the two possible output bits are to be chosen from two complementary groups. It is therefore always possible to choose the input bit so as to force the value of one of the two output bits. It is therefore easy with this code to force every other bit at the output of the encoder.
  • the outgoing bit groups for a state of the encoder, are chosen so as to be at maximum distance from each other.
  • the last bit that enters the encoder is used for the calculation of each of the two outputs of the encoder. It is therefore possible, for all the usual 1/2 output codes, to force the value of one bit out of two at the output of the encoder.
  • the maximum number of successive bits whose value can be set is equal to the length of the impulse response of the code, ie 2m + 2 where m is the constraint length of the code.
  • the code defined by the preceding polynomials (171, 133) may be punched to obtain a 3/4 yield code.
  • the parity relationships of this code have a length of 26 (11111101011011001010011111) and are spaced 4 bits apart.
  • This example is illustrated in figure 8 on which are represented the indices 800 of the bits at the output of the encoder, a portion P 28 of 28 consecutive bits having no relation of complete parity and 3 relations of parities R1, R2, R2 linked to said code, of length equal to 26 bits. Parity relationships are checked for all 26-bit sequences starting on an index shifted by 4 bits for each new sequence.
  • the dependence between the encoder input bit values and the encoder output bits is linear.
  • the values of the bits that must be forced into the encoder input linearly depend on the values of the other encoder input bits and the forced bit values at the encoder output.
  • the invention also applies to corrector codes of turbo-code type product.
  • Turbo-codes are correcting codes that combine at least two simple codes by interleaving the entries so that each of the simple codes sees a different set of information on the one hand, and the information specific to each bit, block or message is spread over these neighbors on the other hand. As a result, even if part of the bits, blocks or messages is corrupted during transmission, the corresponding information still exists more or less on bits, blocks or neighboring messages.
  • the decoding procedure is iterative and collaborative between each simple code. It involves a notion of trust on each bit, block or message decoded and differs the final decision on their values ("soft decision" or "soft decision” in English).
  • Each of the decoders transmits to the others the information resulting from its own decoding (called extrinsic information) which is multiplexed with the input information of the other coders.
  • extrinsic information the information resulting from its own decoding
  • the bit, block or message thus transmitted is decoded a second time by the other simple coders, and the corresponding information is re-transmitted to the other coders (hence the name "turbo" which is related to the decoding procedure and not to the code itself).
  • Simple employable codes are multiple. It is possible to use convolutional codes. Recursive and systematic convolutional codes are in practice particularly suitable. The codes can be placed in series or in parallel. The clever management of the interleaving and the iterative detection / correction of data by each simple code makes it possible to increase the detector and corrector power of the overall process while limiting the number of iterations and the complexity.
  • Another turbo coding structure corresponds to product codes.
  • the product yield code k 1 ⁇ k 2 not 1 ⁇ not 2 is built from two elementary codes C 1 and C 2 of output k 1 not 1 and k 2 not 2 .
  • the elementary codes used are very simple block codes (typically parity codes, Hamming codes or extended Hamming codes).
  • the n 1 ⁇ n 2 successive bits appear as a sequence of n 2 codewords C 1 . Considering the binary train decimated by a factor n 1 , we obtain words of the code C 2 .
  • turbo codes produced built from several block codes, are like block codes when it comes to determining whether it is possible to generate the desired pattern. Indeed, the encoding operation can be broken down into coding and interleaving operations.
  • LDPC codes are specific block codes that are constructed in such a way that the parity bits are computed using a low weight parity relationship. This is in practice systematic (but not cyclic) block codes and the analysis made on block codes applies by analogy to the description made previously.
  • LDPC codes are usually very large. As has been established for block codes, the LPDC codes thus make it possible, in particular, to generate selected patterns with consecutive series of bits of great length.
  • any correction code for which the coding operation can be performed by multiplying the information sequence by a generator matrix to obtain the coded sequence it is possible to set the value and the position of a set of bits. of the coded sequence by imposing a particular input binary sequence.
  • the sub-matrix, of the generating matrix is defined by m 0 , p 1 m 0 , p 1 m 0 , p 3 ⁇ m 0 , p d ⁇ ⁇ ⁇ ⁇ ⁇ m k - 1 , p 1 m k - 1 , p 2 m k - 1 , p 3 ⁇ m k - 1 , p d is of full rank, with m i, j coefficients of the generator matrix and p 1 , p 2 , ... p d , the set of positions of the bits whose value is fixed in the coded sequence.
  • the transmission channel 400 may also include a scrambling module 403, also called brewing.
  • the brewing, or scrambling is used to make the binary sequence to emit as random as possible, in order to improve the symbol synchronization but also to contribute to the protection of the contents of the brewed messages. Its purpose is to remove long sequences of bits equal to 0 or 1 that prevent a correct recovery of the symbol rate.
  • brewers There are several types of brewers including synchronous brewers requiring a prior time reference or self-synchronizing brewers.
  • This transformation is invertible, the scrambling operation consists in transforming a group of L bits into another group of L bits and the operation of inverting the transformation of the bitstream is an operation performed by a receiver.
  • the reverse transfer function of a brewer or scrambler is easily deductible from its direct transfer function.
  • the dependence between the value i of a bit at the input of the scrambler and the value c of the bit at the output of the scrambler is affine.
  • a pseudo-random sequence is added modulo 2 to the binary signal to be scrambled.
  • the binary series ⁇ ..., e k , e k + 1 , ... ⁇ representing the scrambling sequence is periodic, with a long period L.
  • the operation F consists of a new addition modulo 2 of the value of the bits scrambled by the outputs of the same shift register as the transmission to produce a descrambled sequence of identical length.
  • the states of the register are filled with a finite number of scrambled data.
  • the output of the register is added modulo 2 to the input data bit to form the new scrambled bit.
  • b ' kP (' + 'always denotes modulo 2 addition in GF2). This makes it possible to perform descrambling on reception in a simple manner and without having to synchronize beforehand.
  • b' k-1 + ... + C P. b ' kP .
  • the difficulty in forcing the output bits arises from the fact that the expression of the register states as a function of the input data b k (non-scrambled data) involves an unlimited number of said input data. In other words, all the inputs b k since the startup of the scrambler are involved in the value of the states of the register.
  • the transmission chain comprises a self-synchronizing scrambler.
  • the transmission channel 400 may also include an interleaving module 404.
  • Interleaving is widely used on transmission channels where the occurrences of errors are grouped into packets. Its function is to distribute these errors as uniformly as possible. In reception, the errors are, after deinterleaving, placed in such a way that they impact different codewords. These errors can then be considered as decorrelated, and the correcting power of the decoders makes it possible to minimize their impact. Interleaving also appears as a means of introducing time diversity into the transmission chain and thereby helps to protect it from fading, interference and potential interference. Many interleavers are constituted by a table, the input bits are then arranged by rows in the table, and the output bits are produced by reading in a column of the table.
  • the transformation performed by an interleaver is also an invertible operation. Its inverse transfer function is deductible from its direct transfer function. Indeed, it is a transformation that transforms a block of L bits into another block of L bits, simply by swapping the order of the bits.
  • B ' b' k , ... b 'k + L-1
  • a block of bits B b k , ... b k + L-1 , which once interleaved, is strictly equal to bit stream B.
  • the transmission channel 400 may also comprise a framing module 405.
  • the framing 405 enables the receiver to synchronize itself on the transformations of the bitstream such as interleaving or decoding operations, and then recovering data.
  • Several frames can also be grouped to form a multi-frame or a hyper-frame.
  • the synchronization patterns used for the framing are repeated in the transmitted sequence and can be detected and scrambled as previously explained.
  • the framing limits the ability to force the desired modulated signal since some bits take values imposed at regular intervals, and it is necessary to keep these bits for proper operation of the receiver in connection with the transmitter. This transformation is therefore not surjective for data blocks whose output size exceeds that of a block of useful data per frame.
  • the framing occupies only a very limited (and temporally well-defined) part of the total bit rate (example: start frame pattern using only a few symbols, etc.) and does not prevent generating the desired coded signal within a frame.
  • the transmission channel 400 may also include a binary signal coding module 406.
  • Binary signal coding is used to adapt the signal to the transmission channel. It transforms the digital message into a baseband electrical signal or a low frequency signal.
  • NRZ Non-Reset
  • alphabetic codes There are two major classes of signal binary codes, NRZ (Non-Reset) transcoding codes and alphabetic codes.
  • the transformation carried out by a signal binary coder is an invertible operation. Its inverse transfer function is therefore deductible from its direct transfer function.
  • the transmission channel 400 comprises a modulator 407 that transforms the binary sequence into a sequence of modulated symbols. Symbols are taken from a complex set called constellation. A symbol can group several bits. For example, digital phase or PSK (Phase Shift Keying) modulations or digital amplitude modulation or QAM (Quadrature Amplitude Modulation) modulations may be mentioned.
  • PSK Phase Shift Keying
  • QAM Quadrature Amplitude Modulation
  • the transformation operated by a modulator is an invertible operation. Its inverse transfer function is therefore deductible from its direct transfer function.
  • the transformations applied in the transmission channel on the bit stream are reversible, that is to say that it is possible from the output bit stream to recover the input bitstream.
  • redundancy is even added so as to be able to recover the original binary signal in the presence of errors on the coded bitstream.
  • a first variant consists in searching among the set F ( ⁇ TBU ⁇ ) of modulated sequences that can be obtained at the output of the transmission channel from the set ⁇ TBU ⁇ of the possible input bit sequences of the transmission channel, the bit sequence T 'which minimizes the distance between the modulated output transformation F (T') of the sequence T 'and the desired modulated sequence D which contains at least one factitious synchronization pattern SYNC F positioned at the desired location.
  • the distance considered may, for example, be a least squares distance calculated by integrating the difference between a possible sequence F (T), T belonging to the set ⁇ TBU ⁇ , and the desired sequence D over a fixed time interval.
  • T' argmin T ⁇ TBU VS T D .
  • this variant of the invention can be implemented by restricting the set ⁇ TBU ⁇ to a subset ⁇ TBU ' ⁇ which comprises only useful bit sequences T whose lengths and positions after passing through the transmission chain (and in particular after passing through the coding and interleaving modules) correspond to dummy SYNC ' F patterns, where appropriate suboptimal with respect to the deception of an interception and jamming system, but compatible with the implementation standard of the telecommunication system in terms of positions, recurrence and frame periodicity, and therefore easy to generate and insert in the frames of useful data.
  • the time / frequency structure and / or the choice of the positions, lengths and recurrences of the dummy signals SYNC ' F approaching, in the sense of the criterion mentioned above, the dummy signals SYNC F desired at the output, are fixed based on the frame periodicities of the transmission and moving away as far as possible (in the time / frequency domain) the dummy patterns of data truly useful for the synchronization and demodulation of the receiver.
  • the dummy patterns will be placed at positions different from those of the real patterns, in end of packet rather than at the beginning of the packet, on fictitious beacon frequencies rather than on those actually used.
  • orthogonal codes will be used as factual patterns to all the codes actually used by the users.
  • the restricted set ⁇ TBU ' ⁇ is then pre-determined by inverting, for the SYNC' F units , analytically or by simulation, the modules of the transmission chain and in particular the interleaving modules and the coding modules.
  • the applied transformation consists in first determining a partitioning of the frame of the useful data by inverting the coding interleaving modules: this determines precise positions, on which, instead of transmitting useful data, the bits of useful information by forced useful bits for generating dummy sequences after interleaving and coding.
  • the values of these dummy useful bits can change depending on the value of the neighboring useful information bits (variables and random): the value of each of these forced bits depends on not only values of the desired coded dummy bits but also values of some neighboring useful bits (according to the scrambling and coding scheme). These dependencies are linear or affine, this means that the value of each forced useful bit is expressed as the sum of dummy bits at the coding output and neighboring useful information bits (ie linear dependence on the useful information bits plus possibly an inversion of the coded forced bits).
  • the key steps concern the inversion of the interlace and corrector coding operations.
  • positions and dependency relationships of the dummy useful bits in the useful information stream are fixed. These positions and dependency relationships can be computed once and for all and then applied for computation and positioning of the forced bits on each successive frame.
  • a second embodiment of the invention consists in applying the invention to a subset located downstream of the transmission chain consisting of blocks in series whose transfer functions are all invertible.
  • the portion of maximum length of the transmission chain for which the inversion of the bit stream can be satisfactorily realized is identified. For this we go back from the modulator output signal to the sequence of useful data to be transmitted.
  • the bitstream intended to produce modulated signals D (t), containing a dummy synchronization sequence is injected only at the input of this subset, ie at the output of the first noninvertible function of the transmission chain in the inverse order of the transmission functions (from the modulator - end of the chain - to the correction coder - start of the chain).
  • This second variant of the invention is for example applied if the transmission chain comprises an encryption device or cryptography whose function has by nature a non-determinable inverse.
  • the method according to the invention can be declined with dummy sequences (SYNC F ) exhibiting significant combinatorics and periodicities or slow variations, so as to maintain over time the combinatorial analysis and to penalize the identification capacity and storing the "interception" function of the deception interception and scrambling system.
  • SYNC F dummy sequences
  • the method according to the invention can be implemented from software elements.
  • Such software can be executed by the sending equipment so as to modify the useful binary sequence to be transmitted, which is for example produced by an application. It can also be executed by a computer connected to said transmitter for the purpose of setting it.
  • the method according to the invention may be available as a computer program product on a computer readable medium.
  • the support can be electronic, magnetic, optical, electromagnetic or be an infrared type of diffusion medium.
  • Such supports are, for example, Random Access Memory RAMs (ROMs), magnetic or optical tapes, disks or disks (Compact Disk - Read Only Memory (CD-ROM), Compact Disk-Read / Write (CD-R / W) and DVD).
  • the invention finds application for any communication system that it is desired to make more robust to interception and jamming, in particular, the invention applies to the retrofit of old generation communication systems thus becoming vulnerable to interceptors and modern jammers.

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Claims (18)

  1. Verfahren zum Ködern eines Abfang- (INT) und/oder Störsystems (BR), das darin besteht, in einem zu sendenden Signal, das Daten (DU,T) umfasst, die von einer Anwendung erzeugt wurden und zu einem Empfänger (REC) gesendet werden sollen, wenigstens eine Dummy-Synchronisationssequenz (SYNCF) zu erzeugen, um das System zu ködern und dabei die Synchronisation mit einem Empfänger des gesendeten Signals aufrechtzuerhalten, wobei das Verfahren die folgenden Schritte beinhaltet:
    - Definieren der Dummy-Synchronisationssequenz (SYNCF) sowie ihrer Zeit- und/oder Frequenzposition innerhalb des zu sendenden Signals, wobei sich die Werte der Symbole der Dummy-Sequenz und deren Zeit- und/oder Frequenzpositionen von denen der Symbole einer Synchronisationssequenz (SYNC) unterscheiden, die das Signal enthält;
    - Schätzen des Wertes und der Position der Dummy-Bits (BF), die in die Sequenz von Daten (DU,T) eingefügt werden sollen, die am Eingang der Sendekette oder eines Subteils der Sendekette gesendet werden sollen, um in der am Ausgang der Sendekette produzierten Sequenz den/die vordefinierte(n) Wert und Zeitposition der Symbole der Dummy-Synchronisationssequenz (SYNCF) zu erhalten;
    - Einfügen der Dummy-Bits (BF) in die Sequenz von Daten (DU,T) an den erhaltenen Positionen.
  2. Köderverfahren nach Anspruch 1, wobei, wenn die Transferfunktion F der Sendekette umkehrbar ist, der Wert und die Position der Dummy-Bits (BF) durch Bestimmen der umgekehrten Transferfunktion F-1 der Transferfunktion F und durch Anwenden der umgekehrten Transferfunktion F-1 auf die Dummy-Synchronisationssequenz (SYNCF) geschätzt werden.
  3. Köderverfahren nach Anspruch 2, wobei die umgekehrte Transferfunktion F-1 der Sendekette durch Bilden, in umgekehrter Reihenfolge, der umgekehrten Transferfunktionen der die Kette bildenden verschiedenen Blöcke bestimmt wird.
  4. Köderverfahren nach Anspruch 3, wobei die Sendekette wenigstens einen Leistungskorrekturcode k/n (402) umfasst, für den die Umkehr seiner Transferfunktion durch Auflösen des folgenden Gleichungssystems erfolgt: i 0 i k 1 = c p 1 c p d m 0 , p 1 m 0 , p 2 m 0 , p 3 m 0 , p d m k 1 , p 1 m k 1 , p 2 m k 1 , p 3 m k 1 , p d 1 ,
    Figure imgb0023
    wobei [CP1...CPd] die Symbole sind, deren Wert in der codierten Sequenz festgelegt ist, [io,...ik-1] die am Eingang des Code zu produzierende Sequenz ist und mi,pj die Koeffizienten der Generatormatrix des Code sind, wobei p1, p2,...pd der Satz der Positionen der Symbole sind, deren Wert in der codierten Sequenz festgelegt ist, wobei d eine ganze Zahl von höchstens gleich der Anzahl n von Symbolen der codierten Sequenz ist.
  5. Köderverfahren nach Anspruch 4, wobei der Korrekturcode ein linearer Blockcode oder ein Faltungscode oder ein Turbo-Code oder ein LDPC-(Low Density Parity Check)-Code ist.
  6. Köderverfahren nach einem der Ansprüche 3 bis 5, wobei die Sendekette ferner einen Verwürfler (403) und/oder einen Interleaver (404) und/oder ein Framing-Modul (405) und/oder einen binären Signalcodierer (406) und/oder einen Modulator (407) umfasst.
  7. Köderverfahren nach Anspruch 1, wobei, wenn die Transferfunktion F der Sendekette nicht-surjektiv ist, der Wert und die Position der Dummy-Bits geschätzt werden, indem die Eingangssequenz T' der Sendekette durchsucht wird, die ein Distanzkriterium zwischen der Sequenz F(T')(t), die am Ausgang der Sendekette erhalten wird, wenn die Sequenz T' effektiv am Eingang erzeugt wird, und der Dummy-Synchronisationssequenz (SYNCF) minimiert.
  8. Köderverfahren nach Anspruch 7, wobei das Distanzkriterium als gleich dem Integral, über eine gegebene Dauer, der Quadratnorm der Differenz zwischen der am Ausgang der Sendekette erhaltenen Sequenz F(T')(t) und der Dummy-Synchronisationssequenz (SYNCF) genommen wird.
  9. Köderverfahren nach Anspruch 7 oder 8, wobei das Suchen der Eingangssequenz T' der Sendekette, die das Distanzkriterium minimiert, an einem Teilsatz des Satzes von möglichen binären Sequenzen am Eingang der Sendekette erfolgt.
  10. Köderverfahren nach einem der vorherigen Ansprüche, wobei die Sequenz von Daten (DU,T) durch eine Anwendung (401) aus Audio-, Bild- oder Videocodierer produziert wird.
  11. Köderverfahren nach Anspruch 1, wobei, wenn die Transferfunktion F der Sendekette nicht-surjektiv ist, die Dummy-Bits (BF) in die am Eingang eines Subteils der Sendekette produzierte Sequenz eingefügt werden, deren Transferfunktion surjektiv ist und deren Ausgang mit dem Ausgang der Sendekette gemeinsam ist.
  12. Köderverfahren nach Anspruch 11, wobei die Sendekette ein Verschlüsselungsgerät umfasst und der Subteil der Sendekette dieses Gerät ausschließt.
  13. Köderverfahren nach einem der vorherigen Ansprüche, wobei die Dummy-Synchronisationssequenz (SYNCF) in einer nicht anfälligen Zeit- und/oder Frequenzposition des zu sendenden Signals positioniert ist.
  14. Köderverfahren nach Anspruch 13, wobei die nicht-anfällige Zone ein Teil des durch einen Korrekturcode geschützten Signals oder eine Blockierzone ist, die keine nützliche Information enthält.
  15. Köderverfahren nach einem der vorherigen Ansprüche, wobei, wenn das die Dummy-Synchronisationssequenz (SYNCF) umfassende Signal von dem Empfänger empfangen wird, die Dummy-Bits (BF) aus der Datensequenz (DU,T) entfernt werden.
  16. Vorrichtung zum Senden eines Signals, das eine Sendekette zum Umwandeln einer Sequenz von zu sendenden Daten (DU,T) in ein zu sendendes Signal und ein Mittel zum Ausführen der Schritte des Verfahrens nach einem der Ansprüche 1 bis 15 umfasst.
  17. Computerprogramm, das Befehle zum Ausführen der Schritte des Verfahrens nach einem der Ansprüche 1 bis 15 umfasst, wenn das Programm von einem Prozessor durchgeführt wird.
  18. Prozessorlesbares Aufzeichnungsmedium, auf dem ein Programm gespeichert ist, das Befehle zum Ausführen der Schritte des Verfahrens nach einem der Ansprüche 1 bis 15 umfasst, wenn das Programm von einem Prozessor durchgeführt wird.
EP13805372.3A 2012-12-19 2013-12-13 Verfahren zur anlockung eines systems zum abfangen und stören durch einfügen von dummy-synchronisationsmustern in das emittierte signal und emitter zur umsetzung des verfahrens Active EP2936715B1 (de)

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FR1203478A FR2999842B1 (fr) 2012-12-19 2012-12-19 Procede de leurrage d'un systeme d'interception et de brouillage par insertion de motifs de synchronisation factices dans le signal emis et emetteur mettant en oeuvre le procede
PCT/EP2013/076586 WO2014095651A1 (fr) 2012-12-19 2013-12-13 Procede de leurrage d' un systeme d' interception et de brouillage par insertion de motifs de synchronisation factices dans le signal emis et emetteur mettant en oeuvre le procede

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