EP2766739B1 - Procedure and device for detecting insulation faults in a low voltage network - Google Patents

Procedure and device for detecting insulation faults in a low voltage network Download PDF

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EP2766739B1
EP2766739B1 EP12780241.1A EP12780241A EP2766739B1 EP 2766739 B1 EP2766739 B1 EP 2766739B1 EP 12780241 A EP12780241 A EP 12780241A EP 2766739 B1 EP2766739 B1 EP 2766739B1
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Prior art keywords
voltage
partial discharge
group
signal
values
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German (de)
French (fr)
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EP2766739A1 (en
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Michel Gaeta
Jean-Marc ROQUELAURE
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/12Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • G01R31/1227Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
    • G01R31/1263Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation
    • G01R31/1272Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation of cable, line or wire insulation, e.g. using partial discharge measurements
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/12Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • G01R31/1227Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
    • G01R31/1263Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation

Definitions

  • the present invention relates to a device and a method for detecting, in an electrical network carrying a low-voltage alternating voltage, an insulation fault resulting in the appearance of partial discharge signals.
  • the present invention relates in particular to a device and a method for detecting a fire initiation.
  • partial discharges create pulsed electromagnetic disturbances, termed partial discharge signals, that can be detected.
  • the detection of partial discharge signals allows the implementation of countermeasures to prevent the ignition of surrounding materials.
  • the US Patent 6,172,862 describes a detection system comprising a sensor capable of measuring discharges of the order of a few picocoulombs and means for comparing them with a reference threshold.
  • the patent application US 2010/0073008 discloses a detection system comprising a filter configured to transmit high frequency partial discharge signals to a differential amplifier and to filter the low frequency voltage of the network.
  • the patent application US 2008/0309351 discloses a detection device comprising a first branch having a first impedance for partial discharge signals occurring in the line voltage, and a second branch having a second impedance lower than the first for the partial discharge signals occurring in the line voltage; so that the partial discharge signals are preferentially transmitted in the second branch.
  • the US Patent 5,835,321 discloses a detection device comprising a band pass filter and configured to detect a partial discharge current in a determined frequency band.
  • EP 0 639 879 A2 teaches electric arc detection by detecting changes in the cycle of an alternating current.
  • the alternating current is sampled with a notch filter during each of a plurality of cycles of the alternating current, to provide a plurality of currents In, m, where "n" is the phase and "m” is the cycle.
  • Absolute values of current difference signals are accumulated in a synchronous summer during the m cycles.
  • a signal indicative of the presence of an arc is generated in response to given conditions and taking into account combinations of conditions of the absolute cumulative current of the difference signals.
  • JP 2005 156452 refers to gas-insulated switchgear (GIS) devices using SF6-type gas as a means of isolating two high-voltage elements, and is intended to discriminate several types of partial discharges , internal and external, by means of a sensor or an antenna.
  • GIS gas-insulated switchgear
  • Embodiments of the invention relate to a detection device, in an electrical network carrying a low-voltage alternating voltage (Vac), of an insulation fault between a phase wire (P) and a neutral wire (N). ) resulting in the appearance of partial discharge signals (PDS), comprising means for detecting partial discharge signals by voltage analysis (Vac) or the current carried by the electrical network, and means for associating with each partial discharge signal detected a parameter indicative of the position of the partial discharge signal on the AC voltage curve, and to determine if there exists, between several partial discharge signals detected during cycles of variation different from the AC voltage, to minus an indicative correlation of an insulation fault, taking into account the parameter indicative of the position of the partial discharge signal on the alter voltage curve native.
  • Vac voltage analysis
  • N neutral wire
  • PDS partial discharge signals
  • the device is configured to define as a parameter indicative of the position of a partial discharge signal on the curve of the AC voltage, groups of voltage values of the AC voltage, and to associate with each signal of discharge detected a group of voltage values of the AC voltage.
  • the device is configured to identify each group of voltage values of the AC voltage by means of a time slot representing a fraction of the period of the AC voltage.
  • the device is configured to detect an insulation fault when a first number of partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to the same group of voltage values. of the alternating voltage.
  • the device is configured to detect an insulation fault when a first number of partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to a first group of voltage values of the alternating voltage, and a second number of partial discharge signals is then detected during a second number of successive cycles of the AC voltage in relation to a second group of voltage values of the AC voltage comprising voltage values lower than the values of the AC voltage. first group.
  • the partial discharge signal detection means comprise an acquisition circuit for extracting from the AC voltage a reference signal capable of containing partial discharge signals, a reference signal processing circuit, configured for, for each group of voltage values of the AC voltage: determining a current value of the amplitude of the reference signal, calculating an average value of the amplitude of the envelope reference signal from the current value of the the amplitude of the reference signal and M-1 preceding values of the amplitude of the reference signal measured during previous cycles of the AC voltage in relation to the group of voltage values of the AC voltage considered, to determine a threshold of detecting which is a function of the average value of the amplitude of the reference signal, and detecting a partial discharge signal if the current value of the amplitude of the reference signal is greater than the detection threshold.
  • the acquisition circuit comprises an integrator circuit receiving as input a filtered signal extracted from the AC voltage and supplying the reference signal.
  • the detection circuit is configured to digitize the reference signal for each group of voltage values of the AC voltage, and to provide a digital sample representative of the amplitude of the reference signal in relation to the group of voltage values of the considered AC voltage.
  • the detection circuit is configured to calculate the average value of the amplitude of the reference signal from a group of M digital samples comprising the digital sample representative of the current amplitude of the reference signal. and M-1 digital samples representative of the amplitude of the reference signal during previous cycles of the AC voltage in relation to the same group of voltage values of the AC voltage.
  • the detection circuit is configured to generate N-bit words in which each bit is associated with a group of voltage values of the AC voltage, and has a first value if a partial discharge signal has has been detected in relation to the group of voltage values of the AC voltage considered and a second logic value if a partial discharge signal has not been detected in relation to the group of voltage values considered.
  • Embodiments of the invention also relate to a method for detecting an insulation fault between a phase wire (P) and a neutral wire (N) in an electrical network carrying a low voltage alternating voltage (Vac). , comprising steps of detecting partial discharge signals by analysis of the voltage (Vac) or of the current carried by the electrical network, and steps of associating with each detected partial discharge signal a parameter indicative of the position of the signal of partial discharge on the curve of the AC voltage, and to determine if there exists, between several partial discharge signals detected during cycles of variation different from the AC voltage, at least one correlation indicative of an insulation fault, taking into account the parameter indicative of the position of the partial discharge signal on the curve of the AC voltage.
  • the method comprises the steps of defining as a parameter indicative of the position of a partial discharge signal on the AC voltage curve, groups of AC voltage voltage values, and associate with each detected discharge signal a group of voltage values of the AC voltage.
  • each group of voltage values of the AC voltage is identified by means of a time slot representing a fraction of the period of the AC voltage.
  • an isolation fault is detected when a first number of partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to the same group of voltage values of the AC voltage. .
  • an insulation fault is detected when a first number of first partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to a first group of voltage voltage values.
  • a second number of second partial discharge signals is then detected during a second number of successive cycles of the AC voltage in relation to a second group of voltage values of the AC voltage comprising voltage values lower than the values of the first one. group.
  • the figure 1 represents a DTC device according to the invention for detecting an insulation fault in an electrical network.
  • the DTC device is connected here to an electrical network comprising an N-neutral wire and a P-phase wire, and is configured here to detect fire initiation.
  • the network carries an alternating voltage Vac, for example a voltage of 240 V at a frequency of 50 Hz.
  • the DTC device comprises an acquisition circuit ACT, a processing circuit MC, a ZCTT circuit for zero crossing detection (“Zero Crossing Circuit”), and a PSCT power supply circuit.
  • the circuit ZCCT receives the voltage Vac and supplies a logic signal ZC having a determined variation front at each zero crossing of the voltage Vac, for example a rising edge (transition from 0 to 1).
  • the PSCT supply circuit also receives the voltage Vac and supplies a DC voltage Vdd to the processing circuit MC.
  • the acquisition circuit ACT extracts from the alternating voltage Vac a signal Ve3 capable of containing partial discharge signals.
  • the processing circuit MC analyzes the signal Ve3 to detect a fire initiation.
  • the acquisition circuit ACT comprises a coupler circuit CCT receiving the voltage Vac and supplying a signal Ve1, a bandpass circuit BPCT receiving the signal Ve1 and providing a signal Ve2, and an envelope extracting circuit EECT receiving the signal Ve2 and providing the signal Ve3.
  • the signals Ve1, Ve2, Ve3 are voltage signals here.
  • the coupler circuit CCT here comprises an isolation transformer comprising a primary coil L1 connected to the network and a secondary coil L2 providing the signal Ve1.
  • a capacitor C1 arranged in series with the primary coil L1 and a capacitor C2 arranged in series with the secondary coil L2 give the circuit CCT a high-pass filtering function to eliminate the 50 Hz component of the voltage Vac.
  • the partial fire-generating discharge signals have a broad spectrum of frequencies and are therefore likely to be detected in all frequency bands. However, some frequency bands are "polluted" by signals that may appear as partial discharge signals, including signals generated by the carrier current data transmission devices. In one embodiment of the invention, it is therefore preferred to reduce the signal analysis band Ve1 by means of the band-pass circuit BPCT, so as to eliminate carrier data transmission frequencies.
  • Another parameter dictating the choice of the bandwidth of the circuit BPCT is the duration of time slots described below. For example, the bandwidth of the BPCT circuit is 145 kHz to 1.7 MHz in Europe and 500 kHz to 1.7 MHz in the United States.
  • the EECT envelope extraction circuit is realized here in the form of a half-wave integrator circuit. It comprises a half-wave rectification diode D1 whose anode receives the signal Ve2. The cathode of the diode D1 is connected to ground via a capacitor C3 in parallel with a resistor R1, and supplies the signal Ve3 to the processing circuit MC.
  • the circuit R1C3 smooths the rectified signal Ve3, which corresponds to an integration of this signal.
  • the circuit R1C3 has a time constant RC which is less than the duration of time slots described below, for example equal to half this duration, ie 0.5 ms in relation to the example described below.
  • the signal Ve3 is a noisy signal capable of containing partial discharge signals.
  • the Figures 2A, 2B, 2C and 2D respectively represent the voltage Vac, the signal Ve1, the signal Ve2 and the signal Ve3. These signals are shown schematically for illustration only and their shape is arbitrary.
  • the signal Ve3 has a PDS peak forming a partial discharge signal.
  • the processing circuit MC analyzes the signal Ve3 to detect PDS partial discharge signals. It then performs a kind of "sorting" to differentiate the PDS signals that are representative of a fire initiation and those that are not. This sorting is performed by applying one or more correlation rules that take into account the position of the PDS signals on the curve of the AC voltage Vac.
  • the circuit MC defines time slots SLi ("time slots”), designated in the following “slots” ("slots”), in which it analyzes the signal Ve3.
  • These slots are synchronized to the alternating voltage Vac by means of the logic signal ZC, and each represents a fraction of a cycle of the voltage Vac. They are here of constant duration and equal to 1 / N times the period T of the voltage Vac, N being an integer representing the number of slots per period T.
  • Each slot SLi has a rank i determined relative to the zero crossing of the voltage Vac and thus corresponds to a group of voltage values of the alternating voltage Vac.
  • the signal Ve3 is here rectified semi-alternately by the envelope extraction circuit EECT, the processing circuit MC does not distinguish between the positive and negative half-waves of the voltage Vac.
  • the duration of the slots is here equal to 1 / N times the half-period T, ie 1 / 2N times the period T.
  • the parameter N is chosen equal to 10.
  • ten slots SL0 to SL9 are distinguished by half-period of the voltage Vac, the first slot SL0 being placed after the zero crossing of the voltage Vac, the last slot SL9 being placed before the next zero crossing of the voltage Vac.
  • Each slot SLi has a duration of 1 ms if the voltage Vac has a frequency of 50 Hz and a period T of 20 ms.
  • the processing circuit MC is here a microcontroller equipped with a sampling and digitizing input of the signal Ve3.
  • the signal processing Ve3 is therefore performed on digital samples Vi of this signal, represented on the figure 2E .
  • the sampling is carried out for example at a frequency of 100 kHz, ie 100 samples Vi, j of the signal per slot, where i is the rank of the slot considered and j the rank of the sample in the slot in question.
  • the microcontroller returns these 100 samples Vi, j to a single sample Vi per slot, for example by choosing as sample Vi the sample Vi, j having the highest value of the 100 samples Vi, j, or by calculating the average value 100 samples Vi, j.
  • PDS signal or "PDS partial discharge signal” denotes any signal having the profile of a "true” partial discharge signal but which may have an origin other than an insulation fault which may lead to an ignition failure. 'fire. It may be for example signals emitted by lighting systems or equipment connected to the network. The distinction between “true” and “false” partial discharge signals is made during the correlation phase.
  • the PDS signal detection phase is illustrated by the flowchart on the figure 3 and comprises steps E1 to E11.
  • step E1 the microcontroller is informed of the zero crossing of the alternating voltage Vac by changing the signal ZC to 1.
  • the microcontroller resets a count value CMP to 0. This value is constantly incremented by a counter of the microcontroller clocked by a clock signal (not represented on the figure 1 ). This count value allows the microcontroller to distinguish the different slots.
  • the microcontroller also sets to 0 the index i of the slots after zero crossing of the voltage Vac.
  • Steps E3 to E8 are repeated by the microcontroller for each slot SLi, starting with slot SL0.
  • the microcontroller samples and digitizes the signal Ve3 to take a sample Vi representative of the amplitude of the signal Ve3 in the slot considered SLi.
  • the sample Vi is determined as indicated above, by selecting the largest of the samples Vi, j or by calculating the average value of the samples Vi, j in the slot SLi.
  • step E4 the microcontroller calculates a mean value MVi of the signal Ve3 in the slot considered SLi, from M samples Vi.
  • M samples Vi comprise the current sample Vi which has just been taken and M-1 samples Vi taken in this same slot during previous cycles of the AC voltage Vac.
  • the current sample Vi is also stored in order to allow the microcontroller to recalculate the average value MVi at the next half-period of the voltage Vac.
  • the oldest of the M-1 samples is erased so as not to saturate the memory of the microcontroller.
  • the number M is for example equal to 1000, which involves storing 1000 samples Vi per slot or 10000 samples in total for the slots SL0 to SL9.
  • step E5 the microcontroller calculates the standard deviation Ei of the M samples used for calculating the average value.
  • step E7 the microcontroller determines whether the sample Vi is greater than the dynamic threshold Si. If so, the microcontroller considers that a partial discharge signal has been detected in the slot in question and sets a bit bi of rank i corresponding to the rank i of the slot considered SLi. If not, the microcontroller considers that a partial discharge signal has not been detected and sets the bit bi to 0.
  • the value K * Ei corresponds to an acceptable variation interval of the signal Ve3 relative to its mean value MVi in the slot considered.
  • a sample Vi having a value below the threshold MVi + K * Ei is not considered as representative of the presence of a PDS signal.
  • This range of variation allows the microcontroller not to be blinded by jumps in values of the samples Vi which are statistically acceptable and located on the central part of a Gaussian curve of the variations of the signal Ve3.
  • the coefficient K may be chosen equal to 3, which means that signal variations Ve3 less than 3 times the standard deviation Ei in the slot under consideration will not be considered as PDS signals.
  • Those skilled in the art will of course be able to retain other means of determining the acceptable range of variation, which are not based on a standard deviation calculation.
  • step E8 the microcontroller consults the count value CMP and determines whether it is greater than a number D corresponding to the duration of a slot. If not, the microcontroller repeats step E8 until the number D is reached.
  • the microcontroller then returns to step E1 to detect the zero crossing of voltage Vac and repeats steps E2 to E11, and so on.
  • FIG. 2E shows the value of the samples Vi in each slot SL0 to SL9 as well as the values of the dynamic detection thresholds S0 to S9 which are calculated by the microcontroller for each slot during each step E6. It appears that during the half-period 1 / 2T k-1, none of the calculated samples Vi has a value greater than the corresponding detection threshold Si.
  • the corresponding binary word W k-1 therefore comprises only bits with 0.
  • the sample V3 of the fourth slot SL3 has a value greater than the corresponding detection threshold S3.
  • the fourth bit b3 of the corresponding binary word W k is therefore equal to 1 while the other bits are at 0, the word W k thus being equal to 0001000000.
  • the embodiment of the method of the invention which has just been described has been presented in the form of a recursive flow diagram for the sake of simplification of the description.
  • This method may comprise in practice multitasking processing steps that are almost simultaneous.
  • the step E1 for detecting the zero crossing of the voltage Vac, the steps E2 and E10 for resetting the count value, and the step E8 for monitoring the count value can be executed in a loop during the duration of a slot and simultaneously with the execution of calculation steps E4 to E7.
  • the calculation steps E4 to E7 can be performed in deferred time if the sampling step E3 extends for the duration of the slot in question, in particular when the microcontroller takes 100 samples Vi, j per slot and determines the value of the sample Vi.
  • the fire detection detection phase which will now be described can be conducted simultaneously with the PDS signal detection phase, with an offset of half a period or more.
  • the microcontroller can simultaneously execute the detection phase of a fire initiation based on the detected PDS signals. during the previous half-periods.
  • the search for a correlation representative of a fire initiation between the different detected PDS signals is made taking into account their position on the curve of the AC voltage Vac, here taking into account the slots SLi in which they were detected.
  • the microcontroller has one or more correlation rules COR1, COR2, COR3, ... determined by tests and experiments. An alert is triggered when at least one of these correlation rules is satisfied.
  • the microcontroller implements a countermeasure to prevent a fire. For example, as shown on the figure 1 , the microcontroller can provide a warning signal SA that opens SWi switches through which the AC voltage Vac is applied to the network.
  • Example 1 - Rule COR1 An alert is triggered if a number N1 of successive PDS signals has been detected in the same slot SLi during successive cycles of the voltage Vac.
  • Example 2 - Rule COR2 a number N1 of PDS signals has been detected in the same slot SLi, during P1 successive half-periods of the voltage Vac. An alert is triggered if N1> 0.5 P1.
  • Example 3 - Rule COR3 a number N1 of PDS signals has been detected in a slot SLi corresponding to a first voltage value of the AC voltage Vac, during P1 successive half-periods, then a number N2 of PDS signals has been detected in another slot SLi 'corresponding to a second voltage value of the AC voltage Vac lower than the first voltage value, for P2 half-periods successive following the P1 first half-periods. An alarm is triggered if N1> 0.5 P1 and N2> 0.5 P2.
  • the rule COR3 is based on the assumption that repetitive but not necessarily successive appearances of PDS signals in a first slot and then in a second slot corresponding to a lower value of the voltage Vac, is representative of a fire initiation. Indeed, a fire initiation results in a gradual destruction of the insulating sheaths and therefore a decrease in their dielectric constant at the point of breakdown. The amplitude of the voltage Vac at which the partial discharges occur therefore tends to decrease as the insulation deteriorates.
  • the warning thresholds are N1> 2 and N2> 2.
  • the correlation criteria involved in the COR2 and COR3 rules can be made more stringent by providing that the PDS signals are successive and not simply repetitive, which means that P1 must be equal to N1 in the rule COR2, which then becomes similar to the rule COR1, and to impose that P1 is equal to N1 and P2 equal to N2 in the rule COR2.
  • the acquisition circuit ACT is made differently and is for example based on a current detection.
  • the rank i of the slots is determined relative to another voltage value of the voltage Vac, for example its peak value.
  • the search for a correlation between the PDS signals is provided by an external calculation circuit receiving the binary words Wk provided by the microcontroller.
  • the processing circuit MC instead of being a microcontroller, comprises an analog processing chain configured to detect the PDS signals and provide, whenever a PDS signal is detected, a signal analog whose value or amplitude is representative of the time elapsed between the time when the PDS signal was detected and the time when the voltage Vac is passed to zero (or other reference value).
  • the notion of Time slot is implicit in determining a correlation between the PDS signals, since the amplitude of the voltage Vac is directly a function of the time after each zero crossing.
  • the zero crossing detection circuit ZCCT is replaced by a measurement circuit VMCT1 configured to measure the voltage Vac and define groups VGi of values of the voltage Vac, for example 25 groups of values VG0. at VG24 with a range of 20V each, as shown below: vg0 VG1 ... VG11 VG12 VG13 VG14 ... VG23 VG24 0-20 20-40 ... 200-220 220-240 240-220 220-200 ... 40-20 20-0
  • Information corresponding to the groups of voltage values is supplied to the processing circuit MC in real time.
  • the processing circuit searches for a correlation between the PDS signals by using these groups of values in place of the time slots.
  • the groups of voltage values of the voltage Vac could also have a variable voltage increment, for example 20V up to 100V, 10V between 100 and 200V and 5V between 200 and 240V.
  • the previously described time slots could have a variable time increment.
  • the zero crossing detection circuit ZCCT is replaced by a measuring circuit VMCT2 configured to measure the voltage Vac and supply in real time to the processing circuit MC a parameter indicative of the value of the voltage.
  • Vac for example a binary signal coded on several bits.
  • the processing circuit associates with each detected PDS signal the received parameter parameter at the moment when the PDS signal has been detected, this parameter then forming a parameter indicative of the position of the PDS signal on the curve of the voltage Vac.
  • the processing circuit seeks a correlation between the PDS signals using this indicative parameter instead of groups of voltage values of the voltage Vac or time slots.
  • time slots groups of voltage values of the AC voltage Vac or parameter indicative of the position of a PDS signal on the curve of the AC voltage Vac are considered equivalent. If the voltage Vac is sinusoidal, time slots of fixed duration correspond to groups of voltage values of the voltage Vac of variable extent, and groups of voltage values of the voltage Vac of fixed range correspond to time slots. variable duration.
  • the present invention is also susceptible of various applications.
  • identical transient phenomena can be observed in a photovoltaic panel installation comprising diodes having an insulation fault.
  • a detection method according to the invention also applies to this type of electrical network and can allow an improvement in the maintenance of energy production facilities.
  • the correlation rules specific to this type of insulation fault are defined, always in relation to the position of the partial discharge pulses on the curve of the AC voltage conveyed by the monitored network.

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Description

La présente invention concerne un dispositif et un procédé de détection, dans un réseau électrique véhiculant une tension alternative basse tension, d'un défaut d'isolement se traduisant par l'apparition de signaux de décharge partielle. La présente invention concerne notamment un dispositif et un procédé de détection d'un amorçage d'incendie.The present invention relates to a device and a method for detecting, in an electrical network carrying a low-voltage alternating voltage, an insulation fault resulting in the appearance of partial discharge signals. The present invention relates in particular to a device and a method for detecting a fire initiation.

Il est connu qu'un amorçage d'incendie dans une ligne électrique se traduit par l'apparition préalable de décharges partielles qui sont le signe d'un défaut d'isolation de la ligne électrique. Ces décharges partielles conduisent à l'inflammation de matériaux environnants sans que les dispositifs de sécurité classiques ne puissent entrer en action. Un disjoncteur différentiel est en effet inopérant à ce stade du défaut car aucune fuite à la terre n'est encore détectable. De même, un disjoncteur de puissance n'est pas affecté car les puissances mises en jeu restent modestes bien que les énergies d'amorçage soient élevées.It is known that a fire initiation in a power line results in the prior appearance of partial discharges which are the sign of a lack of insulation of the power line. These partial discharges lead to the ignition of surrounding materials without conventional safety devices being able to operate. A differential circuit breaker is indeed inoperative at this stage of the fault because no leakage to the ground is still detectable. Similarly, a power circuit breaker is not affected because the powers involved remain modest although the ignition energies are high.

De telles décharges partielles créent des perturbations électromagnétiques impulsionnelles, appelées signaux de décharge partielle, qui peuvent être détectées. La détection des signaux de décharge partielle permet la mise en oeuvre de contre-mesures permettant d'éviter l'inflammation des matériaux environnants.Such partial discharges create pulsed electromagnetic disturbances, termed partial discharge signals, that can be detected. The detection of partial discharge signals allows the implementation of countermeasures to prevent the ignition of surrounding materials.

Des procédés ou dispositifs de détection de signaux de décharge partielle ont déjà été proposés. Le brevet US 6,172,862 décrit un système de détection comprenant un capteur capable de mesurer des décharges de l'ordre de quelques picocoulombs et des moyens pour les comparer à un seuil de référence. La demande de brevet US 2010/0073008 décrit un système de détection comprenant un filtre configuré pour transmettre à un amplificateur différentiel des signaux de décharge partielle haute fréquence et filtrer la tension basse fréquence du réseau. La demande de brevet US 2008/0309351 décrit un dispositif de détection comprenant une première branche présentant une première impédance pour des signaux de décharge partielle apparaissant dans la tension réseau, et une seconde branche présentant une seconde impédance inférieure à la première pour les signaux de décharge partielle apparaissant dans la tension réseau, de sorte que les signaux de décharge partielle sont transmis préférentiellement dans la seconde branche. Le brevet US 5,835,321 décrit un dispositif de détection comprenant un filtre passe bande et configuré pour détecter un courant de décharge partielle dans une bande de fréquence déterminée.Methods or devices for detecting partial discharge signals have already been proposed. The US Patent 6,172,862 describes a detection system comprising a sensor capable of measuring discharges of the order of a few picocoulombs and means for comparing them with a reference threshold. The patent application US 2010/0073008 discloses a detection system comprising a filter configured to transmit high frequency partial discharge signals to a differential amplifier and to filter the low frequency voltage of the network. The patent application US 2008/0309351 discloses a detection device comprising a first branch having a first impedance for partial discharge signals occurring in the line voltage, and a second branch having a second impedance lower than the first for the partial discharge signals occurring in the line voltage; so that the partial discharge signals are preferentially transmitted in the second branch. The US Patent 5,835,321 discloses a detection device comprising a band pass filter and configured to detect a partial discharge current in a determined frequency band.

Par ailleurs, EP 0 639 879 A2 enseigne une détection d'arc électrique par détection de changements du cycle d'un courant alternatif. Le courant alternatif est échantillonné avec un filtre coupe-bande au cours de chacune d'une pluralité de cycles du courant alternatif, pour fournir une pluralité de courants In, m, où "n" est la phase et "m" le cycle. Des valeurs absolues de signaux de différence de courant sont accumulées dans un sommateur synchrone au cours des m cycles. Un signal indicatif de la présence d'un arc est généré en réponse à des conditions données et compte tenu des combinaisons de conditions du courant cumulé absolue des signaux de différence.Otherwise, EP 0 639 879 A2 teaches electric arc detection by detecting changes in the cycle of an alternating current. The alternating current is sampled with a notch filter during each of a plurality of cycles of the alternating current, to provide a plurality of currents In, m, where "n" is the phase and "m" is the cycle. Absolute values of current difference signals are accumulated in a synchronous summer during the m cycles. A signal indicative of the presence of an arc is generated in response to given conditions and taking into account combinations of conditions of the absolute cumulative current of the difference signals.

JP 2005 156452 se rapporte à des dispositifs d'isolation haute tension à gaz ou "GIS" (Gas Insulated Switchgear) utilisant un gaz de type SF6 comme moyen d'isolation de deux éléments soumis à une haute tension, et vise à discriminer plusieurs types de décharges partielles, internes et externes, au moyen d'un capteur ou d'une antenne. JP 2005 156452 refers to gas-insulated switchgear (GIS) devices using SF6-type gas as a means of isolating two high-voltage elements, and is intended to discriminate several types of partial discharges , internal and external, by means of a sensor or an antenna.

Il existe donc divers méthodes connues pour la détection de signaux de décharge partielle, avec ou sans filtrage, par détection de courant ou de tension, à seuil variable, etc. Ces diverses méthodes visent généralement à distinguer les "faux" signaux de décharge partielle, qui ne sont pas liés à un défaut d'isolement, des "vrais" signaux de décharge partielle, afin d'éviter les fausses alertes. En effet, divers signaux parasites pouvant apparaître sur le réseau ne sont pas dus à un défaut d'isolation entraînant un amorçage d'incendie ou autre dysfonctionnement à détecter, et sont seulement provoqués par des appareillages ou des éclairages connectés au réseau, tels des éclairages au néon. Les méthodes basées sur une analyse en fréquence des signaux de décharge partielle et/ou sur une détermination fine de seuils de détection s'avèrent parfois inefficaces pour la différentiation des vrais et des faux signaux de décharge partielle.There are therefore various known methods for the detection of partial discharge signals, with or without filtering, by current or voltage detection, variable threshold, etc. These various methods generally aim at distinguishing "false" partial discharge signals, which are not related to an insulation fault, from "true" partial discharge signals, in order to avoid false alarms. Indeed, various spurious signals that may appear on the network are not due to an insulation fault resulting in fire initiation or other malfunction to be detected, and are only caused by devices or lighting connected to the network, such as lighting neon. Methods based on frequency analysis of partial discharge signals and / or fine determination of detection thresholds are sometimes ineffective in differentiating true and false partial discharge signals.

Il peut donc être souhaité de prévoir un procédé et un dispositif de détection d'un défaut d'isolement qui offre une meilleure fiabilité de détection.It may therefore be desirable to provide a method and a device for detecting an insulation fault which offers a better detection reliability.

Des modes de réalisation de l'invention concernent un dispositif de détection, dans un réseau électrique véhiculant une tension alternative basse tension (Vac), d'un défaut d'isolement entre un fil de phase (P) et un fil de neutre (N) se traduisant par l'apparition de signaux de décharge partielle (PDS), comprenant des moyens de détection de signaux de décharge partielle par analyse de la tension (Vac) ou du courant véhiculé par le réseau électrique, et des moyens pour associer à chaque signal de décharge partielle détecté un paramètre indicatif de la position du signal de décharge partielle sur la courbe de la tension alternative, et rechercher s'il existe, entre plusieurs signaux de décharge partielle détectés pendant des cycles de variation différents de la tension alternative, au moins une corrélation indicative d'un défaut d'isolement, en tenant compte du paramètre indicatif de la position du signal de décharge partielle sur la courbe de la tension alternative.Embodiments of the invention relate to a detection device, in an electrical network carrying a low-voltage alternating voltage (Vac), of an insulation fault between a phase wire (P) and a neutral wire (N). ) resulting in the appearance of partial discharge signals (PDS), comprising means for detecting partial discharge signals by voltage analysis (Vac) or the current carried by the electrical network, and means for associating with each partial discharge signal detected a parameter indicative of the position of the partial discharge signal on the AC voltage curve, and to determine if there exists, between several partial discharge signals detected during cycles of variation different from the AC voltage, to minus an indicative correlation of an insulation fault, taking into account the parameter indicative of the position of the partial discharge signal on the alter voltage curve native.

Selon un mode de réalisation, le dispositif est configuré pour définir comme paramètre indicatif de la position d'un signal de décharge partielle sur la courbe de la tension alternative, des groupes de valeurs de tension de la tension alternative, et associer à chaque signal de décharge détecté un groupe de valeurs de tension de la tension alternative.According to one embodiment, the device is configured to define as a parameter indicative of the position of a partial discharge signal on the curve of the AC voltage, groups of voltage values of the AC voltage, and to associate with each signal of discharge detected a group of voltage values of the AC voltage.

Selon un mode de réalisation, le dispositif est configuré pour identifier chaque groupe de valeurs de tension de la tension alternative au moyen d'un créneau temporel représentant une fraction de la période de la tension alternative.According to one embodiment, the device is configured to identify each group of voltage values of the AC voltage by means of a time slot representing a fraction of the period of the AC voltage.

Selon un mode de réalisation, le dispositif est configuré pour détecter un défaut d'isolement lorsqu'un premier nombre de signaux de décharge partielle est détecté pendant un premier nombre de cycles successifs de la tension alternative en relation avec un même groupe de valeurs de tension de la tension alternative.According to one embodiment, the device is configured to detect an insulation fault when a first number of partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to the same group of voltage values. of the alternating voltage.

Selon un mode de réalisation, le dispositif est configuré pour détecter un défaut d'isolement lorsque un premier nombre de signaux de décharge partielle est détecté pendant un premier nombre de cycles successifs de la tension alternative en relation avec un premier groupe de valeurs de tension de la tension alternative, et un second nombre de signaux de décharge partielle est ensuite détecté pendant un second nombre de cycles successifs de la tension alternative en relation avec un second groupe de valeurs de tension de la tension alternative comprenant des valeurs de tension inférieures aux valeurs du premier groupe.According to one embodiment, the device is configured to detect an insulation fault when a first number of partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to a first group of voltage values of the alternating voltage, and a second number of partial discharge signals is then detected during a second number of successive cycles of the AC voltage in relation to a second group of voltage values of the AC voltage comprising voltage values lower than the values of the AC voltage. first group.

Selon un mode de réalisation, les moyens de détection de signaux de décharge partielle comprennent un circuit d'acquisition pour extraire de la tension alternative un signal de référence susceptible de contenir des signaux de décharge partielle, un circuit de traitement du signal de référence, configuré pour, pour chaque groupe de valeurs de tension de la tension alternative: déterminer une valeur actuelle de l'amplitude du signal de référence, calculer une valeur moyenne de l'amplitude du signal de référence d'enveloppe à partir de la valeur actuelle de l'amplitude du signal de référence et de M-1 valeurs précédentes de l'amplitude du signal de référence mesurées au cours de cycles précédents de la tension alternative en relation avec le groupe de valeurs de tension de la tension alternative considéré, déterminer un seuil de détection qui est fonction de la valeur moyenne de l'amplitude du signal de référence, et détecter un signal de décharge partielle si la valeur actuelle de l'amplitude du signal de référence est supérieure au seuil de détection.According to one embodiment, the partial discharge signal detection means comprise an acquisition circuit for extracting from the AC voltage a reference signal capable of containing partial discharge signals, a reference signal processing circuit, configured for, for each group of voltage values of the AC voltage: determining a current value of the amplitude of the reference signal, calculating an average value of the amplitude of the envelope reference signal from the current value of the the amplitude of the reference signal and M-1 preceding values of the amplitude of the reference signal measured during previous cycles of the AC voltage in relation to the group of voltage values of the AC voltage considered, to determine a threshold of detecting which is a function of the average value of the amplitude of the reference signal, and detecting a partial discharge signal if the current value of the amplitude of the reference signal is greater than the detection threshold.

Selon un mode de réalisation, le circuit d'acquisition comprend un circuit intégrateur recevant en entrée un signal filtré extrait de la tension alternative et fournissant le signal de référence.According to one embodiment, the acquisition circuit comprises an integrator circuit receiving as input a filtered signal extracted from the AC voltage and supplying the reference signal.

Selon un mode de réalisation, le circuit de détection est configuré pour numériser le signal de référence pour chaque groupe de valeurs de tension de la tension alternative, et fournir un échantillon numérique représentatif de l'amplitude du signal de référence en relation avec le groupe de valeurs de tension de la tension alternative considéré.According to one embodiment, the detection circuit is configured to digitize the reference signal for each group of voltage values of the AC voltage, and to provide a digital sample representative of the amplitude of the reference signal in relation to the group of voltage values of the considered AC voltage.

Selon un mode de réalisation, le circuit de détection est configuré pour calculer la valeur moyenne de l'amplitude du signal de référence à partir d'un groupe de M échantillons numériques comprenant l'échantillon numérique représentatif de l'amplitude actuelle du signal de référence et M-1 échantillons numériques représentatifs de l'amplitude du signal de référence au cours de cycles précédents de la tension alternative en relation avec le même groupe de valeurs de tension de la tension alternative.According to one embodiment, the detection circuit is configured to calculate the average value of the amplitude of the reference signal from a group of M digital samples comprising the digital sample representative of the current amplitude of the reference signal. and M-1 digital samples representative of the amplitude of the reference signal during previous cycles of the AC voltage in relation to the same group of voltage values of the AC voltage.

Selon un mode de réalisation, le circuit de détection est configuré pour générer des mots binaires de N bits dans lesquels chaque bit est associé à un groupe de valeurs de tension de la tension alternative, et présente une première valeur si un signal de décharge partielle a été détecté en relation avec le groupe de valeurs de tension de la tension alternative considéré et une second valeur logique si un signal de décharge partielle n'a pas été détecté en relation avec le groupe de valeurs de tension considéré.According to one embodiment, the detection circuit is configured to generate N-bit words in which each bit is associated with a group of voltage values of the AC voltage, and has a first value if a partial discharge signal has has been detected in relation to the group of voltage values of the AC voltage considered and a second logic value if a partial discharge signal has not been detected in relation to the group of voltage values considered.

Des modes de réalisation de l'invention concernent également un procédé de détection d'un défaut d'isolement entre un fil de phase (P) et un fil de neutre (N) dans un réseau électrique véhiculant une tension alternative (Vac) basse tension, comprenant des étapes de détection de signaux de décharge partielle par analyse de la tension (Vac) ou du courant véhiculé par le réseau électrique, et des étapes consistant à associer à chaque signal de décharge partielle détecté un paramètre indicatif de la position du signal de décharge partielle sur la courbe de la tension alternative, et rechercher s'il existe, entre plusieurs signaux de décharge partielle détectés pendant des cycles de variation différents de la tension alternative, au moins une corrélation indicative d'un défaut d'isolement, en tenant compte du paramètre indicatif de la position du signal de décharge partielle sur la courbe de la tension alternative.Embodiments of the invention also relate to a method for detecting an insulation fault between a phase wire (P) and a neutral wire (N) in an electrical network carrying a low voltage alternating voltage (Vac). , comprising steps of detecting partial discharge signals by analysis of the voltage (Vac) or of the current carried by the electrical network, and steps of associating with each detected partial discharge signal a parameter indicative of the position of the signal of partial discharge on the curve of the AC voltage, and to determine if there exists, between several partial discharge signals detected during cycles of variation different from the AC voltage, at least one correlation indicative of an insulation fault, taking into account the parameter indicative of the position of the partial discharge signal on the curve of the AC voltage.

Selon un mode de réalisation, le procédé comprend les étapes consistant à définir comme paramètre indicatif de la position d'un signal de décharge partielle sur la courbe de la tension alternative, des groupes de valeurs de tension de la tension alternative, et associer à chaque signal de décharge détecté un groupe de valeurs de tension de la tension alternative.According to one embodiment, the method comprises the steps of defining as a parameter indicative of the position of a partial discharge signal on the AC voltage curve, groups of AC voltage voltage values, and associate with each detected discharge signal a group of voltage values of the AC voltage.

Selon un mode de réalisation, chaque groupe de valeurs de tension de la tension alternative est identifié au moyen d'un créneau temporel représentant une fraction de la période de la tension alternative.According to one embodiment, each group of voltage values of the AC voltage is identified by means of a time slot representing a fraction of the period of the AC voltage.

Selon un mode de réalisation, un défaut d'isolement est détecté lorsqu'un premier nombre de signaux de décharge partielle est détecté pendant un premier nombre de cycles successifs de la tension alternative en relation avec le même groupe de valeurs de tension de la tension alternative.According to one embodiment, an isolation fault is detected when a first number of partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to the same group of voltage values of the AC voltage. .

Selon un mode de réalisation, un défaut d'isolement est détecté lorsqu'un premier nombre de premiers signaux de décharge partielle est détecté pendant un premier nombre de cycles successifs de la tension alternative en relation avec un premier groupe de valeurs de tension de la tension alternative, et un second nombre de seconds signaux de décharge partielle est ensuite détecté pendant un second nombre de cycles successifs de la tension alternative en relation avec un second groupe de valeurs de tension de la tension alternative comprenant des valeurs de tension inférieures aux valeurs du premier groupe.According to one embodiment, an insulation fault is detected when a first number of first partial discharge signals is detected during a first number of successive cycles of the AC voltage in relation to a first group of voltage voltage values. alternative, and a second number of second partial discharge signals is then detected during a second number of successive cycles of the AC voltage in relation to a second group of voltage values of the AC voltage comprising voltage values lower than the values of the first one. group.

Des modes de réalisation de réalisation de l'invention seront décrits dans ce qui suit à titre non limitatif, en relation avec les figures jointes dans lesquelles :

  • la figure 1 représente un exemple de réalisation d'un dispositif selon l'invention de détection d'un défaut d'isolement dans un réseau électrique,
  • les figures 2A à 2F représentent des signaux apparaissant dans le dispositif de la figure 1, et
  • la figure 3 représente des étapes d'un procédé de détection d'un défaut d'isolement mis en oeuvre au moyen du dispositif de la figure 1.
Embodiments of the invention will be described in the following nonlimitingly, in connection with the attached figures in which:
  • the figure 1 represents an exemplary embodiment of a device according to the invention for detecting an insulation fault in an electrical network,
  • the Figures 2A to 2F represent signals appearing in the device of the figure 1 , and
  • the figure 3 represents steps of a method for detecting an insulation fault implemented by means of the device of the figure 1 .

La figure 1 représente un dispositif DTC selon l'invention de détection d'un défaut d'isolement dans un réseau électrique. Le dispositif DTC est connecté ici à un réseau électrique comprenant un fil de neutre N et un fil de phase P, et est configuré ici pour détecter un amorçage d'incendie. Le réseau véhicule une tension alternative Vac, par exemple une tension de 240 V d'une fréquence de 50 Hz.The figure 1 represents a DTC device according to the invention for detecting an insulation fault in an electrical network. The DTC device is connected here to an electrical network comprising an N-neutral wire and a P-phase wire, and is configured here to detect fire initiation. The network carries an alternating voltage Vac, for example a voltage of 240 V at a frequency of 50 Hz.

Le dispositif DTC comprend un circuit d'acquisition ACT, un circuit de traitement MC, un circuit ZCTT de détection de passage à zéro ("Zero Crossing Circuit"), et un circuit d'alimentation électrique PSCT.The DTC device comprises an acquisition circuit ACT, a processing circuit MC, a ZCTT circuit for zero crossing detection ("Zero Crossing Circuit"), and a PSCT power supply circuit.

Le circuit ZCCT reçoit la tension Vac et fournit un signal logique ZC présentant un front de variation déterminé à chaque passage à zéro de la tension Vac, par exemple un front montant (passage de 0 à 1). Le circuit d'alimentation PSCT reçoit également la tension Vac et fournit une tension continue Vdd au circuit de traitement MC. Le circuit d'acquisition ACT extrait de la tension alternative Vac un signal Ve3 susceptible de contenir des signaux de décharge partielle. Le circuit de traitement MC analyse le signal Ve3 pour détecter un amorçage d'incendie.The circuit ZCCT receives the voltage Vac and supplies a logic signal ZC having a determined variation front at each zero crossing of the voltage Vac, for example a rising edge (transition from 0 to 1). The PSCT supply circuit also receives the voltage Vac and supplies a DC voltage Vdd to the processing circuit MC. The acquisition circuit ACT extracts from the alternating voltage Vac a signal Ve3 capable of containing partial discharge signals. The processing circuit MC analyzes the signal Ve3 to detect a fire initiation.

Le circuit d'acquisition ACT comprend un circuit coupleur CCT recevant la tension Vac et fournissant un signal Ve1, un circuit passe bande BPCT recevant le signal Ve1 et fournissant un signal Ve2, et un circuit d'extraction d'enveloppe EECT recevant le signal Ve2 et fournissant le signal Ve3. Les signaux Ve1, Ve2, Ve3 sont ici des signaux en tension.The acquisition circuit ACT comprises a coupler circuit CCT receiving the voltage Vac and supplying a signal Ve1, a bandpass circuit BPCT receiving the signal Ve1 and providing a signal Ve2, and an envelope extracting circuit EECT receiving the signal Ve2 and providing the signal Ve3. The signals Ve1, Ve2, Ve3 are voltage signals here.

Le circuit coupleur CCT comprend ici un transformateur d'isolement comportant une bobine primaire L1 connectée au réseau et une bobine secondaire L2 fournissant le signal Ve1. Un condensateur C1 agencé en série avec la bobine primaire L1 et un condensateur C2 agencé en série avec la bobine secondaire L2 confèrent au circuit CCT une fonction de filtrage passe-haut permettant d'éliminer la composante 50 Hz de la tension Vac.The coupler circuit CCT here comprises an isolation transformer comprising a primary coil L1 connected to the network and a secondary coil L2 providing the signal Ve1. A capacitor C1 arranged in series with the primary coil L1 and a capacitor C2 arranged in series with the secondary coil L2 give the circuit CCT a high-pass filtering function to eliminate the 50 Hz component of the voltage Vac.

Les signaux de décharge partielle générateurs d'incendie présentent un large spectre de fréquences et sont donc susceptibles d'être détectés dans toutes bandes de fréquences. Toutefois, certaines bandes de fréquences sont "polluées" par des signaux pouvant avoir l'apparence de signaux de décharge partielle, notamment des signaux générés par les dispositifs de transmission de données à courant porteur. Dans un mode de réalisation de l'invention, on préfère donc réduire la bande d'analyse du signal Ve1 au moyen du circuit passe-bande BPCT, de manière à éliminer des fréquences de transmission de données par courants porteurs. Un autre paramètre dictant le choix de la bande passante du circuit BPCT est la durée de créneaux temporels décrits plus loin. A titre d'exemple, la bande passante du circuit BPCT est de 145 kHz à 1,7 Mhz en Europe et de 500 kHz à 1,7 Mhz aux États-Unis.The partial fire-generating discharge signals have a broad spectrum of frequencies and are therefore likely to be detected in all frequency bands. However, some frequency bands are "polluted" by signals that may appear as partial discharge signals, including signals generated by the carrier current data transmission devices. In one embodiment of the invention, it is therefore preferred to reduce the signal analysis band Ve1 by means of the band-pass circuit BPCT, so as to eliminate carrier data transmission frequencies. Another parameter dictating the choice of the bandwidth of the circuit BPCT is the duration of time slots described below. For example, the bandwidth of the BPCT circuit is 145 kHz to 1.7 MHz in Europe and 500 kHz to 1.7 MHz in the United States.

Le circuit d'extraction d'enveloppe EECT est réalisé ici sous la forme d'un circuit intégrateur semi-alternance. Il comprend une diode de redressement semi-alternance D1 dont l'anode reçoit le signal Ve2. La cathode de la diode D1 est reliée à la masse par l'intermédiaire d'un condensateur C3 en parallèle avec une résistance R1, et fournit le signal Ve3 au circuit de traitement MC. Le circuit R1C3 assure le lissage du signal redressé Ve3, ce qui correspond à une intégration de ce signal. Le circuit R1C3 présente une constante de temps RC qui est inférieure à la durée de créneaux temporels décrits plus loin, par exemple égale à la moitié de cette durée, soit 0,5 ms en relation avec l'exemple décrit plus loin. Le signal Ve3 est un signal bruité susceptible de contenir des signaux de décharge partielle.The EECT envelope extraction circuit is realized here in the form of a half-wave integrator circuit. It comprises a half-wave rectification diode D1 whose anode receives the signal Ve2. The cathode of the diode D1 is connected to ground via a capacitor C3 in parallel with a resistor R1, and supplies the signal Ve3 to the processing circuit MC. The circuit R1C3 smooths the rectified signal Ve3, which corresponds to an integration of this signal. The circuit R1C3 has a time constant RC which is less than the duration of time slots described below, for example equal to half this duration, ie 0.5 ms in relation to the example described below. The signal Ve3 is a noisy signal capable of containing partial discharge signals.

Les figures 2A, 2B, 2C et 2D représentent respectivement la tension Vac, le signal Ve1, le signal Ve2 et le signal Ve3. Ces signaux sont représentés schématiquement à titre d'illustration uniquement et leur forme est arbitraire. Le signal Ve3 présente un pic PDS formant un signal de décharge partielle.The Figures 2A, 2B, 2C and 2D respectively represent the voltage Vac, the signal Ve1, the signal Ve2 and the signal Ve3. These signals are shown schematically for illustration only and their shape is arbitrary. The signal Ve3 has a PDS peak forming a partial discharge signal.

Le circuit de traitement MC analyse le signal Ve3 pour y détecter des signaux de décharge partielle PDS. Il réalise ensuite une sorte de "tri" pour différentier les signaux PDS qui sont représentatifs d'un amorçage d'incendie et ceux qui ne le sont pas. Ce tri est réalisé en appliquant une ou plusieurs règles de corrélation qui tiennent compte de la position des signaux PDS sur la courbe de la tension alternative Vac.The processing circuit MC analyzes the signal Ve3 to detect PDS partial discharge signals. It then performs a kind of "sorting" to differentiate the PDS signals that are representative of a fire initiation and those that are not. This sorting is performed by applying one or more correlation rules that take into account the position of the PDS signals on the curve of the AC voltage Vac.

A cet effet, le circuit MC définit des créneaux temporels SLi ("time slots"), désignés dans ce qui suit "créneaux" ("slots"), dans lesquels il analyse le signal Ve3. Ces créneaux sont synchronisés à la tension alternative Vac au moyen du signal logique ZC, et représentent chacune une fraction d'un cycle de la tension Vac. Ils sont ici de durée constante et égale à 1/N fois la période T de la tension Vac, N étant un entier représentant le nombre de créneaux par période T. Chaque créneau SLi présente un rang i déterminé relativement au passage à zéro de la tension Vac et correspond ainsi à un groupe de valeurs de tension de la tension alternative Vac.For this purpose, the circuit MC defines time slots SLi ("time slots"), designated in the following "slots" ("slots"), in which it analyzes the signal Ve3. These slots are synchronized to the alternating voltage Vac by means of the logic signal ZC, and each represents a fraction of a cycle of the voltage Vac. They are here of constant duration and equal to 1 / N times the period T of the voltage Vac, N being an integer representing the number of slots per period T. Each slot SLi has a rank i determined relative to the zero crossing of the voltage Vac and thus corresponds to a group of voltage values of the alternating voltage Vac.

Le signal Ve3 étant ici redressé en semi-alternance par le circuit d'extraction d'enveloppe EECT, le circuit de traitement MC ne fait pas la distinction entre les alternances positives et négatives de la tension Vac. La durée des créneaux est donc ici égale à 1/N fois la demi-période T, soit 1/2N fois la période T.The signal Ve3 is here rectified semi-alternately by the envelope extraction circuit EECT, the processing circuit MC does not distinguish between the positive and negative half-waves of the voltage Vac. The duration of the slots is here equal to 1 / N times the half-period T, ie 1 / 2N times the period T.

Dans l'exemple de réalisation représenté sur les figures 2A à 2F, le paramètre N est choisit égal à 10. On distingue ainsi dix créneaux SL0 à SL9 par demi-période de la tension Vac, le premier créneau SL0 étant placé après le passage à zéro de la tension Vac, le dernier créneau SL9 étant placé avant le passage à zéro suivant de la tension Vac. Chaque créneau SLi présente une durée de 1 ms si la tension Vac présente une fréquence de 50 Hz et une période T de 20 ms.In the exemplary embodiment shown on the Figures 2A to 2F , the parameter N is chosen equal to 10. Thus ten slots SL0 to SL9 are distinguished by half-period of the voltage Vac, the first slot SL0 being placed after the zero crossing of the voltage Vac, the last slot SL9 being placed before the next zero crossing of the voltage Vac. Each slot SLi has a duration of 1 ms if the voltage Vac has a frequency of 50 Hz and a period T of 20 ms.

Le circuit de traitement MC est ici un microcontrôleur équipé d'une entrée d'échantillonnage et de numérisation du signal Ve3. Le traitement du signal Ve3 est donc réalisé sur des échantillons numériques Vi de ce signal, représentés sur la figure 2E. L'échantillonnage est réalisé par exemple à une fréquence de 100 kHz, soit 100 échantillons Vi,j du signal par créneau, i étant le rang du créneau considéré et j le rang de l'échantillon dans le créneau considéré. Le microcontrôleur ramène ces 100 échantillons Vi,j à un seul échantillon Vi par créneau, par exemple en choisissant comme échantillon Vi l'échantillon Vi,j ayant la valeur la plus élevée sur les 100 échantillons Vi,j, ou en calculant la valeur moyenne des 100 échantillons Vi,j.The processing circuit MC is here a microcontroller equipped with a sampling and digitizing input of the signal Ve3. The signal processing Ve3 is therefore performed on digital samples Vi of this signal, represented on the figure 2E . The sampling is carried out for example at a frequency of 100 kHz, ie 100 samples Vi, j of the signal per slot, where i is the rank of the slot considered and j the rank of the sample in the slot in question. The microcontroller returns these 100 samples Vi, j to a single sample Vi per slot, for example by choosing as sample Vi the sample Vi, j having the highest value of the 100 samples Vi, j, or by calculating the average value 100 samples Vi, j.

Le traitement du signal Ve3 numérisé et échantillonné comprend deux phases principales :

  • une phase de détection de signaux PDS, et
  • une phase de détection d'un amorçage d'incendie, ou phase de corrélation, visant à mettre en évidence une corrélation représentative d'un amorçage d'incendie entre les différents signaux PDS détectés.
The digitized and sampled Ve3 signal processing comprises two main phases:
  • a PDS signal detection phase, and
  • a fire ignition detection phase, or correlation phase, for highlighting a correlation representative of a fire initiation between the various detected PDS signals.

On désigne ici par "signal PDS" ou "signal de décharge partielle PDS" tout signal ayant le profil d'un "vrai" signal de décharge partielle mais pouvant avoir une origine autre qu'un défaut d'isolement pouvant conduire à un amorçage d'incendie. Il peut s'agir par exemple de signaux émis par des systèmes d'éclairage ou des appareillages connectés au réseau. La distinction entre les "vrais" et "faux" signaux de décharge partielle est faite au cours de la phase de corrélation.Here, the term "PDS signal" or "PDS partial discharge signal" denotes any signal having the profile of a "true" partial discharge signal but which may have an origin other than an insulation fault which may lead to an ignition failure. 'fire. It may be for example signals emitted by lighting systems or equipment connected to the network. The distinction between "true" and "false" partial discharge signals is made during the correlation phase.

Phase de détection de signaux de décharge partiellePartial discharge signal detection phase

La phase de détection de signaux PDS est illustrée par l'organigramme sur la figure 3 et comprend des étapes E1 à E11.The PDS signal detection phase is illustrated by the flowchart on the figure 3 and comprises steps E1 to E11.

A l'étape E1, le microcontrôleur est informé du passage à zéro de la tension alternative Vac grâce au passage à 1 du signal ZC. A l'étape E2, le microcontrôleur remet à 0 une valeur de comptage CMP. Cette valeur est constamment incrémentée par un compteur du microcontrôleur cadencé par un signal horloge (non représenté sur la figure 1). Cette valeur de comptage permet au microcontrôleur de distinguer les différents créneaux. Le microcontrôleur met également à 0 l'indice i des créneaux après passage à zéro de la tension Vac.In step E1, the microcontroller is informed of the zero crossing of the alternating voltage Vac by changing the signal ZC to 1. In step E2, the microcontroller resets a count value CMP to 0. This value is constantly incremented by a counter of the microcontroller clocked by a clock signal (not represented on the figure 1 ). This count value allows the microcontroller to distinguish the different slots. The microcontroller also sets to 0 the index i of the slots after zero crossing of the voltage Vac.

Les étapes E3 à E8 sont répétées par le microcontrôleur pour chaque créneaux SLi, à commencer par le créneau SL0. A l'étape E3, le microcontrôleur échantillonne et numérise le signal Ve3 pour prélever un échantillon Vi représentatif de l'amplitude du signal Ve3 dans le créneau considéré SLi. L'échantillon Vi est déterminé comme indiqué plus haut, par sélection du plus grand des échantillons Vi,j ou par calcul de la valeur moyenne des échantillons Vi,j dans le créneau SLi.Steps E3 to E8 are repeated by the microcontroller for each slot SLi, starting with slot SL0. In step E3, the microcontroller samples and digitizes the signal Ve3 to take a sample Vi representative of the amplitude of the signal Ve3 in the slot considered SLi. The sample Vi is determined as indicated above, by selecting the largest of the samples Vi, j or by calculating the average value of the samples Vi, j in the slot SLi.

A l'étape E4, le microcontrôleur calcule une valeur moyenne MVi du signal Ve3 dans le créneau considéré SLi, à partir de M échantillons Vi. Ces M échantillons Vi comprennent l'échantillon courant Vi qui vient d'être prélevé et M-1 échantillons Vi prélevés dans ce même créneau au cours de cycles précédents de la tension alternative Vac. A l'instar des M-1 échantillons précédents, l'échantillon courant Vi est également mémorisé afin de permettre au microcontrôleur de recalculer la valeur moyenne MVi à la prochaine demi-période de la tension Vac. Le plus ancien des M-1 échantillons est effacé afin de ne pas saturer la mémoire du microcontrôleur. Le nombre M est par exemple égal à 1000, ce qui implique de mémoriser 1000 échantillons Vi par créneau soit 10000 échantillons au total pour les 10 créneaux SL0 à SL9.In step E4, the microcontroller calculates a mean value MVi of the signal Ve3 in the slot considered SLi, from M samples Vi. These M samples Vi comprise the current sample Vi which has just been taken and M-1 samples Vi taken in this same slot during previous cycles of the AC voltage Vac. Like the previous M-1 samples, the current sample Vi is also stored in order to allow the microcontroller to recalculate the average value MVi at the next half-period of the voltage Vac. The oldest of the M-1 samples is erased so as not to saturate the memory of the microcontroller. The number M is for example equal to 1000, which involves storing 1000 samples Vi per slot or 10000 samples in total for the slots SL0 to SL9.

A l'étape E5, le microcontrôleur calcule l'écart-type Ei des M échantillons utilisés pour le calcul de la valeur moyenne. A l'étape E6, le microcontrôleur calcule un seuil de détection dynamique Si = MVi + K*Ei en ajoutant K fois l'écart-type à la valeur moyenne MVi, K étant au moins égal à 1. A l'étape E7, le microcontrôleur détermine si l'échantillon Vi est supérieur au seuil dynamique Si. Dans l'affirmative, le microcontrôleur considère qu'un signal de décharge partielle a été détecté dans le créneau considéré et met à 1 un bit bi de rang i correspondant au rang i du créneau considéré SLi. Dans la négative, le microcontrôleur considère qu'un signal de décharge partielle n'a pas été détecté et met le bit bi à 0.In step E5, the microcontroller calculates the standard deviation Ei of the M samples used for calculating the average value. In step E6, the microcontroller calculates a dynamic detection threshold Si = MVi + K * Ei by adding K times the standard deviation to the average value MVi, K being at least equal to 1. In step E7, the microcontroller determines whether the sample Vi is greater than the dynamic threshold Si. If so, the microcontroller considers that a partial discharge signal has been detected in the slot in question and sets a bit bi of rank i corresponding to the rank i of the slot considered SLi. If not, the microcontroller considers that a partial discharge signal has not been detected and sets the bit bi to 0.

La valeur K*Ei correspond à un intervalle de variation acceptable du signal Ve3 relativement à sa valeur moyenne MVi dans le créneau considéré. Un échantillon Vi présentant une valeur en dessous du seuil MVi + K*Ei n'est pas considéré comme représentatif de la présence d'un signal PDS. Cet intervalle de variation permet au microcontrôleur de ne pas être aveuglé par des sauts de valeurs des échantillons Vi qui sont statistiquement acceptables et situés sur la partie centrale d'une courbe gaussienne des variations du signal Ve3. Le coefficient K peut être choisi égal à 3, ce qui signifie que ne seront pas considérés comme des signaux PDS des variations du signal Ve3 inférieures à 3 fois l'écart type Ei dans le créneau considéré. L'homme de l'art pourra bien entendu retenir d'autres moyens de détermination de l'intervalle de variation acceptable, qui ne sont pas basés sur un calcul d'écart-type.The value K * Ei corresponds to an acceptable variation interval of the signal Ve3 relative to its mean value MVi in the slot considered. A sample Vi having a value below the threshold MVi + K * Ei is not considered as representative of the presence of a PDS signal. This range of variation allows the microcontroller not to be blinded by jumps in values of the samples Vi which are statistically acceptable and located on the central part of a Gaussian curve of the variations of the signal Ve3. The coefficient K may be chosen equal to 3, which means that signal variations Ve3 less than 3 times the standard deviation Ei in the slot under consideration will not be considered as PDS signals. Those skilled in the art will of course be able to retain other means of determining the acceptable range of variation, which are not based on a standard deviation calculation.

A l'étape E8, le microcontrôleur consulte la valeur de comptage CMP et détermine si elle est supérieure à un nombre D correspondant à la durée d'un créneau. Dans la négative, le microcontrôleur réitère l'étape E8 jusqu'à ce que le nombre D soit atteint.In step E8, the microcontroller consults the count value CMP and determines whether it is greater than a number D corresponding to the duration of a slot. If not, the microcontroller repeats step E8 until the number D is reached.

A l'étape E9, le microcontrôleur détermine si le créneau actuel de rang i est le dernier créneau de la demi-période de la tension Vac, en déterminant si i=9.In step E9, the microcontroller determines whether the current slot of rank i is the last slot of the half-period of the voltage Vac, by determining if i = 9.

Dans la négative, le microcontrôleur va à l'étape E10 où il incrémente le rang i du créneau (i=i+1), remet à 0 la valeur de comptage CMP, puis répète les étapes E3 à E9.If not, the microcontroller goes to step E10 where it increments the rank i of the slot (i = i + 1), resets the count value CMP, and then repeats steps E3 to E9.

Dans l'affirmative, le microcontrôleur va à l'étape E11 où il génère un mot binaire Wk comprenant l'ensemble des bits bi configurés à l'étape E7 pour chacun des créneaux, soit ici Wk=b0b1b2b3b4b5b6b7b8b9. Le microcontrôleur retourne ensuite à l'étape E1 pour détecter le passage à zéro de la tension Vac et répète les étapes E2 à E11, et ainsi de suite.If so, the microcontroller goes to step E11 where it generates a binary word Wk comprising all bits bi configured in step E7 for each of the slots, here Wk = b0b1b2b3b4b5b6b7b8b9. The microcontroller then returns to step E1 to detect the zero crossing of voltage Vac and repeats steps E2 to E11, and so on.

A titre d'illustration, deux demi-périodes 1/2Tk-1 et 1/2Tk sont représentées sur les figures 2A à 2F. La figure 2E montre la valeur des échantillons Vi dans chaque créneau SL0 à SL9 ainsi que les valeurs des seuils de détection dynamiques S0 à S9 qui sont calculés par le microcontrôleur pour chaque créneau au cours de chaque étape E6. Il apparaît qu'au cours de la demi-période 1/2Tk-1, aucun des échantillons calculés Vi ne présente une valeur supérieure au seuil de détection correspondant Si. Le mot binaire correspondant Wk-1 ne comprend donc que des bits à 0. Au cours de la demi-période suivante 1/2Tk-1, seul l'échantillon V3 du quatrième créneau SL3 présente une valeur supérieure au seuil de détection correspondant S3. Le quatrième bit b3 du mot binaire correspondant Wk est donc égal à 1 tandis que les autres bits sont à 0, le mot Wk étant ainsi égal à 0001000000.By way of illustration, two half-periods 1 / 2T k-1 and 1 / 2T k are represented on the Figures 2A to 2F . The figure 2E shows the value of the samples Vi in each slot SL0 to SL9 as well as the values of the dynamic detection thresholds S0 to S9 which are calculated by the microcontroller for each slot during each step E6. It appears that during the half-period 1 / 2T k-1, none of the calculated samples Vi has a value greater than the corresponding detection threshold Si. The corresponding binary word W k-1 therefore comprises only bits with 0. During the next half-period 1 / 2T k-1 , only the sample V3 of the fourth slot SL3 has a value greater than the corresponding detection threshold S3. The fourth bit b3 of the corresponding binary word W k is therefore equal to 1 while the other bits are at 0, the word W k thus being equal to 0001000000.

L'homme de l'art notera que le mode de réalisation du procédé de l'invention qui vient d'être décrit a été présenté sous forme d'organigramme récursif dans un souci de simplification de la description. Ce procédé peut comprendre en pratique des étapes de traitements exécutées en mode multitâche qui sont quasi-simultanées. Notamment, l'étape E1 de détection du passage à zéro de la tension Vac, les étapes E2 et E10 de remise à zéro de la valeur de comptage, et l'étape E8 de surveillance de la valeur de comptage peuvent être exécutées en boucle pendant la durée d'un créneau et simultanément à l'exécution des étapes de calcul E4 à E7. De même, les étapes de calcul E4 à E7 peuvent être effectuées en temps différé si l'étape échantillonnage E3 s'étend pendant toute la durée du créneau considéré, notamment lorsque le microcontrôleur prélève 100 échantillons Vi,j par créneau et détermine la valeur de l'échantillon Vi.The person skilled in the art will note that the embodiment of the method of the invention which has just been described has been presented in the form of a recursive flow diagram for the sake of simplification of the description. This method may comprise in practice multitasking processing steps that are almost simultaneous. In particular, the step E1 for detecting the zero crossing of the voltage Vac, the steps E2 and E10 for resetting the count value, and the step E8 for monitoring the count value can be executed in a loop during the duration of a slot and simultaneously with the execution of calculation steps E4 to E7. Similarly, the calculation steps E4 to E7 can be performed in deferred time if the sampling step E3 extends for the duration of the slot in question, in particular when the microcontroller takes 100 samples Vi, j per slot and determines the value of the sample Vi.

Également, la phase de détection d'un amorçage d'incendie qui va maintenant être décrite peut être conduite en même temps que la phase de détection de signaux PDS, avec un décalage d'une demi-période ou plus. Par exemple, pendant que le microcontrôleur conduit la phase de détection de signaux PDS sur une demi-période de la tension Vac, il peut exécuter en même temps la phase de détection d'un amorçage d'incendie en se basant sur les signaux PDS détectés au cours des demi-périodes précédentes.Also, the fire detection detection phase which will now be described can be conducted simultaneously with the PDS signal detection phase, with an offset of half a period or more. For example, while the microcontroller conducts the phase of detecting PDS signals over half a period of the voltage Vac, it can simultaneously execute the detection phase of a fire initiation based on the detected PDS signals. during the previous half-periods.

Phase de détection d'un amorçage d'incendieDetection phase of a fire initiation

La recherche d'une corrélation représentative d'un amorçage d'incendie entre les différents signaux PDS détectés est faite en tenant compte de leur position sur la courbe de la tension alternative Vac, soit ici en tenant compte des créneaux SLi dans lesquels ils ont été détectés. Le microcontrôleur dispose d'une ou de plusieurs règles de corrélation COR1, COR2, COR3,... déterminées par des essais et expérimentations. Une alerte est déclenchée lorsqu'au moins l'une de ces règles de corrélation est satisfaite. Lorsqu'une alerte est déclenchée, le microcontrôleur met en oeuvre une contre-mesure permettant d'éviter un incendie. Par exemple, comme montré sur la figure 1, le microcontrôleur peut fournir un signal d'alerte SA qui ouvre des interrupteurs SWi par l'intermédiaire desquels la tension alternative Vac est appliquée au réseau.The search for a correlation representative of a fire initiation between the different detected PDS signals is made taking into account their position on the curve of the AC voltage Vac, here taking into account the slots SLi in which they were detected. The microcontroller has one or more correlation rules COR1, COR2, COR3, ... determined by tests and experiments. An alert is triggered when at least one of these correlation rules is satisfied. When an alert is triggered, the microcontroller implements a countermeasure to prevent a fire. For example, as shown on the figure 1 , the microcontroller can provide a warning signal SA that opens SWi switches through which the AC voltage Vac is applied to the network.

Des exemples de règles de corrélation COR1 à COR3 seront décrits dans ce qui suit à titre non limitatif.Examples of correlation rules COR1 to COR3 will be described in the following without limitation.

Exemple 1 - Règle COR1 : Une alerte est déclenchée si un nombre N1 de signaux PDS successifs a été détecté dans un même créneau SLi au cours de cycles successifs de la tension Vac.Example 1 - Rule COR1: An alert is triggered if a number N1 of successive PDS signals has been detected in the same slot SLi during successive cycles of the voltage Vac.

La règle COR1 est fondée sur l'hypothèse que l'apparition de signaux PDS successifs dans le même créneau est représentative d'un amorçage d'incendie. Si par exemple N1=3, une alerte sera par exemple déclenchée lorsque le microcontrôleur génère les mots suivants (apparitions successives de trois signaux PDS dans le quatrième créneau (3): W 0 = 000 1 000000

Figure imgb0001
W 1 = 000 1 000000
Figure imgb0002
W 2 = 000 1 000000
Figure imgb0003
The rule COR1 is based on the assumption that the appearance of successive PDS signals in the same slot is representative of a fire initiation. If for example N1 = 3, an alert will be triggered for example when the microcontroller generates the following words (successive appearances of three PDS signals in the fourth slot (3): W 0 = 000 1 000000
Figure imgb0001
W 1 = 000 1 000000
Figure imgb0002
W 2 = 000 1 000000
Figure imgb0003

Exemple 2 - Règle COR2 : un nombre N1 de signaux PDS a été détecté dans un même créneau SLi, pendant P1 demi-périodes successives de la tension Vac. Une alerte est déclenchée si N1 > 0,5 P1.Example 2 - Rule COR2: a number N1 of PDS signals has been detected in the same slot SLi, during P1 successive half-periods of the voltage Vac. An alert is triggered if N1> 0.5 P1.

La règle COR2 est fondée sur l'hypothèse que l'apparition répétitive de signaux PDS dans le même créneau est représentative d'un amorçage d'incendie si ces signaux sont assez proches les uns des autres et même s'ils ne sont pas successifs. Si par exemple P1 = 5, le seuil d'alerte est N1>2. A titre d'exemple, une alerte sera déclenchée lorsque le microcontrôleur génère les mots suivants (apparitions répétitives mais pas nécessairement successives d'un signal PDS dans le troisième créneau (2): W 0 = 00 1 0000000

Figure imgb0004
W 1 = 0000000000
Figure imgb0005
W 2 = 00 1 0000000
Figure imgb0006
W 3 = 0000000000
Figure imgb0007
W 4 = 00 1 0000000
Figure imgb0008
The COR2 rule is based on the assumption that the repetitive appearance of PDS signals in the same slot is representative of a fire initiation if these signals are close enough to each other and even if they are not successive. If for example P1 = 5, the alert threshold is N1> 2. As an example, an alert will be triggered when the microcontroller generates the following words (repetitive but not necessarily successive appearances of a PDS signal in the third slot (2): W 0 = 00 1 0000000
Figure imgb0004
W 1 = 0000000000
Figure imgb0005
W 2 = 00 1 0000000
Figure imgb0006
W 3 = 0000000000
Figure imgb0007
W 4 = 00 1 0000000
Figure imgb0008

Exemple 3 - Règle COR3 : un nombre N1 de signaux PDS a été détecté dans un créneau SLi correspondant à une première valeur de tension de la tension alternative Vac, pendant P1 demi-périodes successives, puis un nombre N2 de signaux PDS a été détecté dans une autre créneau SLi' correspondant à une seconde valeur de tension de la tension alternative Vac inférieure à la première valeur de tension, pendant P2 demi-périodes successives suivant les P1 première demi-périodes. Une alerte est déclenchée si N1 > 0,5 P1 et N2 > 0,5 P2.Example 3 - Rule COR3: a number N1 of PDS signals has been detected in a slot SLi corresponding to a first voltage value of the AC voltage Vac, during P1 successive half-periods, then a number N2 of PDS signals has been detected in another slot SLi 'corresponding to a second voltage value of the AC voltage Vac lower than the first voltage value, for P2 half-periods successive following the P1 first half-periods. An alarm is triggered if N1> 0.5 P1 and N2> 0.5 P2.

La règle COR3 est fondée sur l'hypothèse que des apparitions répétitives mais pas nécessairement successives de signaux PDS dans un premier créneau puis dans un second créneau correspondant à une valeur inférieure de la tension Vac, est représentative d'un amorçage d'incendie. En effet, un amorçage d'incendie se traduit par une destruction progressive des gaines isolantes et donc une diminution de leur constante diélectrique au point de claquage. L'amplitude de la tension Vac à laquelle les décharges partielles se produisent tend donc à baisser au fur et à mesure que l'isolant se détériore.The rule COR3 is based on the assumption that repetitive but not necessarily successive appearances of PDS signals in a first slot and then in a second slot corresponding to a lower value of the voltage Vac, is representative of a fire initiation. Indeed, a fire initiation results in a gradual destruction of the insulating sheaths and therefore a decrease in their dielectric constant at the point of breakdown. The amplitude of the voltage Vac at which the partial discharges occur therefore tends to decrease as the insulation deteriorates.

Si par exemple P1=5 et P2= 4, les seuils d'alerte sont N1>2 et N2>2. A titre d'exemple, une alerte sera déclenchée lorsque le microcontrôleur génère les mots suivants (apparitions répétitives d'un signal PDS dans le cinquième créneau SL4 puis dans le quatrième créneau (3): W 0 = 0000 1 00000

Figure imgb0009
W 1 = 0000000000
Figure imgb0010
W 2 = 0000 1 00000
Figure imgb0011
W 3 = 0000000000
Figure imgb0012
W 4 = 0000 1 00000
Figure imgb0013
W 5 = 000 1 000000
Figure imgb0014
W 6 = 0000000000
Figure imgb0015
W 7 = 000 1 000000
Figure imgb0016
W 8 = 000 1 000000
Figure imgb0017
If for example P1 = 5 and P2 = 4, the warning thresholds are N1> 2 and N2> 2. For example, an alert will be triggered when the microcontroller generates the following words (repetitive appearances of a signal PDS in the fifth slot SL4 then in the fourth slot (3): W 0 = 0000 1 00000
Figure imgb0009
W 1 = 0000000000
Figure imgb0010
W 2 = 0000 1 00000
Figure imgb0011
W 3 = 0000000000
Figure imgb0012
W 4 = 0000 1 00000
Figure imgb0013
W 5 = 000 1 000000
Figure imgb0014
W 6 = 0000000000
Figure imgb0015
W 7 = 000 1 000000
Figure imgb0016
W 8 = 000 1 000000
Figure imgb0017

Les critères de corrélation intervenant dans les règles COR2 et COR3 peuvent être rendus plus stricts en prévoyant que les signaux PDS soient successifs et pas simplement répétitifs, ce qui conduit à imposer que P1 soit égal à N1 dans la règle COR2, laquelle devient alors similaire à la règle COR1, et à imposer que P1 soit égal à N1 et P2 égal à N2 dans la règle COR2.The correlation criteria involved in the COR2 and COR3 rules can be made more stringent by providing that the PDS signals are successive and not simply repetitive, which means that P1 must be equal to N1 in the rule COR2, which then becomes similar to the rule COR1, and to impose that P1 is equal to N1 and P2 equal to N2 in the rule COR2.

Dans ce cas, Si par exemple P1=5 et P2= 4, une alerte sera déclenchée lorsque le microcontrôleur génère les mots suivants (apparitions successives de 5 signaux PDS dans le cinquième créneau SL4 puis de 4 signaux PDS dans le quatrième créneau SL3): W 0 = 0000 1 00000

Figure imgb0018
W 1 = 0000 1 00000
Figure imgb0019
W 2 = 0000 1 00000
Figure imgb0020
W 3 = 0000 1 00000
Figure imgb0021
W 4 = 0000 1 00000
Figure imgb0022
W 5 = 000 1 000000
Figure imgb0023
W 6 = 000 1 000000
Figure imgb0024
W 7 = 000 1 000000
Figure imgb0025
W 8 = 000 1 000000
Figure imgb0026
In this case, If for example P1 = 5 and P2 = 4, an alert will be triggered when the microcontroller generates the following words (successive appearances of 5 PDS signals in the fifth slot SL4 and 4 PDS signals in the fourth slot SL3): W 0 = 0000 1 00000
Figure imgb0018
W 1 = 0000 1 00000
Figure imgb0019
W 2 = 0000 1 00000
Figure imgb0020
W 3 = 0000 1 00000
Figure imgb0021
W 4 = 0000 1 00000
Figure imgb0022
W 5 = 000 1 000000
Figure imgb0023
W 6 = 000 1 000000
Figure imgb0024
W 7 = 000 1 000000
Figure imgb0025
W 8 = 000 1 000000
Figure imgb0026

Il apparaîtra clairement à l'homme de l'art que la présente invention est susceptible de diverses variantes et modes de réalisation.It will be apparent to those skilled in the art that the present invention is susceptible to various variations and embodiments.

Ainsi, dans un mode de réalisation, le circuit d'acquisition ACT est réalisé différemment et est par exemple basé sur une détection de courant.Thus, in one embodiment, the acquisition circuit ACT is made differently and is for example based on a current detection.

Dans un autre mode de réalisation, le rang i des créneaux est déterminé relativement à une autre valeur de tension de la tension Vac, par exemple sa valeur crête.In another embodiment, the rank i of the slots is determined relative to another voltage value of the voltage Vac, for example its peak value.

Dans encore un autre mode de réalisation, la recherche d'une corrélation entre les signaux PDS est assurée par un circuit de calcul externe recevant les mots binaires Wk fournis par le microcontrôleur.In yet another embodiment, the search for a correlation between the PDS signals is provided by an external calculation circuit receiving the binary words Wk provided by the microcontroller.

Dans encore un autre mode de réalisation, le circuit de traitement MC, au lieu d'être un microcontrôleur, comprend une chaîne de traitement analogique configurée pour détecter les signaux PDS et fournir, à chaque fois qu'un signal PDS est détecté, un signal analogique dont la valeur ou l'amplitude est représentative du temps écoulé entre l'instant où le signal PDS a été détecté et l'instant où la tension Vac est passée à zéro (ou autre valeur de référence). Dans un tel mode de réalisation, la notion de créneau temporel est implicite dans la détermination d'une corrélation entre les signaux PDS, puisque l'amplitude de la tension Vac est directement fonction du temps après chaque passage à zéro.In still another embodiment, the processing circuit MC, instead of being a microcontroller, comprises an analog processing chain configured to detect the PDS signals and provide, whenever a PDS signal is detected, a signal analog whose value or amplitude is representative of the time elapsed between the time when the PDS signal was detected and the time when the voltage Vac is passed to zero (or other reference value). In such an embodiment, the notion of Time slot is implicit in determining a correlation between the PDS signals, since the amplitude of the voltage Vac is directly a function of the time after each zero crossing.

Dans encore un autre mode de réalisation, le circuit de détection du passage à zéro ZCCT est remplacé par un circuit de mesure VMCT1 configuré pour mesurer la tension Vac et définir des groupes VGi de valeurs de la tension Vac, par exemple 25 groupes de valeurs VG0 à VG24 d'une étendue de 20V chacun, comme montré ci-dessous : VG0 VG1 ... VG11 VG12 VG13 VG14 ... VG23 VG24 0-20 20-40 ... 200-220 220-240 240-220 220-200 ... 40-20 20-0 In yet another embodiment, the zero crossing detection circuit ZCCT is replaced by a measurement circuit VMCT1 configured to measure the voltage Vac and define groups VGi of values of the voltage Vac, for example 25 groups of values VG0. at VG24 with a range of 20V each, as shown below: vg0 VG1 ... VG11 VG12 VG13 VG14 ... VG23 VG24 0-20 20-40 ... 200-220 220-240 240-220 220-200 ... 40-20 20-0

Une information correspondant aux groupes de valeurs de tension est fournie au circuit de traitement MC en temps réel. Le circuit de traitement recherche une corrélation entre les signaux PDS en utilisant ces groupes de valeurs en lieu et place des créneaux temporels.Information corresponding to the groups of voltage values is supplied to the processing circuit MC in real time. The processing circuit searches for a correlation between the PDS signals by using these groups of values in place of the time slots.

Les groupes de valeurs de tension de la tension Vac pourraient également présenter un incrément de tension variable, par exemple de 20V jusqu'à 100V, de 10V entre 100 et 200V et de 5V entre 200 et 240V. De même, les créneaux temporels précédemment décrits pourraient présenter un incrément temporel variable.The groups of voltage values of the voltage Vac could also have a variable voltage increment, for example 20V up to 100V, 10V between 100 and 200V and 5V between 200 and 240V. Similarly, the previously described time slots could have a variable time increment.

Dans encore un autre mode de réalisation, le circuit de détection du passage à zéro ZCCT est remplacé par un circuit de mesure VMCT2 configuré pour mesurer la tension Vac et fournir en temps réel au circuit de traitement MC un paramètre indicatif de la valeur de la tension Vac, par exemple un signal binaire codé sur plusieurs bits. Le circuit de traitement associe à chaque signal PDS détecté le paramètre indicatif reçu au moment où le signal PDS a été détecté, ce paramètre formant alors un paramètre indicatif de la position du signal PDS sur la courbe de la tension Vac. Le circuit de traitement recherche ensuite une corrélation entre les signaux PDS en utilisant ce paramètre indicatif à la place des groupes de valeurs de tension de la tension Vac ou des créneaux temporels.In yet another embodiment, the zero crossing detection circuit ZCCT is replaced by a measuring circuit VMCT2 configured to measure the voltage Vac and supply in real time to the processing circuit MC a parameter indicative of the value of the voltage. Vac, for example a binary signal coded on several bits. The processing circuit associates with each detected PDS signal the received parameter parameter at the moment when the PDS signal has been detected, this parameter then forming a parameter indicative of the position of the PDS signal on the curve of the voltage Vac. The processing circuit then seeks a correlation between the PDS signals using this indicative parameter instead of groups of voltage values of the voltage Vac or time slots.

Ainsi, dans la présente demande, les notions de créneaux temporels, de groupes de valeurs de tension de la tension alternative Vac ou de paramètre indicatif de la position d'un signal PDS sur la courbe de la tension alternative Vac, sont considérées comme équivalentes. Si la tension Vac est sinusoïdale, des créneaux temporels de durée fixe correspondent à des groupes de valeurs de tension de la tension Vac d'étendue variable, et des groupes de valeurs de tension de la tension Vac d'étendue fixe correspondent à des créneaux temporels de durée variable.Thus, in the present application, the notions of time slots, groups of voltage values of the AC voltage Vac or parameter indicative of the position of a PDS signal on the curve of the AC voltage Vac are considered equivalent. If the voltage Vac is sinusoidal, time slots of fixed duration correspond to groups of voltage values of the voltage Vac of variable extent, and groups of voltage values of the voltage Vac of fixed range correspond to time slots. variable duration.

La présente invention est également susceptible de diverses applications. Ainsi, des phénomènes transitoires identiques peuvent être observés dans une installation de panneaux photovoltaïques comprenant des diodes présentant un défaut d'isolement. Un procédé de détection selon l'invention s'applique également à ce type de réseau électrique et peut permettre une amélioration de la maintenance des installations de production énergétique. Dans ce cas, les règles de corrélation spécifiques à ce type de défaut d'isolement sont définies, toujours en relation avec la position des impulsions de décharge partielle sur la courbe de la tension alternative véhiculée par le réseau sous surveillance.The present invention is also susceptible of various applications. Thus, identical transient phenomena can be observed in a photovoltaic panel installation comprising diodes having an insulation fault. A detection method according to the invention also applies to this type of electrical network and can allow an improvement in the maintenance of energy production facilities. In this case, the correlation rules specific to this type of insulation fault are defined, always in relation to the position of the partial discharge pulses on the curve of the AC voltage conveyed by the monitored network.

Claims (15)

  1. Device (DTC) for detecting, in an electrical network carrying a low-voltage AC voltage (Vac), an insulation fault between a phase wire (P) and a neutral wire (N) manifested in the appearance of partial discharge signals (PDS), comprising means for detecting partial discharge signals by analysing the voltage (Vac) or the current carried by the electrical network, characterized in that it comprises means for:
    - associating, with each detected partial discharge signal, a parameter (SLi, VGi) indicative of the position of the partial discharge signal on the curve of the AC voltage, and
    - searching for the existence, among a plurality of partial discharge signals detected during different variation cycles of the AC voltage, of at least one correlation (COR1, COR2, COR3) indicative of an insulation fault, taking into account the parameter (SLi, VGi) indicative of the position of the partial discharge signal on the curve of the AC voltage.
  2. Device according to Claim 1, configured to:
    - define, as a parameter indicative of the position of a partial discharge signal on the curve of the AC voltage (Va), groups (SLi, VGi) of voltage values of the AC voltage, and
    - associate, with each detected discharge signal, a group (SLi, VGi) of voltage values of the AC voltage.
  3. Device according to Claim 2, configured to identify each group (VGi) of voltage values of the AC voltage by means of a time slot (SLi) representing a fraction of the period (T) of the AC voltage.
  4. Device according to either of Claims 2 and 3, configured to detect an insulation fault when a first number (N1) of partial discharge signals is detected during a first number (P1) of successive cycles of the AC voltage in relation to the same group (SLi, VGi) of voltage values of the AC voltage.
  5. Device according to one of Claims 2 to 4, configured to detect an insulation fault when:
    - a first number (N1) of partial discharge signals is detected during a first number (P1) of successive cycles of the AC voltage in relation to a first group of voltage values of the AC voltage, and
    - a second number (N2) of partial discharge signals is then detected during a second number (P2) of successive cycles of the AC voltage in relation to a second group of voltage values of the AC voltage comprising voltage values lower than the values of the first group.
  6. Device according to one of Claims 1 to 5, wherein the means for detecting partial discharge signals comprise:
    - an acquisition circuit (ACT) for extracting, from the AC voltage, a reference signal (Ve3) possibly containing partial discharge signals,
    - a circuit (MC) for processing the reference signal, configured, for each group (SLi, VGi) of voltage values of the AC voltage (Vac), to:
    - determine a current value (Vi) of the amplitude of the reference signal (Ve3),
    - calculate a mean value (MVi) of the amplitude of the envelope reference signal on the basis of the current value (Vi) of the amplitude of the reference signal and M-1 previous values of the amplitude of the reference signal that were measured over previous cycles of the AC voltage in relation to the group of voltage values of the AC voltage in question,
    - determine a detection threshold (Si, S1-S9) that depends on the mean value (MVi) of the amplitude of the reference signal, and
    - detect a partial discharge signal if the current value (Vi) of the amplitude of the reference signal is higher than the detection threshold (Si, S1-S9).
  7. Device according to Claim 6, wherein the acquisition circuit (ACT) comprises an integrator circuit (EECT, D1, R1, C3) receiving as input a filtered signal (Ve2) extracted from the AC voltage and delivering the reference signal (Ve3).
  8. Device according to either of Claims 6 and 7, wherein the detection circuit (MC) is configured to digitize the reference signal (Ve3) for each group (SLi, VGi) of voltage values of the AC voltage, and to deliver a digital sample (Vi) representative of the amplitude of the reference signal (Ve3) in relation to the group of voltage values of the AC voltage in question.
  9. Device according to Claim 8, wherein the detection circuit (MC) is configured to calculate the mean value (MVi) of the amplitude of the reference signal (Ve3) on the basis of a group of M digital samples (Vi) comprising the digital sample (Vi) representative of the current amplitude of the reference signal (Ve3) and M-1 digital samples (Vi) representative of the amplitude of the reference signal (Ve3) over previous cycles of the AC voltage in relation to the same group of voltage values of the AC voltage.
  10. Device according to one of Claims 6 to 9, wherein the detection circuit is configured to generate binary words (Wj) of N bits (b0-b9) in which each bit is associated with a group (SLi, VGi) of voltage values of the AC voltage, and has a first value if a partial discharge signal has been detected in relation to the group of voltage values of the AC voltage in question and a second logic value if a partial discharge signal has not been detected in relation to the group of voltage values in question.
  11. Method for detecting an insulation fault between a phase wire (P) and a neutral wire (N) in an electrical network carrying a low-voltage AC voltage (Vac), comprising steps of detecting partial discharge signals by analysing the voltage (Vac) or the current carried by the electrical network, characterized in that it comprises steps consisting in:
    - associating, with each detected partial discharge signal, a parameter (SLi, VGi) indicative of the position of the partial discharge signal on the curve of the AC voltage, and
    - searching for the existence, among a plurality of partial discharge signals detected during different variation cycles of the AC voltage, of at least one correlation (COR1, COR2, COR3) indicative of an insulation fault, taking into account the parameter (SLi, VGi) indicative of the position of the partial discharge signal on the curve of the AC voltage.
  12. Method according to Claim 11, comprising steps consisting in:
    - defining, as a parameter indicative of the position of a partial discharge signal on the curve of the AC voltage, groups (VGi) of voltage values of the AC voltage, and
    - associating, with each detected discharge signal, a group (VGi) of voltage values of the AC voltage.
  13. Method according to Claim 12, wherein each group (VGi) of voltage values of the AC voltage is identified by means of a time slot (SLi) representing a fraction of the period (T) of the AC voltage.
  14. Method according to either of Claims 12 and 13, wherein an insulation fault is detected when a first number (N1) of partial discharge signals is detected during a first number (P1) of successive cycles of the AC voltage in relation to the same group (SLi, VGi) of voltage values of the AC voltage.
  15. Method according to one of Claims 12 to 14, wherein an insulation fault is detected when:
    - a first number (N1) of partial discharge signals is detected during a first number (P1) of successive cycles of the AC voltage in relation to a first group of voltage values of the AC voltage, and
    - a second number (N2) of partial discharge signals is then detected during a second number (P2) of successive cycles of the AC voltage in relation to a second group of voltage values of the AC voltage comprising voltage values lower than the values of the first group.
EP12780241.1A 2011-10-12 2012-10-11 Procedure and device for detecting insulation faults in a low voltage network Not-in-force EP2766739B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1159235A FR2981457B1 (en) 2011-10-12 2011-10-12 METHOD AND DEVICE FOR DETECTING DYSFUNCTION IN AN ELECTRICAL NETWORK
PCT/FR2012/052317 WO2013054052A1 (en) 2011-10-12 2012-10-11 Method and device for detecting an insulation defect in a low-voltage electrical network

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EP2766739A1 EP2766739A1 (en) 2014-08-20
EP2766739B1 true EP2766739B1 (en) 2017-06-21

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WO (1) WO2013054052A1 (en)

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CN115828148B (en) * 2023-02-23 2023-05-05 广州智丰电气科技有限公司 Partial discharge waveform recognition method, system and storage medium

Family Cites Families (11)

* Cited by examiner, † Cited by third party
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US5452223A (en) * 1993-08-20 1995-09-19 Eaton Corporation Arc detection using current variation
KR100206662B1 (en) * 1995-08-28 1999-07-01 변승봉 Partial discharge measuring method using frequency spectrum analyzer.
US5835321A (en) 1996-08-02 1998-11-10 Eaton Corporation Arc fault detection apparatus and circuit breaker incorporating same
US6809523B1 (en) * 1998-10-16 2004-10-26 The Detroit Edison Company On-line detection of partial discharge in electrical power systems
US6172862B1 (en) 1999-06-11 2001-01-09 Anthony J. Jonnatti Partial discharge relay and monitoring device
JP4355197B2 (en) * 2003-11-27 2009-10-28 三菱電機株式会社 Partial discharge diagnostic method for gas insulated electrical apparatus and partial discharge diagnostic apparatus for gas insulated electrical apparatus
US7180299B2 (en) * 2003-12-22 2007-02-20 Leviton Manufacturing Co., Inc. Arc fault detector
GB0517994D0 (en) 2005-09-05 2005-10-12 Univ Glasgow High voltage insulation monitoring sensor
KR100729107B1 (en) * 2005-10-27 2007-06-14 한국전력공사 Methods of Input Vector formation for Auto-identification of partial discharge source using neural networks
JP4969407B2 (en) * 2007-10-26 2012-07-04 三菱電機株式会社 Method and apparatus for partial discharge diagnosis of gas insulated switchgear
US8098072B2 (en) 2008-09-24 2012-01-17 Siemens Energy, Inc. Partial discharge coupler for application on high voltage generator bus works

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

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FR2981457A1 (en) 2013-04-19
WO2013054052A1 (en) 2013-04-18
FR2981457B1 (en) 2015-04-03
EP2766739A1 (en) 2014-08-20

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