EP2636075A1 - Iii-nitride layer grown on a substrate - Google Patents

Iii-nitride layer grown on a substrate

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Publication number
EP2636075A1
EP2636075A1 EP11781869.0A EP11781869A EP2636075A1 EP 2636075 A1 EP2636075 A1 EP 2636075A1 EP 11781869 A EP11781869 A EP 11781869A EP 2636075 A1 EP2636075 A1 EP 2636075A1
Authority
EP
European Patent Office
Prior art keywords
substrate
ill
nitride layer
layer
nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11781869.0A
Other languages
German (de)
French (fr)
Inventor
Nathan Fredrick Gardner
Werner Karl Goetz
Michael Jason Grundmann
Melvin Barker Mclaurin
John Edward Epler
Michael David Camras
Frank Michael Steranka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
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Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of EP2636075A1 publication Critical patent/EP2636075A1/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C30B29/406—Gallium nitride
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate

Definitions

  • the present invention relates to growing a III -nitride layer on a substrate.
  • the III- nitride layer may be used as a growth substrate for a semiconductor light emitting device structure.
  • LEDs light emitting diodes
  • RCLEDs resonant cavity light emitting diodes
  • VCSELs vertical cavity laser diodes
  • edge emitting lasers are among the most efficient light sources currently available.
  • Materials systems currently of interest in the manufacture of high-brightness light emitting devices capable of operation across the visible spectrum include Group III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as Ill-nitride materials.
  • III -nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a sapphire, silicon carbide, Ill-nitride, or other suitable substrate by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques.
  • MOCVD metal-organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • the stack often includes one or more n-type layers doped with, for example, Si, formed over the substrate, one or more light emitting layers in an active region formed over the n-type layer or layers, and one or more p-type layers doped with, for example, Mg, formed over the active region. Electrical contacts are formed on the n- and p-type regions.
  • Ill-nitride devices are often grown on sapphire or SiC substrates. These non-III-nitride substrates are less than optimal because sapphire and SiC have different lattice constants than the Ill-nitride layers grown on them, causing strain and crystal defects in the Ill-nitride device layers, which can cause poor performance and reliability problems.
  • US 6,086,673 teaches "producing a nitride layer on a growth substrate. . . . [F]or many applications a free-standing GaN layer is preferred. . . . GaN growth can be carried out on a growth substrate which is either inherently or intentionally engineered to exhibit a mechanical weakness, in a plane parallel to the predominant growth surface, of sufficient magnitude to promote a mechanical failure along that plane, and to result in delamination of the epitaxial nitride layer due to thermal stress produced as the substrate and nitride layer are cooled after the nitride growth. . . . The cool-down and delamination mechanism . . .
  • a Ill-nitride light emitting device structure may be grown on the III- nitride alloy film.
  • a Ill-nitride layer is grown on a substrate.
  • the substrate is RA03(MO) n , where R is selected from Sc, In, Y, and the lanthanides; A is selected from Fe (III), Ga, and Al; M is selected from Mg, Mn, Fe (II), Co, Cu, Zn and Cd; and n is an integer > 1.
  • )/a su bstrate]* 100% is no more than 1%, where a su b s trate is an in-plane lattice constant of the substrate and ai aye r is a bulk lattice constant of the Ill-nitride layer.
  • a Ill-nitride layer is grown on a substrate.
  • the substrate is a non-III-nitride material.
  • the Ill-nitride layer is a ternary, quaternary, or quinary alloy.
  • the Ill-nitride layer is thick enough to be mechanically self- supporting and has a low defect density.
  • Ill-nitride alloy films described herein may be used as growth substrates for III- nitride light emitting devices. Ill-nitride light emitting devices grown on such alloy films may have less strain and therefore better performance than conventionally grown Ill-nitride light emitting devices.
  • Fig. 1 illustrates an alloy film grown on a substrate.
  • Fig. 2 illustrates a semiconductor device structure grown on an alloy film.
  • Fig. 3 illustrates a thin film flip chip light emitting device.
  • Fig. 4 illustrates a vertical light emitting device.
  • One method of producing a thick layer of a ternary or quaternary Ill-nitride alloy film on which a Ill-nitride device may be grown is to deposit the alloy film by a high-growth rate deposition technique such as HVPE (hydride vapor phase epitaxy) on a binary semiconductor template film, such as GaN, which is deposited on a conventional substrate such as sapphire.
  • HVPE hydrogen vapor phase epitaxy
  • GaN binary semiconductor template film
  • the lattice mismatch between the substrate (sapphire, in this example) and the template film (GaN, in this example) is generally large (>1%), so the GaN will contain many defects.
  • the alloy film (InGaN in this example) is also highly mismatched to the binary film (>1% lattice mismatch), thus additional defects or inhomogeneities are incorporated into the alloy film during its growth. Devices grown on alloy films produced by this method may exhibit poor
  • the device growth is performed on a composite substrate comprising, in this example, sapphire, GaN, and InGaN, all of which have different thermal expansion coefficients which may cause significant wafer bow or other geometrical distortions.
  • a substrate which is lattice matched (or nearly so) to the desired alloy film and of the same hexagonal symmetry. Since the substrate is lattice matched, fewer defects or inhomogeneities will be incorporated in the alloy film during growth, and the film can be grown thicker (for example, greater than 50 ⁇ thick in some embodiments, greater than 100 ⁇ thick in some embodiments, and greater than 200 ⁇ thick in some embodiments) so as to be mechanically self-supporting. The substrate can be removed from the thick alloy film and may be subsequently reused.
  • Fig. 1 illustrates an alloy film 12 grown on a substrate 10 according to embodiments of the invention.
  • a layer of semiconductor material may be characterized by a bulk lattice constant and an in-plane lattice constant.
  • the bulk lattice constant is the lattice constant of a theoretical, fully-relaxed layer of the same composition as the semiconductor layer.
  • the in-plane lattice constant is the lattice constant of the semiconductor layer as grown. If the semiconductor layer is strained, the bulk lattice constant is different from the in-plane lattice constant.
  • the bulk lattice constant of the semiconductor layer will be nearly the same as the in-plane lattice constant of the semiconductor layer and the same as the in-plane lattice constant of the substrate, with no cracking or other strain relief.
  • the in-plane lattice constant of the substrate may be the same as the bulk lattice constant of the substrate.
  • the in-plane lattice constant of the substrate may be different from the bulk lattice constant of the substrate.
  • Alloy film 12 has a bulk lattice constant ai aye r within 1% of the in-plane lattice constant a su b s trate of substrate 10 in some embodiments, and within 0.5% of the in-plane lattice constant a su b s trate of substrate 10 in some embodiments.
  • )/a S ubstrate]* 100% is no more than 1% in some embodiments, and no more than 0.5% in some embodiments.
  • Substrate 10 is a non-III-nitride material. In some embodiments, substrate 10 has similar or the same hexagonal wurtzite symmetry as the alloy film 12. In some embodiments, substrate 10 is substantially impervious to attack by the chemical and thermal environment experienced during the deposition of the alloy film 12. In some embodiments, substrate 10 has an in-plane coefficient of thermal expansion within 30% of that of the deposited alloy film 12. In some embodiments, substrate 10 may or may not be transparent to near-UV radiation. In some embodiments, substrate 10 is a single crystal or substantially single crystal material.
  • substrate 10 is a material of general composition RA0 3 (MO) n , where R is a trivalent cation, often selected from Sc, In, Y, and the lanthanides (atomic number 57-71 ); A is also a trivalent cation, often selected from Fe (III), Ga, and Al; M is a divalent cation, often selected from Mg, Mn, Fe (II), Co, Cu, Zn and Cd; and n is an integer > 1. In some embodiments, n ⁇ 9 and in some embodiments, n ⁇ 3.
  • RA0 3 (MO) n (n > 2) compounds are of the InFe0 3 (ZnO) n structure type.
  • alloy film 12 is grown on a surface of substrate 10 that is "miscut” or angled relative to a major crystallographic plane of the substrate.
  • the surface of substrate 10 on which alloy film 12 is grown may be oriented between -10 and +10 degrees away from the basal (0001) plane.
  • miscuts between -0.15 and +0.15 degrees tilted from the (0001) plane may result in large atomic terraces on the substrate surface that may desirably reduce the number of defects formed at terrace edges.
  • Alloy film 12 is deposited on substrate 10 by any of the means known in the art, including, for example, metalorganic chemical vapor deposition (MOCVD), HVPE, or molecular beam epitaxy (MBE). Perfect lattice match between the alloy film 12 and the substrate 10 is not necessary, although lattice match within 0.1% may permit the deposition of high-quality alloy films 12 at least 50 ⁇ thick.
  • MOCVD metalorganic chemical vapor deposition
  • HVPE high vacuum chemical vapor deposition
  • MBE molecular beam epitaxy
  • A1N has a bulk a- lattice constant of 3.111 A
  • InN has a bulk a-lattice constant of 3.544 A
  • GaN has a bulk a-lattice constant of 3.1885 A.
  • Alloy film 12 may be any material on which a III -nitride device structure may be grown. Alloy film 12 is often a ternary (such as InGaN or AlGaN), quaternary (such as AlInGaN), or quinary (such as BAlInGaN) alloy of Ill-nitride or other III-V material. As illustrated in the above table, in some embodiments the fraction of InN in an InGaN alloy film 12 may be between 14% and 48%. Ill-nitride device structures with active regions that emit visible light from the blue through the red-orange portions of the visible spectrum may be grown on the substrates listed in the above table. Alloy film 12 may be grown such that a defect density is less than 5xl0 8 cm "2 in some embodiments and less than 10 7 cm "2 in some embodiments.
  • alloy film 12 is doped with one or more n-type dopants such as, for example, Si, Ge, or Sn, or one or more p-type dopants such as, for example, Mg, Be, Zn, or Cd.
  • a doped alloy film 12 may be used for example in a vertical device where a contact is formed on a surface of alloy film 12 opposite the device structure.
  • alloy film 12 is doped with one or more dopants to make the alloy film insulating, such as Fe and/or C.
  • An insulating alloy film may be used where several devices such as LEDs are monolithically formed on a single alloy film 12. The insulating alloy film may electrically isolate neighboring devices.
  • alloy film 12 is not intentionally doped, or compensated and semi- insulating.
  • one or more dopants are used to fine-tune the lattice constant of alloy film 12 to reduce lattice mismatch with substrate 10, which may reduce the amount of indium required in alloy film 12 and/or permit a thicker alloy film 12 to be grown.
  • alloy film 12 is removed from substrate 10.
  • alloy film 12 is removed by laser lift-off, where a laser beam is directed through the substrate.
  • the layer of III -nitride material grown first on substrate 10 absorbs the laser light and melts, releasing alloy film 12 from the substrate.
  • Laser lift-off may be facilitated by an optional layer 14 of lower-energy-gap alloy semiconductor interposing the thick alloy film 12 and the substrate 10.
  • the composition of lower-energy-gap layer 14 may be selected such that layer 14 may absorb more of the incident laser light than the thick alloy film 12, which may reduce the incident flux required to melt the interface between the substrate 10 and the semiconductor material and may produce less distributed damage throughout the alloy film 12.
  • layer 14 is a discontinuous patterned film of non-III-nitride material such as SiN x or Si0 2 provided on substrate 10 prior to deposition of alloy film 12, such that the alloy film nucleates and grows preferentially on the exposed portions of the substrate, then coalesces over the discontinuous pattern after sufficient thickness is deposited.
  • the patterned layer may preferentially absorb the incident laser light, causing localized melting and fracture of the alloy film/substrate interface.
  • an optional zone of weakness 16 is provided at or near the interface of alloy film 12 and substrate 10 in order to encourage the fracture of that interface and thereby make it easier to remove the alloy film from the substrate.
  • a zone of weakness may be provided in the substrate 10 or alloy film 12 by implantation of one or more of H or N or other atoms prior to or after deposition of all or part of the alloy film or patterned film.
  • a zone of weakness 16 in alloy film 12 may be provided by growing alloy film 12 first with a higher mole fraction of InN (at a certain growth temperature) and subsequently with a lower mole fraction of InN (preferentially at a composition that is lattice matched to the substrate, at a certain higher growth temperature).
  • the higher-InN-bearing alloy film may transform at the higher growth temperature according to its phase diagram into regions of even higher and lower indium composition.
  • the regions of highest indium composition are more absorbent of incident laser light, and the mechanical stress due to the spatially varying indium composition will create a layer of mechanical weakness in the alloy film.
  • a zone of weakness 16 may also be provided at the alloy film 12/substrate 10 interface by patterning the surface of the substrate (e.g. with a rectangular or triangular lattice of ridges of substrate material) prior to deposition of alloy film 12.
  • a zone of weakness 16 may also be provided at the alloy film 12/substrate 10 interface by exposing the wafer to a pattern of tightly focused, pulsed laser beams of sufficient intensity and photon energy to create a plurality of micron-scale crystal defects or voids in the crystalline structure.
  • the pattern of crystal damage may be generated by rastering one or more laser beams across the wafer, or by using diffractive optics to generate a large number of spots from a single high power laser such as an excimer laser.
  • the laser beams may be strongly converging with a short sub-microsecond pulse, and may create highly localized damage. This exposure could occur through the epitaxy stack after growth with sufficiently low dose that further wafer processing may be done after exposure.
  • the substrate is removed after the subsequent wafer processing, for example in a die-level rather than a wafer- level process. Also, the total power of the exposure may be less than required for traditional laser lift-off, which may result in less mechanical shock.
  • substrate 10 is removed by etching, such as wet chemical etching.
  • etching such as wet chemical etching.
  • ScMgA10 4 is readily attacked by aqueous mixtures of H 3 PO 4 and H 2 0 2 , H 2 S0 4 :H 2 0 2 :H 2 0, and aqueous mixtures of HF, as reported by C. D. Brandle, et al. in "Dry and Wet Etching of ScMgA10 4 " published in Solid-State Electronics, 42, 467 (1998), which is incorporated herein by reference.
  • all or part of growth substrate 30 is removed by reactive ion etching using a gaseous mixture of Cl 2 and Ar at an applied power of 800 Watts.
  • Substrate materials shown in the table above have micaceous character, wherein the (0001) basal plane of the crystal (i.e. the face parallel to the surface of the substrate in the case where the substrate orientation is (0001)) preferentially fractures.
  • the substrate 10 may be removed from alloy film 12 by mechanical methods.
  • Suitable methods include but are not limited to mechanical grinding with, for example, polishing slurry; applying a rotational force between the substrate and the alloy film; attaching an adhesive-coated plastic film to the substrate and a second adhesive-coated plastic film to the alloy layer and pulling the substrate and alloy film apart; using a sharp blade to break the interface between the substrate and the alloy film; applying a pulse of sonic energy; applying one or more laser pulses focused to a small point ( ⁇ lmm 2 ) at the interfacial plane to create a Shockwave that initiates fracture; applying an inhomogeneous temperature distribution across the surfaces of substrate 10 and alloy film 12; and applying a temperature gradient across the surface normal of the alloy film 12 and substrate 10 (for example, higher temperature applied to one face of the alloy film, and lower temperature applied to one face of the substrate).
  • substrate 10 may be re-surfaced and another alloy film 12 deposited thereon.
  • a semiconductor device structure may be grown on alloy film 12, as illustrated in Fig. 2.
  • the semiconductor device structure is a Ill-nitride LED that emits blue or UV light
  • other electronic and optoelectronic devices such as laser diodes, high electron mobility transistors, and heterojunction bipolar transistors may be formed on the substrates described herein.
  • semiconductor structure 22 is grown over alloy film 12.
  • the semiconductor structure 22 includes a light emitting or active region 23 sandwiched between n- and p-type regions 21 and 25.
  • An n-type region 21 is typically grown first and may include multiple layers of different compositions and dopant concentration including, for example, preparation layers such as buffer layers or nucleation layers, which may be n-type or not intentionally doped, and n- or even p-type device layers designed for particular optical or electrical properties desirable for the light emitting region to efficiently emit light.
  • a light emitting or active region 23 is grown over the n-type region 21.
  • suitable light emitting regions 23 include a single thick or thin light emitting layer, or a multiple quantum well light emitting region including multiple thin or thick light emitting layers separated by barrier layers.
  • a p-type region 25 is grown over the light emitting region 23. Like the n-type region 21 , the p-type region 25 may include multiple layers of different composition, thickness, and dopant concentration, including layers that are not intentionally doped, or n-type layers.
  • ScMgA10 4 is the substrate 10 and the alloy film 12 is Ino.i 4 Ga 0 .86N.
  • the n-type, light-emitting, and p-type layers are formed of Ino.i 4 Ga 0 .86N, Ino.i 6 Ga 0 .8 4 N, and Ino.i 2 Ga 0 .88N respectively.
  • the structure illustrated in Fig. 2 may be processed into any suitable device design, including but not limited to the thin film flip chip device illustrated in Fig. 3 and the vertical device illustrated in Fig. 4.
  • p-contact metal 26 is disposed on the p-type region 25, then portions of the p-type region 25 and active region 23 are etched away to expose an n- type layer for metallization.
  • the p-contacts 26 and n-contacts 24 are on the same side of the device.
  • P-contacts 26 are electrically isolated from n-contacts 24 by gaps 27, which may be filled with an electrically insulating material such as a dielectric.
  • p- contacts 26 may be disposed between multiple n-contact regions 24, though this is not necessary.
  • either or both the n-contact 24 and the p-contact 26 are reflective and the device is mounted such that light is extracted through the top of the device in the orientation illustrated in Fig. 3.
  • the contacts may be limited in extent or made transparent, and the device may be mounted such that light is extracted through the surface on which the contacts are formed.
  • the semiconductor structure is attached to a mount 28.
  • the alloy film on which semiconductor structure 22 is grown may be removed, as illustrated in Fig. 3, or it may remain part of the device.
  • the semiconductor layer exposed by removing the alloy film, or the alloy film itself in embodiments where it remains part of the device is patterned or roughened, which may improve light extraction from the device. [0036]
  • an n-contact is formed on one side of the semiconductor structure 22, and a p-contact is formed on the other side of the
  • the p-contact 26 may be formed on the p-type region 25 and the device may be attached to mount 28 through p-contact 26. All or a portion of the alloy film may be removed and an n-contact 24 may be formed on a surface of the n-type region 21 exposed by removing a portion of the alloy film. Electrical contact to the n-contact may be made with a wire bond as illustrated in Fig. 4 or a metal bridge. In some embodiments, all or a portion of the alloy film remains in the device and electrical contact is made to the alloy film.
  • the LED may be combined with one or more wavelength converting materials such as phosphors, quantum dots, or dyes to create white light or monochromatic light of other colors. All or only a portion of the light emitted by the LED may be converted by the wavelength converting materials. Unconverted light emitted by the LED may be part of the final spectrum of light, though it need not be.
  • one or more wavelength converting materials such as phosphors, quantum dots, or dyes to create white light or monochromatic light of other colors. All or only a portion of the light emitted by the LED may be converted by the wavelength converting materials. Unconverted light emitted by the LED may be part of the final spectrum of light, though it need not be.
  • Examples of common combinations include a blue-emitting LED combined with a yellow-emitting phosphor, a blue-emitting LED combined with green- and red- emitting phosphors, a UV-emitting LED combined with blue- and yellow-emitting phosphors, and a UV-emitting LED combined with blue-, green-, and red-emitting phosphors.
  • Wavelength converting materials emitting other colors of light may be added to tailor the spectrum of light emitted from the device.
  • the wavelength converting element may be, for example, a pre-formed ceramic phosphor layers that is glued or bonded to the LED or spaced apart from the LED, or a powder phosphor or quantum dots disposed in an organic or inorganic encapsulant that is stenciled, screen printed, sprayed, sedimented, evaporated, sputtered, or otherwise dispensed or deposited over the LED.
  • a ternary, quaternary, or quinary semiconductor alloy film may have several advantages over available elemental and binary semiconductor substrates.
  • the crystal structure and in-plane lattice constant of the alloy films described above may be better matched to the Ill-nitride device structure. This may result in higher crystalline quality (for example, fewer defects), less stress on the active layers which may improve optoelectronic properties of the materials and may improve device performance, and a better match of thermal expansion characteristics of the substrate and device layer, which may result in higher manufacturing yields for the devices.

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Abstract

In a method according to embodiments of the invention, a Ill-nitride layer is grown on a substrate. The substrate is RA03(MO)n, where R is selected from Sc, In, Y, and the lanthanides; A is selected from Fe (III), Ga, and A1; M is selected from Mg, Mn, Fe (II), Co, Cu, Zn and Cd; and n is an integer ≥ 1. In some embodiments, [(|asubstrate - alayer|)/asubstrate]* 100% is no more than 1%, where asubstrate is an in-plane lattice constant of the substrate and alayer is a bulk lattice constant of the III -nitride layer. In another method according to embodiments of the invention, a Ill-nitride layer is grown on a substrate. The substrate is a non-III-nitride material. The Ill-nitride layer is a ternary, quaternary, or quinary alloy. The Ill-nitride layer is thick enough to be mechanically self-supporting and has a low defect density.

Description

III-NITRIDE LAYER GROWN ON A SUBSTRATE
BACKGROUND
FIELD OF INVENTION
[0001] The present invention relates to growing a III -nitride layer on a substrate. The III- nitride layer may be used as a growth substrate for a semiconductor light emitting device structure.
DESCRIPTION OF RELATED ART
[0002] Semiconductor light-emitting devices including light emitting diodes (LEDs), resonant cavity light emitting diodes (RCLEDs), vertical cavity laser diodes (VCSELs), and edge emitting lasers are among the most efficient light sources currently available. Materials systems currently of interest in the manufacture of high-brightness light emitting devices capable of operation across the visible spectrum include Group III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as Ill-nitride materials. Typically, III -nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a sapphire, silicon carbide, Ill-nitride, or other suitable substrate by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. The stack often includes one or more n-type layers doped with, for example, Si, formed over the substrate, one or more light emitting layers in an active region formed over the n-type layer or layers, and one or more p-type layers doped with, for example, Mg, formed over the active region. Electrical contacts are formed on the n- and p-type regions.
[0003] Since native Ill-nitride substrates are generally expensive and not widely available, Ill-nitride devices are often grown on sapphire or SiC substrates. These non-III-nitride substrates are less than optimal because sapphire and SiC have different lattice constants than the Ill-nitride layers grown on them, causing strain and crystal defects in the Ill-nitride device layers, which can cause poor performance and reliability problems.
[0004] US 6,086,673 teaches "producing a nitride layer on a growth substrate. . . . [F]or many applications a free-standing GaN layer is preferred. . . . GaN growth can be carried out on a growth substrate which is either inherently or intentionally engineered to exhibit a mechanical weakness, in a plane parallel to the predominant growth surface, of sufficient magnitude to promote a mechanical failure along that plane, and to result in delamination of the epitaxial nitride layer due to thermal stress produced as the substrate and nitride layer are cooled after the nitride growth. . . . The cool-down and delamination mechanism . . . [enables] the formation of thick, crack-free, as well as free-standing, GaN layers. . . . [S]uitable foreign substrates for promoting automatic GaN layer delamination include, e.g., micaceous, i.e., layered or graphitic, materials such as ScMgA104, and the class of mica materials."
SUMMARY
[0005] It is an object of the invention to provide a Ill-nitride alloy film grown on a substrate. In some embodiments, a Ill-nitride light emitting device structure may be grown on the III- nitride alloy film.
[0006] In a method according to embodiments of the invention, a Ill-nitride layer is grown on a substrate. The substrate is RA03(MO)n, where R is selected from Sc, In, Y, and the lanthanides; A is selected from Fe (III), Ga, and Al; M is selected from Mg, Mn, Fe (II), Co, Cu, Zn and Cd; and n is an integer > 1. In some embodiments, [(|asubstrate - alayer|)/asubstrate]* 100% is no more than 1%, where asubstrate is an in-plane lattice constant of the substrate and aiayer is a bulk lattice constant of the Ill-nitride layer.
[0007] In a method according to embodiments of the invention, a Ill-nitride layer is grown on a substrate. The substrate is a non-III-nitride material. The Ill-nitride layer is a ternary, quaternary, or quinary alloy. The Ill-nitride layer is thick enough to be mechanically self- supporting and has a low defect density.
[0008] The Ill-nitride alloy films described herein may be used as growth substrates for III- nitride light emitting devices. Ill-nitride light emitting devices grown on such alloy films may have less strain and therefore better performance than conventionally grown Ill-nitride light emitting devices.
BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Fig. 1 illustrates an alloy film grown on a substrate.
[0010] Fig. 2 illustrates a semiconductor device structure grown on an alloy film.
[0011] Fig. 3 illustrates a thin film flip chip light emitting device.
[0012] Fig. 4 illustrates a vertical light emitting device. DETAILED DESCRIPTION
[0013] One method of producing a thick layer of a ternary or quaternary Ill-nitride alloy film on which a Ill-nitride device may be grown is to deposit the alloy film by a high-growth rate deposition technique such as HVPE (hydride vapor phase epitaxy) on a binary semiconductor template film, such as GaN, which is deposited on a conventional substrate such as sapphire. The lattice mismatch between the substrate (sapphire, in this example) and the template film (GaN, in this example) is generally large (>1%), so the GaN will contain many defects. The alloy film (InGaN in this example) is also highly mismatched to the binary film (>1% lattice mismatch), thus additional defects or inhomogeneities are incorporated into the alloy film during its growth. Devices grown on alloy films produced by this method may exhibit poor
performance, due to the defects caused by the lattice mismatch. Furthermore, the thickness of the alloy film is generally not more than a few micrometers, in order to minimize the density of additional defects, and is therefore not mechanically self-supporting. Thus, the device growth is performed on a composite substrate comprising, in this example, sapphire, GaN, and InGaN, all of which have different thermal expansion coefficients which may cause significant wafer bow or other geometrical distortions.
[0014] In embodiments of the invention, a substrate is provided which is lattice matched (or nearly so) to the desired alloy film and of the same hexagonal symmetry. Since the substrate is lattice matched, fewer defects or inhomogeneities will be incorporated in the alloy film during growth, and the film can be grown thicker (for example, greater than 50 μιη thick in some embodiments, greater than 100 μιη thick in some embodiments, and greater than 200 μιη thick in some embodiments) so as to be mechanically self-supporting. The substrate can be removed from the thick alloy film and may be subsequently reused.
[0015] Fig. 1 illustrates an alloy film 12 grown on a substrate 10 according to embodiments of the invention. A layer of semiconductor material may be characterized by a bulk lattice constant and an in-plane lattice constant. The bulk lattice constant is the lattice constant of a theoretical, fully-relaxed layer of the same composition as the semiconductor layer. The in-plane lattice constant is the lattice constant of the semiconductor layer as grown. If the semiconductor layer is strained, the bulk lattice constant is different from the in-plane lattice constant. If the semiconductor layer is grown on a substantially lattice-matched substrate, the bulk lattice constant of the semiconductor layer will be nearly the same as the in-plane lattice constant of the semiconductor layer and the same as the in-plane lattice constant of the substrate, with no cracking or other strain relief. For a substrate grown as a bulk ingot and sliced into wafers, the in-plane lattice constant of the substrate may be the same as the bulk lattice constant of the substrate. For a substrate grown with strain or a composite substrate, the in-plane lattice constant of the substrate may be different from the bulk lattice constant of the substrate. Alloy film 12 has a bulk lattice constant aiayer within 1% of the in-plane lattice constant asubstrate of substrate 10 in some embodiments, and within 0.5% of the in-plane lattice constant asubstrate of substrate 10 in some embodiments. In other words, [(|asubstrate - aiayer|)/aSubstrate]* 100% is no more than 1% in some embodiments, and no more than 0.5% in some embodiments.
[0016] Substrate 10 is a non-III-nitride material. In some embodiments, substrate 10 has similar or the same hexagonal wurtzite symmetry as the alloy film 12. In some embodiments, substrate 10 is substantially impervious to attack by the chemical and thermal environment experienced during the deposition of the alloy film 12. In some embodiments, substrate 10 has an in-plane coefficient of thermal expansion within 30% of that of the deposited alloy film 12. In some embodiments, substrate 10 may or may not be transparent to near-UV radiation. In some embodiments, substrate 10 is a single crystal or substantially single crystal material.
[0017] In some embodiments, substrate 10 is a material of general composition RA03(MO)n, where R is a trivalent cation, often selected from Sc, In, Y, and the lanthanides (atomic number 57-71 ); A is also a trivalent cation, often selected from Fe (III), Ga, and Al; M is a divalent cation, often selected from Mg, Mn, Fe (II), Co, Cu, Zn and Cd; and n is an integer > 1. In some embodiments, n < 9 and in some embodiments, n < 3. In some embodiments, RAMO4 (i.e., n=l) compounds are of the YbFe2C>4 structure type, and RA03(MO)n (n > 2) compounds are of the InFe03(ZnO)n structure type.
[0018] The following table lists examples of suitable materials for substrate 10 and the compositions of InGaN alloys which have the same in-plane lattice constant as the respective substrate:
Material In-plane substrate Visual Appearance x in lattice-matched lattice constant a (A) InxGai_xN
InFeZn205 3.309 Brown 0.34
InFeZnsOn 3.276 Brown 0.25 ScGaMg04 3.272 Transparent 0.24
ScAlMg04 3.236 Transparent 0.14
InAlMg04 3.29 Transparent 0.29
ScAlMn04 3.26 Transparent 0.20
InFeMn04 3.356 Brown 0.48
InAlMn04 3.319 Black 0.37
InAlCo04 3.301 Black 0.32
InGaFe04 3.313 Black 0.36
[0019] These and related substrate materials are described in detail by Kimizuka and Mohri in "Structural Classification of RA03(MO)n Compounds (R = Sc, In, Y, or Lanthanides; A = Fe(III), Ga, Cr, or Al; M = Divalent Cation; n = 1-11)", published in Journal of Solid State Chemistry 78, 98 (1989), which is incorporated herein by reference.
[0020] In some embodiments, alloy film 12 is grown on a surface of substrate 10 that is "miscut" or angled relative to a major crystallographic plane of the substrate. In some embodiments, the surface of substrate 10 on which alloy film 12 is grown may be oriented between -10 and +10 degrees away from the basal (0001) plane. In some embodiments, miscuts between -0.15 and +0.15 degrees tilted from the (0001) plane may result in large atomic terraces on the substrate surface that may desirably reduce the number of defects formed at terrace edges.
[0021] Alloy film 12 is deposited on substrate 10 by any of the means known in the art, including, for example, metalorganic chemical vapor deposition (MOCVD), HVPE, or molecular beam epitaxy (MBE). Perfect lattice match between the alloy film 12 and the substrate 10 is not necessary, although lattice match within 0.1% may permit the deposition of high-quality alloy films 12 at least 50 μιη thick. For purposes of embodiments of the present invention, the bulk lattice constant of a ternary or quaternary AlInGaN layer may be estimated according Vegard's law, which for AlxInyGazN may be expressed as aAiinGaN = X(¾AIN) + y(aiNN) + z(aGAN), where x + y + z = 1, and the variable "a" refers to the bulk a- lattice constant of each binary material. A1N has a bulk a- lattice constant of 3.111 A, InN has a bulk a-lattice constant of 3.544 A, and GaN has a bulk a-lattice constant of 3.1885 A.
[0022] Alloy film 12 may be any material on which a III -nitride device structure may be grown. Alloy film 12 is often a ternary (such as InGaN or AlGaN), quaternary (such as AlInGaN), or quinary (such as BAlInGaN) alloy of Ill-nitride or other III-V material. As illustrated in the above table, in some embodiments the fraction of InN in an InGaN alloy film 12 may be between 14% and 48%. Ill-nitride device structures with active regions that emit visible light from the blue through the red-orange portions of the visible spectrum may be grown on the substrates listed in the above table. Alloy film 12 may be grown such that a defect density is less than 5xl08 cm"2 in some embodiments and less than 107 cm"2 in some embodiments.
[0023] In some embodiments, alloy film 12 is doped with one or more n-type dopants such as, for example, Si, Ge, or Sn, or one or more p-type dopants such as, for example, Mg, Be, Zn, or Cd. A doped alloy film 12 may be used for example in a vertical device where a contact is formed on a surface of alloy film 12 opposite the device structure. In some embodiments, alloy film 12 is doped with one or more dopants to make the alloy film insulating, such as Fe and/or C. An insulating alloy film may be used where several devices such as LEDs are monolithically formed on a single alloy film 12. The insulating alloy film may electrically isolate neighboring devices. One example of several devices monolithically formed on a single alloy film is an array of LEDs that may be connected to an alternating current power source. In some embodiments, alloy film 12 is not intentionally doped, or compensated and semi- insulating. In some embodiments, one or more dopants are used to fine-tune the lattice constant of alloy film 12 to reduce lattice mismatch with substrate 10, which may reduce the amount of indium required in alloy film 12 and/or permit a thicker alloy film 12 to be grown.
[0024] In some embodiments, alloy film 12 is removed from substrate 10.
[0025] If substrate 10 is transparent, in some embodiments alloy film 12 is removed by laser lift-off, where a laser beam is directed through the substrate. The layer of III -nitride material grown first on substrate 10 absorbs the laser light and melts, releasing alloy film 12 from the substrate. Laser lift-off may be facilitated by an optional layer 14 of lower-energy-gap alloy semiconductor interposing the thick alloy film 12 and the substrate 10. The composition of lower-energy-gap layer 14 may be selected such that layer 14 may absorb more of the incident laser light than the thick alloy film 12, which may reduce the incident flux required to melt the interface between the substrate 10 and the semiconductor material and may produce less distributed damage throughout the alloy film 12.
[0026] In some embodiments, layer 14 is a discontinuous patterned film of non-III-nitride material such as SiNx or Si02 provided on substrate 10 prior to deposition of alloy film 12, such that the alloy film nucleates and grows preferentially on the exposed portions of the substrate, then coalesces over the discontinuous pattern after sufficient thickness is deposited. The patterned layer may preferentially absorb the incident laser light, causing localized melting and fracture of the alloy film/substrate interface.
[0027] In some embodiments, an optional zone of weakness 16 is provided at or near the interface of alloy film 12 and substrate 10 in order to encourage the fracture of that interface and thereby make it easier to remove the alloy film from the substrate. A zone of weakness may be provided in the substrate 10 or alloy film 12 by implantation of one or more of H or N or other atoms prior to or after deposition of all or part of the alloy film or patterned film. A zone of weakness 16 in alloy film 12 may be provided by growing alloy film 12 first with a higher mole fraction of InN (at a certain growth temperature) and subsequently with a lower mole fraction of InN (preferentially at a composition that is lattice matched to the substrate, at a certain higher growth temperature). The higher-InN-bearing alloy film may transform at the higher growth temperature according to its phase diagram into regions of even higher and lower indium composition. The regions of highest indium composition are more absorbent of incident laser light, and the mechanical stress due to the spatially varying indium composition will create a layer of mechanical weakness in the alloy film.
[0028] A zone of weakness 16 may also be provided at the alloy film 12/substrate 10 interface by patterning the surface of the substrate (e.g. with a rectangular or triangular lattice of ridges of substrate material) prior to deposition of alloy film 12.
[0029] A zone of weakness 16 may also be provided at the alloy film 12/substrate 10 interface by exposing the wafer to a pattern of tightly focused, pulsed laser beams of sufficient intensity and photon energy to create a plurality of micron-scale crystal defects or voids in the crystalline structure. The pattern of crystal damage may be generated by rastering one or more laser beams across the wafer, or by using diffractive optics to generate a large number of spots from a single high power laser such as an excimer laser. The laser beams may be strongly converging with a short sub-microsecond pulse, and may create highly localized damage. This exposure could occur through the epitaxy stack after growth with sufficiently low dose that further wafer processing may be done after exposure. In some embodiments, the substrate is removed after the subsequent wafer processing, for example in a die-level rather than a wafer- level process. Also, the total power of the exposure may be less than required for traditional laser lift-off, which may result in less mechanical shock.
[0030] In some embodiments, substrate 10 is removed by etching, such as wet chemical etching. For example, ScMgA104 is readily attacked by aqueous mixtures of H3PO4 and H202, H2S04:H202:H20, and aqueous mixtures of HF, as reported by C. D. Brandle, et al. in "Dry and Wet Etching of ScMgA104" published in Solid-State Electronics, 42, 467 (1998), which is incorporated herein by reference. In some embodiments, all or part of growth substrate 30 is removed by reactive ion etching using a gaseous mixture of Cl2 and Ar at an applied power of 800 Watts.
[0031] Substrate materials shown in the table above have micaceous character, wherein the (0001) basal plane of the crystal (i.e. the face parallel to the surface of the substrate in the case where the substrate orientation is (0001)) preferentially fractures. The substrate 10 may be removed from alloy film 12 by mechanical methods. Suitable methods include but are not limited to mechanical grinding with, for example, polishing slurry; applying a rotational force between the substrate and the alloy film; attaching an adhesive-coated plastic film to the substrate and a second adhesive-coated plastic film to the alloy layer and pulling the substrate and alloy film apart; using a sharp blade to break the interface between the substrate and the alloy film; applying a pulse of sonic energy; applying one or more laser pulses focused to a small point (<lmm2) at the interfacial plane to create a Shockwave that initiates fracture; applying an inhomogeneous temperature distribution across the surfaces of substrate 10 and alloy film 12; and applying a temperature gradient across the surface normal of the alloy film 12 and substrate 10 (for example, higher temperature applied to one face of the alloy film, and lower temperature applied to one face of the substrate).
[0032] Once substrate 10 is removed from alloy film 12, substrate 10 may be re-surfaced and another alloy film 12 deposited thereon.
[0033] After substrate 10 is removed, a semiconductor device structure may be grown on alloy film 12, as illustrated in Fig. 2. Though in the examples below the semiconductor device structure is a Ill-nitride LED that emits blue or UV light, other electronic and optoelectronic devices such as laser diodes, high electron mobility transistors, and heterojunction bipolar transistors may be formed on the substrates described herein.
[0034] As illustrated in Fig. 2, semiconductor structure 22 is grown over alloy film 12. The semiconductor structure 22 includes a light emitting or active region 23 sandwiched between n- and p-type regions 21 and 25. An n-type region 21 is typically grown first and may include multiple layers of different compositions and dopant concentration including, for example, preparation layers such as buffer layers or nucleation layers, which may be n-type or not intentionally doped, and n- or even p-type device layers designed for particular optical or electrical properties desirable for the light emitting region to efficiently emit light. A light emitting or active region 23 is grown over the n-type region 21. Examples of suitable light emitting regions 23 include a single thick or thin light emitting layer, or a multiple quantum well light emitting region including multiple thin or thick light emitting layers separated by barrier layers. A p-type region 25 is grown over the light emitting region 23. Like the n-type region 21 , the p-type region 25 may include multiple layers of different composition, thickness, and dopant concentration, including layers that are not intentionally doped, or n-type layers. In one example, ScMgA104 is the substrate 10 and the alloy film 12 is Ino.i4Ga0.86N. In this example, the n-type, light-emitting, and p-type layers are formed of Ino.i4Ga0.86N, Ino.i6Ga0.84N, and Ino.i2Ga0.88N respectively. The structure illustrated in Fig. 2 may be processed into any suitable device design, including but not limited to the thin film flip chip device illustrated in Fig. 3 and the vertical device illustrated in Fig. 4.
[0035] In the device illustrated in Fig. 3, p-contact metal 26 is disposed on the p-type region 25, then portions of the p-type region 25 and active region 23 are etched away to expose an n- type layer for metallization. The p-contacts 26 and n-contacts 24 are on the same side of the device. P-contacts 26 are electrically isolated from n-contacts 24 by gaps 27, which may be filled with an electrically insulating material such as a dielectric. As illustrated in Fig. 3, p- contacts 26 may be disposed between multiple n-contact regions 24, though this is not necessary. In some embodiments either or both the n-contact 24 and the p-contact 26 are reflective and the device is mounted such that light is extracted through the top of the device in the orientation illustrated in Fig. 3. In some embodiments, the contacts may be limited in extent or made transparent, and the device may be mounted such that light is extracted through the surface on which the contacts are formed. The semiconductor structure is attached to a mount 28. The alloy film on which semiconductor structure 22 is grown may be removed, as illustrated in Fig. 3, or it may remain part of the device. In some embodiments, the semiconductor layer exposed by removing the alloy film, or the alloy film itself in embodiments where it remains part of the device, is patterned or roughened, which may improve light extraction from the device. [0036] In the vertical injection LED illustrated in Fig. 4, an n-contact is formed on one side of the semiconductor structure 22, and a p-contact is formed on the other side of the
semiconductor structure. For example, the p-contact 26 may be formed on the p-type region 25 and the device may be attached to mount 28 through p-contact 26. All or a portion of the alloy film may be removed and an n-contact 24 may be formed on a surface of the n-type region 21 exposed by removing a portion of the alloy film. Electrical contact to the n-contact may be made with a wire bond as illustrated in Fig. 4 or a metal bridge. In some embodiments, all or a portion of the alloy film remains in the device and electrical contact is made to the alloy film.
[0037] The LED may be combined with one or more wavelength converting materials such as phosphors, quantum dots, or dyes to create white light or monochromatic light of other colors. All or only a portion of the light emitted by the LED may be converted by the wavelength converting materials. Unconverted light emitted by the LED may be part of the final spectrum of light, though it need not be. Examples of common combinations include a blue-emitting LED combined with a yellow-emitting phosphor, a blue-emitting LED combined with green- and red- emitting phosphors, a UV-emitting LED combined with blue- and yellow-emitting phosphors, and a UV-emitting LED combined with blue-, green-, and red-emitting phosphors. Wavelength converting materials emitting other colors of light may be added to tailor the spectrum of light emitted from the device.
[0038] The wavelength converting element may be, for example, a pre-formed ceramic phosphor layers that is glued or bonded to the LED or spaced apart from the LED, or a powder phosphor or quantum dots disposed in an organic or inorganic encapsulant that is stenciled, screen printed, sprayed, sedimented, evaporated, sputtered, or otherwise dispensed or deposited over the LED.
[0039] A ternary, quaternary, or quinary semiconductor alloy film may have several advantages over available elemental and binary semiconductor substrates. For example, the crystal structure and in-plane lattice constant of the alloy films described above may be better matched to the Ill-nitride device structure. This may result in higher crystalline quality (for example, fewer defects), less stress on the active layers which may improve optoelectronic properties of the materials and may improve device performance, and a better match of thermal expansion characteristics of the substrate and device layer, which may result in higher manufacturing yields for the devices. [0040] Having described the invention in detail, those skilled in the art will appreciate that, given the present disclosure, modifications may be made to the invention without departing from the spirit of the inventive concept described herein. Therefore, it is not intended that the scope of the invention be limited to the specific embodiments illustrated and described.

Claims

CLAIMS: What is being claimed is:
1. A method comprising:
growing a Ill-nitride layer on a substrate; wherein
the substrate is RA03(MO)n, where R is selected from Sc, In, Y, and the lanthanides; A is selected from Fe (III), Ga, and Al; M is selected from Mg, Mn, Fe (II), Co, Cu, Zn and Cd; and n is an integer > 1 ;
the substrate has an in-plane lattice constant asubstrate;
the Ill-nitride layer has a bulk lattice constant Ά\ΆγβΙ; and
[(|asubstrate - aiayer|) aSubstrate] * 100% is no more than 1%.
2. The method of claim 1 wherein the substrate is one of ScMgA104, ScGaMg04, ScAlMnC-4, InAlMn04.
3. The method of claim 1 wherein the Ill-nitride layer is one of InGaN and AlInGaN.
4. The method of claim 1 wherein the Ill-nitride layer has a thickness greater than 50 μιη.
5. The method of claim 1 further comprising removing the substrate.
6. The method of claim 5 further comprising growing on the Ill-nitride layer a structure comprising a Ill-nitride light emitting layer disposed between an n-type region and a p- type region.
7. The method of claim 6 wherein n-type region comprises at least one layer of Ino.i4Ga0.86N, the light emitting layer comprises Ino.i6Gao.84N, and the p-type region comprises at least one layer of Ino.i2Ga0.88N.
8. The method of claim 5 wherein removing comprises melting a sacrificial layer disposed between the substrate and the Ill-nitride layer.
9. The method of claim 8 wherein the sacrificial layer is one of patterned non-III- nitride film and a Ill-nitride material having a lower band gap than the Ill-nitride layer.
10. The method of claim 5 wherein removing comprises one of removing by a mechanical method and breaking an interface between the Ill-nitride layer and the substrate using a blade.
11. The method of claim 5 wherein removing comprises separating the substrate from the Ill-nitride layer at a zone of weakness disposed in the substrate, in the Ill-nitride layer, or at an interface between the substrate and the Ill-nitride layer.
12. The method of claim 11 wherein the zone of weakness comprises a patterned layer.
13. The method of claim 11 wherein the zone of weakness comprises a region implanted with one of H atoms and N atoms.
14. The method of claim 11 wherein the Ill-nitride layer is InGaN and the zone of weakness comprises a region having a higher InN composition than the Ill-nitride layer.
15. The method of claim 11 wherein the zone of weakness comprises a plurality of micron scale crystal defects or voids created by irradiation with focused laser beams.
16. A method comprising growing a Ill-nitride layer on a substrate, wherein:
the substrate is a non-III-nitride material;
the Ill-nitride layer is a ternary, quaternary, or quinary alloy;
the Ill-nitride layer is thick enough to be mechanically self-supporting; and
the Ill-nitride layer has a defect density less than 5x108 cm"2.
17. The method of claim 16 further comprising removing the substrate from the III- nitride layer.
18. The method of claim 17 further comprising growing a light emitting layer on the Ill-nitride layer after removing the substrate.
19. The method of claim 16 wherein the substrate is one of ScMgA104, ScGaMg04, ScAlMnC-4, InAlMn04.
20. The method of claim 16 wherein:
the substrate has an in-plane lattice constant asubstrate;
the Ill-nitride layer has a bulk lattice constant Ά\ΆγβΙ; and
[(|asubstrate - aiayer|) aSubstrate] * 100% is no more than 1%.
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