EP2471168A2 - Inverseur - Google Patents

Inverseur

Info

Publication number
EP2471168A2
EP2471168A2 EP10760750A EP10760750A EP2471168A2 EP 2471168 A2 EP2471168 A2 EP 2471168A2 EP 10760750 A EP10760750 A EP 10760750A EP 10760750 A EP10760750 A EP 10760750A EP 2471168 A2 EP2471168 A2 EP 2471168A2
Authority
EP
European Patent Office
Prior art keywords
voltage
switching
arm
power inverter
inverter according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP10760750A
Other languages
German (de)
English (en)
Inventor
David Gurwicz
Maurice Plews
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Turbo Power Systems Ltd
Original Assignee
Turbo Power Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Turbo Power Systems Ltd filed Critical Turbo Power Systems Ltd
Publication of EP2471168A2 publication Critical patent/EP2471168A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33573—Full-bridge at primary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/0074—Plural converter units whose inputs are connected in series
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0067—Converter structures employing plural converter units, other than for parallel operation of the units on a single load
    • H02M1/0077—Plural converter units whose outputs are connected in series

Definitions

  • the present invention generally relates to inverters, particularly to inverters for high power applications.
  • a problem that can arise particularly in high power applications is that high input voltages may be encountered, particularly transients.
  • the inverter components must be able to withstand the input voltages without damage.
  • Higher voltage requirements impose problems on sourcing suitable semiconductor switching elements. Whereas high power switching elements able to operate at a few hundred volts may be readily available, devices for higher voltages may be much more expensive, often bulkier and sometimes difficult to achieve due to physical constraints. Moreover, where available, switching losses for higher voltage devices are greater and switching times are longer, so they can only be practically used at lower frequencies, leading to a requirement for larger output transformers.
  • an inverter which operates using semiconductors directly coupled to the input would provide an environmental benefit as there would be energy savings due to having a lower mass to move and avoiding input transformer losses.
  • a first aspect of the invention provides a power inverter arranged to receive input power having an input voltage across first and second input terminals, comprising: a first switching arm comprising a first switching element connected to conduct current between a first connection and an output of the first arm and a second switching element connected to conduct current between the first arm output and a second connection; a second switching arm comprising a third switching element connected to conduct current between a third connection and an output of the second arm and a fourth switching element connected to conduct current between the second arm output and a fourth connection; wherein the first and second switching arms are connected in series across the input terminals with the first connection of the first arm coupled to the first input terminal, the second connection of the first arm coupled to the third connection of the second arm and the fourth connection of the second arm coupled to the second input terminal; a voltage divider coupled across the input terminals having an output of the voltage divider coupled to the second and third connections; an output coupling connected between the outputs of the first and second switching arms; drive circuitry for driving each of the first, second, third and fourth
  • the maximum voltage "seen" by each switching arm is less than the input voltage.
  • the device will be generally symmetrical, i.e. with similar arms, and voltage divider will be arranged to divide the input voltage substantially in half and each arm will see half the input voltage.
  • the inverter is arranged so that the proportion across each arm is substantially constant.
  • the inverter is preferably arranged to maintain the proportion across each arm substantially within limits.
  • the inverter may be arranged to ensure that the proportion across any one arm does not exceed %, preferably is no greater than 2/3 of the total voltage, and in preferred arrangements will be arranged to ensure the voltage is within 45 and 55% to reduce switching imbalances.
  • the inverter may additionally or alternatively be arranged to ensure that the voltage across each arm does not exceed a given absolute voltage, (which may be related to device breakdown voltages).
  • the inverter may have protection means, which may be hard-wired protection circuitry or logic and/or modifications to the inverter drive circuitry/algorithm to maintain voltage within limits.
  • the inverter may use a voltage divider which is not capable of passing sustained full power to each arm individually. Because the arms are connected in parallel with the divider, the inverter arms serve to supply current to each other in addition to the voltage divider.
  • the voltage divider comprises capacitors connected in series which serve to store energy.
  • the inverter operates at a higher frequency than the supply frequency (in the case of an AC supply which is rectified in the inverter).
  • the inverter also preferably operates at higher frequency than the original AC supply.
  • the inverter operates at at least 10 times the supply frequency, more preferably at least 100 times the supply frequency.
  • the inverter operates at an ultrasonic frequency (preferably greater than 2OkHz) as this reduces the problem audible noise from components such as transformers or from magnetic fields induced in other components.
  • the capacitors are sized so that maximum voltage change across an arm during a cycle of the inverter output is no more than 50% of the nominal voltage, preferably less than 20%, preferably less than 1/6, typically less than 10%, ideally less than 5% and in preferred practical arrangements less than 2%, of the order of 1% or less.
  • the inverter operates at a frequency greater than IkHz (giving a cycle period of 1ms), more preferably at the order of 10kHz or greater, preferably greater than 20 kHz (or at least 15kHz) to reduce audible noise. Higher frequencies reduce both capacitor and output transformer size requirements, although use excessively high frequencies may be problematic to switch and generate radio frequency interference. An operation frequency between about 5 kHz and 100 kHz. preferably between 15kHz and 50kHz is therefore convenient.
  • Each arm effectively performs two functions, its primary function of switching the output as in a conventional inverter and a secondary function of supplying current to the other arm(s) with which it is connected in series, effectively to "top up" the voltage divider.
  • the voltage divider is thus effectively regulated.
  • Pulse width modulation controls the output power by adjusting the duty cycle of the switching elements so that they are on for a shorter time when less power is required.
  • PWM pulse width modulation
  • phase shift modulation both arms are driven at 50% duty cycle (although applications are possible where this may vary) with the phase of the arms varying.
  • an output transformer connected between them receives no net signal and when they are in antiphase, maximum signal is delivered to the output transformer, thus the output can be varied smoothly between zero and full power.
  • a phase shift arrangement requires slightly more complex drive circuitry but this can be readily achieved with a digital signal processor and dedicated drive circuits are now becoming available.
  • the invention can be applied to both types of drive arrangement (or modifications).
  • the drive circuitry may actively seek to adjust duty cycles finely to take into account imbalances if desired. Protection circuitry or algorithm may be included to adjust duty cycles if voltage deviates too far from a target point. This may be as simple as hardwired logic which prevents one arm from conducting at all while the voltage across the other arm exceeds a threshold.
  • phase shift arrangement In a phase shift arrangement, however, imbalances will tend to build up (other than at zero and full power) as the arm which leads may systematically take more current from the upper side than the arm which lags (or vice versa depending on the point in the cycle) and the voltage at the divider junction will tend to drift up or down. Thus the arrangement at first sight seems unsuited to phase shift modulation. According to a preferred arrangement in a further inventive development, however, it has been proposed to adjust the phase shift, and preferably in particular the order in which the arms lead and lag, to keep the divider voltage within limits. This can be done dynamically in response to measurement of voltage.
  • a simple first order correction can be achieved however simply by allowing one arm to "lead” for one or more cycles and then allowing the other to lead for a similar number of cycles. It has been found that switching the order in which arms lead and lag can be done without producing unacceptable transients. Switching between lead and lag can be achieved by adjusting one waveform only (preferably smoothly, for example by compressing or expanding the drive waveform) one (i.e. increasing frequency) while expanding the other (i.e. decreasing frequency))
  • the invention has been described in the context of dividing the voltage into two. However, for higher input voltages and/or lover device voltage limits, the voltage may be further divided, for example there may be division into 4 or more. Where the input voltage is divided into multiples, the output transformer may be coupled in a variety of ways, including multiphase arrangements.
  • the inverter preferably includes a capacitor coupled in series between the first and second arms and a primary winding of an output transformer.
  • the capacitor serves to block DC current from flowing through the primary (due to the different voltage levels of the arms).
  • the capacitor is sized so that at the switching frequency of the inverter, the voltage across the capacitor changes by no more than about 10%, preferably no more than 5% during a cycle of the inverter under normal current flow.
  • Figure 1 is a circuit schematic for a circuit comprising an inverter according to a first embodiment
  • Figure 2 is a circuit schematic for a circuit comprising an inverter according to a second embodiment
  • Figures 3a and 3b show circuit schematics for transformer output configurations;
  • Figure 4 shows a current vs. time plot in a transformer primary.
  • Figure 1 illustrates an inverter circuit 1 according to one embodiment of the present invention.
  • the inverter is powered by a voltage source 3.
  • the voltage source 3 provides a DC voltage with a magnitude of V. It will be appreciated that an AC voltage source can simply be rectified to provide this DC voltage source but in a railway application a DC source is provided.
  • the inverter comprises two switching arms.
  • the first switching arm has a first IGBT 5 and a second ⁇ GBT 7.
  • the first IGBT 5 connects between an anode terminal of the power source 3 and an output of the first arm.
  • the second IGBT 7 connects between point 21 and the output of the first arm.
  • the second switching arm has a third IGBT 9 and a forth IGBT 11.
  • the third IGBT 9 connects between the point 21 and an output of the second arm.
  • the forth IGBT 11 connects between the output of the second arm and a cathode terminal of the power source 3.
  • the IGBTs behave as switching elements. As those skilled in the art will appreciate, an IGBT allows a current between its emitter and collector once a voltage applied to its gate terminal exceeds a threshold voltage, and blocks any current if the gate voltage is below the threshold voltage.
  • the output of the first switching arm and the output of the second switching arm are coupled together by a primary winding 13 and a capacitor 15.
  • the capacitor 15 is used as a bypass capacitor which permits the transmission of AC signals and blocks any DC offsets.
  • a transformer scales the voltage of the primary winding and provides an output voltage.
  • the inverter uses a voltage divider which does not need to be capable of passing sustained full power to each arm individually.
  • the voltage divider comprises capacitors 17 and 19 connected in series and both coupled to the point 21. Capacitors are used to store energy to maintain voltage across each arm.
  • Each arm effectively performs two functions, its primary function of switching the output as in a conventional inverter and a secondary function of supplying current to the other arm(s) with which it is connected in series, effectively to "top up" the voltage divider. By appropriate control of the drive, the voltage divider is thus effectively regulated.
  • each switching arm serves a dual function as both a switching arm of the inverter and as a current source for the other arm the need for a separate supply or means to supply current
  • the maximum voltage "seen" by each switching arm is less than the input voltage.
  • the device will be generally symmetrical, i.e. with similar arms, and voltage divider will be arranged to divide the input voltage substantially in half and each arm will see half the input voltage.
  • the inverter is arranged so that the proportion across each arm is substantially constant.
  • the inverter is preferably arranged to maintain the proportion across each arm substantially within limits. For example, where the voltage across each arm is arranged to be nominally half, the inverter may be arranged to ensure that the proportion across any one arm does not exceed %, preferably is no greater than 2/3 of the total voltage. In practical arrangements, these limits may be much tighter, typically within 5% or 1% of the nominal value, to equalise switching losses in the switching elements.
  • the inverter may additionally or alternatively be arranged to ensure that the voltage across each arm does not exceed a given absolute voltage, (which may be related to device breakdown voltages).
  • the inverter comprises diodes 23, 25, 27 and 29 to pass reverse currents.
  • Protection means may be used, such as hard-wired protection circuitry or logic and/or modifications to the inverter drive circuitry/algorithm to maintain voltage within limits.
  • inverters pulse width modulation (PWM) and phase shift modulation.
  • Pulse width modulation controls the output power by adjusting the duty cycle of the switching elements so that they are on for a shorter time when less power is required.
  • a slight drawback of PWM is that at low power settings, the switching elements need to switch on and off very rapidly to give short on times, which imposes a practical lower limit on the output.
  • phase shift modulation both arms are driven at 50% duty cycle (although applications are possible where this may vary) with the phase of the arms varying.
  • the drive circuitry may actively seek to adjust duty cycles finely to take into account imbalances if desired. Protection circuitry or algorithm may be included to adjust duty cycles if voltage deviates too far from a target point. This may be as simple as hardwired logic which prevents one arm from conducting at all while the voltage across the other arm exceeds a threshold.
  • IGBTs 9 and 11 are set to lag IGBTs 5 and 7 by ⁇ for ten cycles and then to lead IGBTs 5 and 7 by ⁇ for the following ten cycles, this maintains the voltage of point 21 at the required V/2.
  • a closed loop control could be incorporated correcting the deviation of the voltage of point 21 from the mid-point by changing the requisite arm from lead to lag to correct the error.
  • Figure 2 may be assembled by suitable adaptation of two circuits according to Figure 1. Therefore, corresponding elements have been marked with corresponding reference numerals. Reference numerals marked with a prime symbol indicate elements performing related function. E.g. the IGBT 9' performs a related function to the IGBT 9 as described above with reference to Figure 1.
  • inverters In this configuration two approaches are combined, two transformers provide four level switching and with 1200 volt rated devices 3.6kV continuous operation is possible. In a non operating condition inverters according to this example can withstand surges on the order of 7.2 kV.
  • the arrangement of Figure 2 can provide a conversion efficiency (not including transformer losses) of 96%. It should be noted that due to the phase changes required to balance the input capacitor voltage levels, during operation, the addition of “snubbers” to further improve the conversion efficiency or to suppress (“snub”) voltage transients is not straightforward.
  • Output rectification can be conventional; however there may be a need to consider rectifier diode voltage ratings when operating over a wide range of supply voltages.
  • high voltage diodes may be employed to cope with the peak input voltage conditions. Two examples of output configurations are shown in Figures 3a and 3b.
  • connection HVPSout is coupled to a first plate of capacitor Cl.
  • the second plate of capacitor Cl is coupled to connection HVPSret.
  • HVPSret is connected to diode D9 which provides a forward conducting path.
  • diode D9 and coupling HVPSret is connected to diode configuration D5, D6, D7, D8, in which: diodes D7 and D8 are coupled in parallel with D5 and D6 respectively.
  • Inductances SEClbxTl and SEClbT2 are connected in series between the cathodes of D6 and D8 (and the anodes of D5 and D7).
  • the cathodes of D7 and D5 are mutually coupled to the anodes of D2 and D4 (which are mutually coupled together) and which form part of a second diode configuration Dl, D2, D3, D4.
  • connection LVPSout is connected to a first plate of capacitor C2 and to a connection of inductance Lout.
  • the other connection of inductance Lout is connected to the cathodes of diodes DlO and DIl.
  • the anode of DlO is connected to the anode of DI l via four inductances arranged in series SEC2aT2, SEC2axTl, SEC2bxTl and SEC2bT2.
  • the connection between SEC2axT2, SEC2bxT2 is connected to LVPSret.
  • multi-level Phase Shift Inverter topology isolated DC/DC converters can be configured to satisfy the operating conditions presented by Rail Supply Networks over the range 600V - 1500V nominal including transient voltages, without the need for system interruptions during surge and transient conditions.
  • inverters are three phase 230v or 415v at 5OkVa output.
  • a 415v 3 phase 5OkW supply at 0.8p.f. is provided.
  • the modulation frequency is preferably 5kHz and output distortion preferably less than 8%THD.
  • LVPS can be up to 2OkW with voltages between 24 and 11Ov in which case a 1OkW unit at 37.5V may be provided.
  • a DC/DC converter may therefore be rated at 6OkW operating at 2OkHz and producing two isolated DC supplies, 660V at 5OkW and 1OkW at 37.5V.
  • Converter output control can be to regulate the LVPS with the HV DC slaved to it.
  • phase from lead to lag at a time when there is no voltage across the transformer. This reduces transients. This can be achieved by synchronizing the lead-lag switch with the main inverter drive, which is generally straightforward as both will be under the control of a common microcontroller. Switching from lead to lag and vice versa may be carried out at regular absolute intervals, for example every millisecond, every given number of inverter cycles, or in response to voltage drift of the midpoint or a combination.
  • the drive may be programmed to swap from lead to lag every 1 ms or if the voltage drifts from the midpoint by more than 1 %, whichever is sooner, with the capacitors typically being sized so that, under full load, in the absence of transients, a drift of 1% typically takes at least about 10 cycles at 2OkHz or 500 microseconds,
  • the switching elements used in the inverter may be other kinds of semiconductor switches, such as MOSFETs or any other voltage controlled impedance,

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

Un inverseur de puissance conçu pour recevoir une puissance d'entrée ayant une première tension au niveau de première et seconde bornes d'entrée, comprend un premier bras de commutation, un second bras de commutation et un diviseur de tension couplé au niveau des bornes d'entrée. Le premier bras de commutation comprend des premier et second éléments de commutation. Le second bras comprend des troisième et quatrième éléments de commutation. Les premier et second bras de commutation sont reliés en série au niveau des bornes d'entrée. Un circuit d'excitation entraîne chacun des éléments de commutation pour qu'ils produisent des formes d'onde de commutation de sorte que la tension au niveau de chacun des bras de commutation reste inférieure à une proportion prédéterminée de la tension d'entrée.
EP10760750A 2009-08-29 2010-08-31 Inverseur Withdrawn EP2471168A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0915070A GB2474009A (en) 2009-08-29 2009-08-29 Inverter having pair of switching arms with voltage divider
PCT/GB2010/051427 WO2011024010A2 (fr) 2009-08-29 2010-08-31 Inverseur

Publications (1)

Publication Number Publication Date
EP2471168A2 true EP2471168A2 (fr) 2012-07-04

Family

ID=41172091

Family Applications (1)

Application Number Title Priority Date Filing Date
EP10760750A Withdrawn EP2471168A2 (fr) 2009-08-29 2010-08-31 Inverseur

Country Status (3)

Country Link
EP (1) EP2471168A2 (fr)
GB (1) GB2474009A (fr)
WO (1) WO2011024010A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112835403B (zh) * 2019-11-22 2022-02-18 圣邦微电子（北京）股份有限公司 一种能够减小微功耗比较器输出级瞬态电流的控制电路
WO2024065280A1 (fr) * 2022-09-28 2024-04-04 华为数字能源技术有限公司 Circuit de conversion multiniveau, convertisseur de puissance et système d'alimentation électrique

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3805159A1 (de) * 1988-02-16 1989-08-24 Semperlux Gmbh Elektronisches vorschaltgeraet
US6353547B1 (en) * 2000-08-31 2002-03-05 Delta Electronics, Inc. Three-level soft-switched converters
US20060262574A1 (en) * 2005-05-20 2006-11-23 David Kelly DC high voltage to DC low voltage converter
EP2262088A1 (fr) * 2009-06-10 2010-12-15 ABB Research Ltd. Convertisseur CC-CC

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2011024010A2 *

Also Published As

Publication number Publication date
GB2474009A (en) 2011-04-06
WO2011024010A2 (fr) 2011-03-03
WO2011024010A3 (fr) 2011-04-28
GB0915070D0 (en) 2009-09-30

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