EP2435228A1 - Verfahren und maschine zur herstellung eines pv-zellenartigen halbleiters oder einer ähnlichen elektronischen komponente - Google Patents
Verfahren und maschine zur herstellung eines pv-zellenartigen halbleiters oder einer ähnlichen elektronischen komponenteInfo
- Publication number
- EP2435228A1 EP2435228A1 EP10715978A EP10715978A EP2435228A1 EP 2435228 A1 EP2435228 A1 EP 2435228A1 EP 10715978 A EP10715978 A EP 10715978A EP 10715978 A EP10715978 A EP 10715978A EP 2435228 A1 EP2435228 A1 EP 2435228A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- silicon
- substrate
- microns
- silicon wafer
- cutting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims description 54
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 123
- 239000010703 silicon Substances 0.000 claims abstract description 123
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 122
- 239000000758 substrate Substances 0.000 claims abstract description 55
- 238000004519 manufacturing process Methods 0.000 claims abstract description 36
- 238000005520 cutting process Methods 0.000 claims description 30
- 229910052698 phosphorus Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000000976 ink Substances 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 6
- 229910000831 Steel Inorganic materials 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 5
- 239000000314 lubricant Substances 0.000 claims description 5
- 239000010959 steel Substances 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 claims description 4
- 230000001070 adhesive effect Effects 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 4
- 238000009423 ventilation Methods 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 229910000640 Fe alloy Inorganic materials 0.000 claims description 3
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims description 3
- 238000007654 immersion Methods 0.000 claims description 3
- 239000011574 phosphorus Substances 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 238000004381 surface treatment Methods 0.000 claims description 3
- 238000004026 adhesive bonding Methods 0.000 claims description 2
- 238000005488 sandblasting Methods 0.000 claims description 2
- 230000003667 anti-reflective effect Effects 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 45
- 239000010410 layer Substances 0.000 description 13
- 230000007423 decrease Effects 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000002860 competitive effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000002803 fossil fuel Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 238000004513 sizing Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23D—PLANING; SLOTTING; SHEARING; BROACHING; SAWING; FILING; SCRAPING; LIKE OPERATIONS FOR WORKING METAL BY REMOVING MATERIAL, NOT OTHERWISE PROVIDED FOR
- B23D57/00—Sawing machines or sawing devices not covered by one of the preceding groups B23D45/00 - B23D55/00
- B23D57/0007—Sawing machines or sawing devices not covered by one of the preceding groups B23D45/00 - B23D55/00 using saw wires
- B23D57/0023—Sawing machines or sawing devices not covered by one of the preceding groups B23D45/00 - B23D55/00 using saw wires with a plurality of saw wires or saw wires having plural cutting zones
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D1/00—Working stone or stone-like materials, e.g. brick, concrete or glass, not provided for elsewhere; Machines, devices, tools therefor
- B28D1/005—Cutting sheet laminae in planes between faces
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/04—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools
- B28D5/045—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools by cutting with wires or closed-loop blades
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- Method and machine for manufacturing a semiconductor such as a photovoltaic cell or similar electronic component.
- the present invention relates to a manufacturing method and a machine for manufacturing semiconductor units, in particular photovoltaic cells, and a semiconductor unit obtained by such a method.
- the constant and growing evolution of today's energy needs translates into a willingness and search for new resources that can protect the environment.
- Solar energy is one of the preferred answers on this subject.
- solar technology presents itself as a profitable and competitive industrial alternative. It is therefore an objective of photovoltaic cell manufacturers and electric power solar panels to reduce the production and installation costs of these devices.
- One of the essential building blocks of a photovoltaic cell is silicon, which is also used for the manufacture of other electronic components. Silicon represents almost a third of the price of the photovoltaic cell as manufactured today.
- the present invention aims to provide a method and a machine for manufacturing semiconductor units, including photovoltaic cells, which does not reproduce the aforementioned drawbacks.
- the present invention is intended in particular to provide such a semiconductor unit which is less expensive to manufacture.
- the present invention also aims to provide such a semiconductor unit, requiring less silicon for its realization.
- the present invention also aims to provide a method and a machine of this type, to achieve a semiconductor unit whose performance is greater than that obtained by conventional manufacturing processes.
- the present invention also aims to provide a method and a manufacturing machine that are safe and reliable, limiting the risk of breakage.
- the present invention also aims to provide a method and a machine for manufacturing semiconductor units, for using both poly-crystalline silicon and monocrystalline silicon.
- the subject of the present invention is therefore a method for manufacturing semiconductor units, comprising the steps of providing a bar of silicon, to cut at least one silicon wafer in the cross section of said silicon bar, to assemble a substrate on each side of said silicon wafer, and to cut in the thickness in the middle of said silicon wafer, to form two semiconductor units each comprising a substrate and a thin layer of silicon.
- said silicon bar has a circular or square section, preferably of a width of about 300 mm, and a length of about 500 mm to 1300 mm.
- the step of cutting at least one silicon wafer is performed by sawing by means of a wire, in particular a steel wire with abrasive lubricant.
- the step of cutting in the middle of the silicon wafer is performed by sawing by means of a wire, in particular a steel wire with abrasive lubricant.
- a wire in particular a steel wire with abrasive lubricant.
- said wire has a diameter of between 80 ⁇ m and 130 ⁇ m, advantageously between 100 ⁇ m and 120 ⁇ m.
- said at least one silicon wafer has a thickness of between 180 ⁇ m and 280 ⁇ m, advantageously between 200 ⁇ m and 250 ⁇ m, and the thin silicon layer of each semiconductor unit has a thickness of between 40 ⁇ m and 80 ⁇ m. advantageously between 50 ⁇ m and 60 ⁇ m.
- said substrate is a metal or insulating substrate, preferably having a thickness of between 100 ⁇ m and 300 ⁇ m.
- the substrate is made of metal, in particular an alloy of iron and nickel with a coefficient of expansion close to that of silicon.
- said substrate is electrically insulating with a coefficient of expansion close to that of silicon.
- the step of assembling a substrate on each side of said silicon wafer is performed by gluing.
- said bonding is performed with a conductive adhesive, such as a conductive ink or a silver film.
- the step of assembling a substrate on each side of said silicon wafer is carried out at low temperature and / or under vacuum and / or under pressure.
- the method comprises the step of cleaning each silicon wafer, in particular by rinsing and drying.
- the method comprises the step of doping each silicon wafer, in particular by N or P doping, in particular by immersion in a bath containing boron or phosphorus.
- the step of cutting into the thickness in the middle of the silicon wafer is carried out by applying a pressure and / or a vacuum, in particular to the means of electromagnetic and / or pneumatic and / or mechanical forces, on the assembled substrates of each side of the cake.
- the method comprises performing at least one surface treatment of the silicon surface of each semiconductor unit, such as structuring and / or anti-reflection treatment.
- a doping step in particular P doping, is performed on the silicon surface of each semiconductor unit, after the step of cutting in the middle of said silicon wafer.
- the step of providing a silicon bar comprises doping said bar at heart, in particular by N or P doping.
- said silicon is monocrystalline or polycrystalline.
- the method is a method of manufacturing a photovoltaic cell, further comprising the step of applying to each semiconductor unit electrical connections.
- said step of applying electrical connections is carried out by applying, in particular by screen printing, in particular with conductive inks, conductive microcircuits on the silicon surface.
- said step of applying electrical connections comprises piercing a network of micro-perforations, in particular by micro-sanding, in the silicon layer and the substrate, and inserting in each perforation a conductor adapted to collect the current at the silicon surface and transmit it to the back of the substrate.
- each connection comprises an electrically conductive element inserted into an insulating frustoconical sleeve.
- the semiconductor unit is disposed in a frame having a front face closed by a glass wall protecting the silicon surface, and an insulating rear face provided with ventilation holes.
- the present invention also relates to a manufacturing machine for implementing the above method, comprising means for providing a silicon bar, means for cutting at least one silicon wafer in the cross section of said silicon bar, means for assembling a substrate on each side of said silicon wafer, and means for cutting in the thickness in the middle of said silicon wafer, to form two semiconductor units each having a substrate and a thin silicon wafer.
- the present invention also relates to a semiconductor unit produced by the above manufacturing method, comprising a substrate, preferably metal, on which is applied a thin layer of silicon.
- said thin silicon layer has a thickness of 40 ⁇ m to 80 ⁇ m, preferably 50 ⁇ m to 60 ⁇ m.
- said unit is a photovoltaic cell whose efficiency is greater than 15%, advantageously greater than 18%, preferably greater than 20%.
- FIG. 1 is a schematic view of a device for manufacturing silicon wafers according to a conventional method of the prior art
- FIG. 2 schematically shows from top to bottom successive sequences of a manufacturing method according to an advantageous embodiment of the present invention
- FIG. 3 is a diagram showing different steps numbered from 1 to 11 in the manufacturing method according to an advantageous embodiment of the present invention
- FIG. 4 is a diagram showing the following steps numbered 12 to 19 of the manufacturing method according to an advantageous embodiment of the present invention.
- FIG. 5 is a schematic cross-sectional view of a photovoltaic cell made according to an advantageous embodiment of the present invention
- FIGS. 6a and 6b are top views of two alternative embodiments of the electrical connections on the surface of the photovoltaic cell; silicon of a photovoltaic cell, according to the present invention.
- the method of the present invention is to use a silicon bar or ingot, which may be of conventional size, with a section of about 300 mm x 300 mm and a length of about 500 mm to about 1300 mm.
- This bar may have a circular or square cross section, or even a cross section of different shape.
- the method then provides for cutting wafers or silicon wafers from said bar in its cross section, preferably with a thickness of about 200 microns to 250 microns.
- a substrate is assembled on each side of said cake then the cake is cut in its thickness, from preferably at its center, to thus form two semiconductor units each consisting of a substrate and a thin layer of silicon.
- a surfacing and cleaning of the wafer before assembling the substrates.
- a surface cleaning is advantageously carried out, as well as a doping of the silicon surface (N or P, with boron or phosphorus) by a suitable method.
- a metal or insulating substrate and coefficient of expansion close to that of silicon is assembled on each side of said wafer.
- the wafer is cut, in the direction of its section and preferably in the middle of the thickness of the silicon, to thus form two semiconductor units each consisting of a substrate and a thin layer thick silicon, as close as possible to the optimal yield thickness of silicon.
- the fact of making a cut in the thickness of the silicon causes a rupture of the surface layer of the initial doping and consequently of the electrical conductivity between the rear part of the substrate and the front surface of the silicon left free.
- the structuring of the front surface of the silicon is done by a suitable method, then the application of the antireflection layer is carried out by an appropriate method.
- the silicon bar is preferably doped at heart, in particular by N and P doping, before it is cut into a slab.
- the cutting of the wafers, as well as the cutting of the two semiconductor units is carried out by means of a wire, in particular a steel wire, preferably with the addition of an abrasive lubricant, the diameter of which is advantageously about 100 ⁇ m to 120 ⁇ m. Depending on the uses, a slightly greater or slightly smaller diameter is also possible, for example from 80 ⁇ m to 130 ⁇ m.
- each cut slab has a thickness of about 200 to 250 microns.
- a greater or smaller thickness may be provided, for example from 180 microns to 280 microns.
- the substrate is preferably made in the form of a strip which may have a thickness of, for example, between 100 ⁇ m and 200 ⁇ m.
- this strip is metallic, in particular made of iron and nickel alloy, having a coefficient of expansion close to that of silicon, for example FeN42.
- Other materials, and in particular other metals, are conceivable for the substrate.
- the assembly of the substrate on each side of the silicon wafer can be achieved by bonding, in particular by using a conductive adhesive such as a conductive ink or a silver film. In this implementation, because of the conductive nature of the adhesive, the substrate could even be made of an insulating material.
- the assembly of the substrate on the silicon wafer is carried out at low temperature and / or under vacuum and / or under pressure.
- the cleaning step which is preferably performed on the wafer prior to assembly of the substrate may include rinsing and drying.
- the surfacing indicated in FIG. 2 may be associated with immersion doping as described above.
- the doping can also be performed after cutting through the wafer to make the two semiconductor units.
- the step of cutting the wafer is performed by applying a pressure and / or depression, symbolized by the two arrows in Figure 2, on the substrates. This pressure and / or depression can be achieved by means of electromagnetic forces, especially magnets, and / or by means of pneumatic and / or mechanical forces combined with an air suction, for example by vacuum or suction pad.
- the sandwich assembly is both held firmly during cutting while keeping the two cut parts apart, thus facilitating the passage of the wire and thus reducing the risk of silicon breaking.
- the present invention therefore allows a significant reduction in silicon consumption, since instead of using on average about 450 microns thick silicon per cell, less than half is used to obtain two cells having a higher yield. since having a thickness close to or equal to the optimization of 50 microns to 60 microns.
- the present invention by the savings it generates, makes possible the use of monocrystalline silicon, which is known to be more efficient, but also more expensive than polycrystalline silicon.
- the silicon economy obtained by virtue of the present invention the additional cost of the single crystal is largely compensated.
- the use of monocrystalline silicon makes it possible to further improve the efficiency of the photovoltaic cell obtained by the present invention.
- FIG. 6b shows an example of a circuit applied by screen printing, in particular by means of a conductive ink, on the silicon surface to collect the electric current.
- the graphics of such a circuit on silicon decreases by about 14 to 17% the effective effective area of the current production of a photovoltaic silicon cell.
- the present invention therefore advantageously provides so-called "back” connections to reduce the so-called “dead” surfaces to further increase the exposed active surface of the cell.
- a micro-perforation beam can be produced, in particular by micro sandblasting, in the silicon layer and in the substrate. Partially isolated micro-conductors may be inserted into each micro-perforation to collect the current at the surface of the silicon and transmit it to the back of the substrate.
- each conductor may comprise a lead inserted for example in a frustoconical and insulating sleeve.
- Figure 6a shows a top view of such a network of micro-perforations on the silicon layer.
- the frame in which the photovoltaic cells are assembled advantageously comprises ventilation holes provided on its rear face, visible in Figure 5.
- a glass wall is arranged to protect the cells.
- a second glass plate may be interposed between the outer protective wall and the silicon surface.
- FIGS. 3 and 4 schematically represent the manufacturing process and the manufacturing machine for implementing this method starting from the silicon wafer obtained by cutting the silicon bar, the optional mechanical surfacing of which forms the step having the reference 1 Subsequently, this silicon wafer is subjected to suction, degreasing and possibly doping, as indicated by step 2. The silicon wafer is then brought to temperature in step 3, then transferred to a vacuum zone in step 4. In the entry phase of step 5 it is again brought to temperature to be brought into the vacuum zone where the metal strips will be applied to both sides of the slab to form the substrates.
- the substrate manufacturing machine is schematically referenced by the reference 7.
- the vacuum zone thus comprises a loader and a sizing of the pre-sized substrates on the wafer under vacuum or by temperature or pressure, as described previously, as represented by Step 8.
- the wafer provided with these two substrates forming the sandwich structure is then transferred into the airlock 9, then in steps 10 and 11, the wafer is sawn in its thickness to form the two semiconductor units. .
- Figure 4 illustrates the continuation of the manufacturing process of the photovoltaic cell.
- step 12 the vice which holds the two units together during the sawing step is loosened and the two semiconductor units are thus obtained, which are then cleaned, surface-treated, structured according to the needs (steps 13 and 14), as well as subjected to an antireflection treatment, as indicated by step 15. Then intervenes the screen printing and the electrical connections on the silicon. This can be done simultaneously during this same step 15.
- step 16 provides micro-drilling of the micro-perforations to make the so-called back connections as indicated in steps 16 and 17.
- Steps 18 & 19 consist of a finish and a check before the transfer of the cell to a mounting in a panel.
- the present invention makes it possible to supply photovoltaic cells whose efficiency is between 15% and 20%, see more, which places this product among the most efficient, with a manufacturing cost which is significantly lower compared to current cells. It should be noted that the invention has been described with reference to silicon, but it is clear that other materials having equivalent properties could also be used.
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- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Mining & Mineral Resources (AREA)
- Photovoltaic Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0951946A FR2943848B1 (fr) | 2009-03-27 | 2009-03-27 | Procede et machine de fabrication d'un semi-conducteur, du type cellule photovoltaique ou composant electronique similaire |
PCT/FR2010/050541 WO2010109141A1 (fr) | 2009-03-27 | 2010-03-25 | Procede et machine de fabrication d'un semi-conducteur, du type cellule photovoltaïque ou composant electronique similaire |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2435228A1 true EP2435228A1 (de) | 2012-04-04 |
Family
ID=41050302
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP10715978A Withdrawn EP2435228A1 (de) | 2009-03-27 | 2010-03-25 | Verfahren und maschine zur herstellung eines pv-zellenartigen halbleiters oder einer ähnlichen elektronischen komponente |
Country Status (4)
Country | Link |
---|---|
US (1) | US20130130425A1 (de) |
EP (1) | EP2435228A1 (de) |
FR (1) | FR2943848B1 (de) |
WO (1) | WO2010109141A1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9196503B2 (en) * | 2012-08-23 | 2015-11-24 | Michael Xiaoxuan Yang | Methods for fabricating devices on semiconductor substrates |
CN109346554B (zh) * | 2018-08-23 | 2020-06-12 | 晶澳(扬州)太阳能科技有限公司 | 一种光伏组件的制作方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
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US3914856A (en) * | 1972-06-05 | 1975-10-28 | Fang Pao Hsien | Economical solar cell for producing electricity |
US3969746A (en) * | 1973-12-10 | 1976-07-13 | Texas Instruments Incorporated | Vertical multijunction solar cell |
US3903427A (en) * | 1973-12-28 | 1975-09-02 | Hughes Aircraft Co | Solar cell connections |
US4261781A (en) * | 1979-01-31 | 1981-04-14 | International Business Machines Corporation | Process for forming compound semiconductor bodies |
US4606962A (en) * | 1983-06-13 | 1986-08-19 | Minnesota Mining And Manufacturing Company | Electrically and thermally conductive adhesive transfer tape |
JPS6477507A (en) * | 1987-09-18 | 1989-03-23 | Toshiba Corp | Slicing device for semiconductor substrate |
US5057163A (en) * | 1988-05-04 | 1991-10-15 | Astropower, Inc. | Deposited-silicon film solar cell |
DE69224965T2 (de) * | 1991-06-11 | 1998-10-29 | Ase Americas Inc | Verbesserte solarzelle und verfahren zu ihrer herstellung |
DE19510625A1 (de) * | 1995-03-23 | 1996-09-26 | Wacker Siltronic Halbleitermat | Drahtsäge und Verfahren zum Abtrennen von Scheiben von einem Werkstück |
US5950643A (en) * | 1995-09-06 | 1999-09-14 | Miyazaki; Takeshiro | Wafer processing system |
US5861321A (en) * | 1995-11-21 | 1999-01-19 | Texas Instruments Incorporated | Method for doping epitaxial layers using doped substrate material |
CA2225131C (en) * | 1996-12-18 | 2002-01-01 | Canon Kabushiki Kaisha | Process for producing semiconductor article |
US5935321A (en) * | 1997-08-01 | 1999-08-10 | Motorola, Inc. | Single crystal ingot and method for growing the same |
US6870087B1 (en) * | 2001-09-14 | 2005-03-22 | Patrick Gallagher | Assembly method and apparatus for photovoltaic module |
JP4455804B2 (ja) * | 2002-05-08 | 2010-04-21 | 株式会社ワイ・ワイ・エル | インゴットの切断方法と切断装置及びウェーハ並びに太陽電池の製造方法 |
US7306508B2 (en) * | 2003-10-27 | 2007-12-11 | Mitsubishi Denki Kabushiki Kaisha | Multi-wire saw |
JP4012936B2 (ja) * | 2004-08-06 | 2007-11-28 | 株式会社アライドマテリアル | 集合基板 |
JP5048380B2 (ja) * | 2007-04-09 | 2012-10-17 | 信越化学工業株式会社 | 単結晶シリコン太陽電池の製造方法 |
-
2009
- 2009-03-27 FR FR0951946A patent/FR2943848B1/fr not_active Expired - Fee Related
-
2010
- 2010-03-25 EP EP10715978A patent/EP2435228A1/de not_active Withdrawn
- 2010-03-25 WO PCT/FR2010/050541 patent/WO2010109141A1/fr active Application Filing
- 2010-03-25 US US13/637,926 patent/US20130130425A1/en not_active Abandoned
Non-Patent Citations (1)
Title |
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See references of WO2010109141A1 * |
Also Published As
Publication number | Publication date |
---|---|
FR2943848B1 (fr) | 2012-02-03 |
US20130130425A1 (en) | 2013-05-23 |
FR2943848A1 (fr) | 2010-10-01 |
WO2010109141A1 (fr) | 2010-09-30 |
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