EP2430659A1 - Built-in very high sensitivity image sensor - Google Patents
Built-in very high sensitivity image sensorInfo
- Publication number
- EP2430659A1 EP2430659A1 EP10731767A EP10731767A EP2430659A1 EP 2430659 A1 EP2430659 A1 EP 2430659A1 EP 10731767 A EP10731767 A EP 10731767A EP 10731767 A EP10731767 A EP 10731767A EP 2430659 A1 EP2430659 A1 EP 2430659A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- photodiode
- transfer
- charges
- type
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 230000035945 sensitivity Effects 0.000 title description 3
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 239000004065 semiconductor Substances 0.000 claims abstract description 6
- 238000002955 isolation Methods 0.000 claims description 12
- 230000000694 effects Effects 0.000 claims description 7
- 230000003287 optical effect Effects 0.000 claims description 3
- 238000009413 insulation Methods 0.000 abstract 1
- 238000005286 illumination Methods 0.000 description 25
- 230000003321 amplification Effects 0.000 description 8
- 238000003199 nucleic acid amplification method Methods 0.000 description 8
- 238000001514 detection method Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- 230000010287 polarization Effects 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 2
- 235000003197 Byrsonima crassifolia Nutrition 0.000 description 1
- 240000001546 Byrsonima crassifolia Species 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005264 electron capture Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000003334 potential effect Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14806—Structural or functional details thereof
- H01L27/14812—Special geometry or disposition of pixel-elements, address lines or gate-electrodes
- H01L27/14818—Optical shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14831—Area CCD imagers
- H01L27/14843—Interline transfer
Definitions
- the present invention relates to the field of integrated image sensors and, more particularly, sensors allows ⁇ a good detection at low illumination. Presentation of the prior art
- image capture devices are known.
- the most common structure of these sensors comprises a plurality of elementary detection devices or pixels, each comprising a photodiode formed in a semiconductor substrate, associated with a charge transfer device and a charge reading circuit that has been transferred. It is generally sought to minimize the number of sensor elements by using a read circuit for several photodiodes.
- incident photons penetrate the semiconductor substrate and form electron-hole pairs in the substrate. The electrons of these pairs are then captured by the photodiode and then transferred by the charge transfer transistor to the associated readout circuit.
- US patent application 2007/0176213 describes a structure comprising, in addition to the aforementioned elements, devices, associated with each pixel, allowing the amplification of photogenerated electrons in this pixel to improve the sensitivity of the sensors.
- CCD registers charge transfer device
- Figure 1 illustrates a pixel of an image sensor comprising a charge multiplication stage and 2A to 2E are potential curves illustrating the functioning ⁇ that pixel during different steps of the detection.
- the pixel of FIG. 1 is formed in and on a P-type substrate 10 biased to a reference voltage, for example ground.
- a photodiode consisting of a heavily doped N-type region (N +).
- the photodiode is illuminated by a light beam 13.
- an isolated transfer gate 14 controlled by a transfer signal V ⁇ .
- Next to the transfer gate 14 are formed several isolated grids for the multiplication of charges by avalanche effect.
- FIGS. 2A to 2E illustrate the potential in the substrate 10, in the plane of FIG. 1, during different stages of the image capture. In these figures, a single cycle of storage, transfer and multiplication of electrons is described. The potential illustrated in each of these figures is the potential in the substrate 10 along a line that is will call later "line of maximum potential". This line passes, deep in the substrate, by the points of strongest polarization opposite isolated grids and in the photodiode.
- the maximum polarization line passes through more or less deep points in the substrate. Note that, in the following description, we will call the grid 16 "first multiplication grid" although this grid also plays a role during the initial transfer step.
- FIG. 2A shows the potential curve in the photodiode 12 and in the substrate 10 during an initial charge storage phase in the photodiode 12.
- the illumination of the sensor of FIG. 1 causes the storage of electrons in the region 12 and the potential of this region, initially equal to V ] _, decreases to reach a value V2 which is a function of the number of electrons stored and therefore the number of incident photons.
- V ⁇ applied to the transfer gate is zero to form a potential wall and to prevent electrons from coming out of the photo ⁇ diode 12.
- the potential ⁇ l, associated with the first multiplication grid of Charges 16 is, preferably just before the transfer step, set at a voltage V3, greater than V ] _, in anticipation of the next step.
- Vr j substantially equal to or slightly greater than V ] _, is applied to the transfer gate 14, while the voltage ⁇ l applied to the first charge multiplication gate 16 is equal to V3 (greater than V ] _ and that the voltage ⁇ 2 applied to the second multiplication gate 18 is zero.
- the charges stored in the photodiode 12 are thus transferred ⁇ into the potential well formed in the substrate 10, below the first multiplication grid 16.
- the voltage V ⁇ (transfer gate) returns to a reference potential while the voltage ⁇ 2 remains at this reference potential, for example equal to zero, which blocks the electrons in the region of the substrate 10 located under the gate 16.
- a new charge storage phase can then begin at the photodiode 12.
- a the step illustrated in Figure 2D decreases the voltage ⁇ l applied to the gate 16 to a low voltage V4. The potential of the substrate 10 located below the gate 16 is thus lowered.
- the voltages Vr j and ⁇ 2 applied, respectively, to the gates 14 and 18, are zero (reference potential).
- the voltage ⁇ 3 applied to the gate 20 is set to a voltage V5 much higher than the voltage V4, in anticipation of the next step.
- the voltage ⁇ 2 applied to the gate 18 increases rapidly to be of the order of the voltage V4, or slightly higher than V4. Since the voltage ⁇ 3 is equal to V5 (much higher than V4), the charges are transferred to the region of the substrate situated under the gate 20. The potential difference between the region located under the gate 18 ( ⁇ V4) and under the gate 20 (V5) is sufficiently high to allow ⁇ multiplication of charges by electronic avalanche.
- the gate 22 is biased to a zero voltage to form a potential wall and block the charges at the gate 20.
- the voltage V4 may be of the order of 1 V and the 10 V V5 voltage.
- the charge transfer step ( Figure 2B) may also participate in the amplifica ⁇ tion thereof, the voltage applied to the gate 16 during this step then being adapted to produce a multiplication (high voltage).
- An object of an embodiment of the present invention is to provide an image sensor allowing good detection during low illumination.
- one embodiment of the present invention provides a unit device of an image sensor include an ⁇ ing a photodiode consisting of a doped region of a first conductivity type formed on the surface of a semiconduc- tor substrate a second type of conductivity adapted to be polarized at a first reference voltage, the photodiode being associated with a device for transferring, multiplying and isolating charges, the photodiode being of the completely depleted type and comprising, on the surface of the doped zone of the first conductivity type, a highly doped region of the second conductivity type adapted to be biased to a second reference voltage.
- the device for transferring, multiplying and isolating charges comprises a transfer gate, an isolation gate and a plurality of multiplication gates adapted to be polarized so as to fix the gate. potential of the underlying substrate and allow the transfer, isolation and multiplication of charges by electronic avalanche effect.
- the device for transferring, multiplying and isolating charges comprises at least five grids.
- the first and second reference voltages are equal and are ground voltages.
- a doped layer of the first type of conductivity is formed, on the surface of the substrate, facing the transfer gates, isolation and multiplication charges.
- the device further comprises an optical mask formed on the device for transferring, multiplying and isolating the charges.
- the substrate is thinned and is intended to be illuminated by the face opposite to that on which is formed the device for transferring, multiplying and isolating charges.
- the first type of conductivity is the type N.
- the present invention also provides an image sensor comprising a plurality of elementary devices as above.
- FIG. illustrates a conventional charge amplification image sensor
- FIGS. 2A to 2E are potential curves illustrating the operation of the device of FIG. 1 when it is subjected to a large illumination
- FIG. 3 shows the structure of FIG. 1
- FIGS. 4A to 4C are potential curves illustrating a problem likely to be posed by this structure in the absence or at low level of illumination
- Fig. 5 illustrates an image sensor according to an embodiment of the present invention
- Figures 6 and 7 are potential curves in the sensor of Figure 5
- Figure 8 illustrates a variant of a device according to an embodiment of the present invention.
- FIG. 3 shows the structure of FIG. 1, in a case of almost zero illumination (no light beam 13).
- the device comprises a photodiode 12 consisting of a strongly doped N-type region (N +) formed on the surface of a P-type substrate 10, an insulated transfer gate 14 formed on the surface of the substrate 10 and controlled by a transfer signal.
- FIGS. 4A to 4C are curves of the potential in the substrate 10, along lines of maximum potential, during different stages of operation of the device of FIG. 3.
- FIG. 4A illustrates the potential in the substrate 10 during a succession of storage and charge transfer steps (the potential V 1 of the gate 14 varying between zero and
- V ] _ When the illumination of the photodiode is zero, no electron / hole pair is created and the potential of the photodiode should theoretically remain constant. However, it turns out that it increases gradually over the cycles of storage / transfer, up to, in the example shown, a voltage V ] _ '( Figure 4B).
- the increase of the potential in the photodiode, during a succession of cycles in the absence or at a very low level of illumination, is due to a leakage current between the strongly doped N-type photodiode 12 and the charging zone. of space located opposite the gate 16.
- the transfer is distorted due to the variation of the potential during the period without illumination of the photodiode (transferring fewer charges than there were actually stored in the photodiode 12).
- the reading of the charges carried out by the device of FIG. 3 is not good.
- the inventors propose to use a particular photodiode and, more particularly ⁇ , a photodiode in which the potential of the electron capture region can not rise above a predetermined threshold. In this way, the photogenerated charges can be correctly read, even in cases of low illumination.
- Figure 5 illustrates such a photodiode.
- the inven ⁇ tors suggest using a photodiode and clamped completely depleted (in English fully-depleted photodiode, or pinned photodiode).
- the photodiode is formed in a P-type substrate and comprises an N-type doped capture region 32 at the surface of which extends a P-type (P +) strongly doped thin-film region 34.
- the substrate 30 is biased at a first reference potential V re - Q and the heavily doped P-type region 34 is biased at a second reference potential, V re f2.
- the first and second reference potentials, V re -Q and V re f2 may be equal and correspond to a ground voltage, but it will be noted that it is also possible to bias the substrate 30 and the region 34 to voltages. different reference numbers.
- the photodiode is associated with a transfer gate 36, charge multiplication gates 38, 40, 42, and an isolation gate 44 formed on the surface of the substrate 30, in the vicinity of the photodiode.
- the gates 36, 38, 40, 42, 44 have insulated gate structures and are controlled respective ⁇ , for V ⁇ control signals, ⁇ l, ⁇ 2, ⁇ 3, ⁇ 4.
- a protective layer (not shown), or optical mask, above the transfer gate 36, amplification grids or multiplication 38, 40, 42 and the isolation grid 44, so that incident light beams do not generate charges in the substrate located under these grids.
- the doping of the zones 32 and 34 are adjusted so that the heavily doped region 34 of P-type full ⁇ depleted zone 32 of N-type
- the potential of the zone 32 is fixed only by the doping of the photodiode and the substrate, which avoids the low inversion regime when the charges are transferred to the substrate situated opposite the gate 38. It will be noted that, contrary to what is shown in FIG. 5, in a real device, most of the surface of each pixel is assigned to the photodiode (detection zone of the device).
- the potential in the heart of the N-type region 34 is completely determined by the doping of the regions 30, 32, 34 and, thus, the region 32 reaches at most a potential V ] _ max .
- FIG. 7 illustrates a potential curve identical to that represented in FIG. 4A (along the line of maximum potential) in the case of the device of FIG. 5.
- the potential of the region 32 always remains equal to or less than V ] _ max .
- all photogenerated charges stored in the photodiode are transferred during a transfer phase where the voltage V ⁇ it switches to a voltage V4 equal to or slightly greater than V ] _ max , which makes the sensor effective even in the case of very low illumination or after a long period of zero illumination.
- a charge amplification cycle is performed in a conventional manner, by applying a large electric field between two adjacent gates.
- the gain of the amplification is adjusted by controlling the number of back and forth under the grids 38, 40 and 42.
- the transfer gate 36 and the isolation grid 44 then serve as potential walls to prevent charges from being lost. exit the device during the amplification of the loads.
- Grids 38 and 42 are alternately polarized to create large potential differences enabling the electronic avalanche effect. Note that it will also be possible to form the device for transferring, amplifying and isolating charges by combining more than five neighboring grids.
- a thin N-type doped layer 46 may be formed, on the surface of the substrate 30, facing the transfer gate 36, of multiplication 38, 40, 42 and of isolation 44.
- This thin layer 46 makes it possible to move the maximum potential point slightly away from the surface of the substrate in order to avoid parasitic phenomena (noises) often present at the interfaces between the gate insulator and the semiconductor substrate.
- FIG. 8 illustrates a variant of the device of FIG. 5 in which the image sensor is illuminated by the rear face of the substrate 30.
- the device of FIG. 8 differs from that of FIG. 5 in that the substrate 30 is thinned. and is illuminated by the face opposite that on which are formed the transfer gate 36, the multiplied grids ⁇ cation loads 38, 40, 42 and the isolation gate 44.
- a light beam 48 reaching the substrate generates electron pairs / holes and the electrons of these pairs are collected in the potential well formed by the photodiode 32.
- a beam arriving through the rear face of a substrate encounters less power. obstacles and is more easily detectable than a beam arriving on the front face of the substrate.
- the operation of this device is then similar to that described above.
- the devices of Figures 5 and 8 may also be used in the case of high levels of illumination. In this case, it is possible to adapt the integration time, or accumulation of charges, in the photodiode as a function of the illumination, using a suitable electronic circuit, to avoid the saturation of the pixel .
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Abstract
The invention relates to a basic device for an image sensor, including a photodiode consisting of a doped area having a first type of conductivity (32) and formed at the surface of a semiconductor substrate having a second type of conductivity (30), adapted to be biased at a first reference voltage (Vref1), wherein the photodiode is combined with a device for the transfer (36), multiplication (38, 40, 42) and insulation (44) of charges, the photodiode being a fully depleted one and including, at the surface of the doped area having a first type of conductivity, a strongly doped region having the second type of conductivity (34) and adapted to be biased at a second reference voltage (Vref2).
Description
CAPTEUR D'IMAGE INTEGRE A TRES GRANDE SENSIBILITE INTEGRATED IMAGE SENSOR WITH VERY HIGH SENSITIVITY
Domaine de 1 ' inventionField of the invention
La présente invention concerne le domaine des capteurs d'image intégrés et, plus particulièrement, des capteurs permet¬ tant une bonne détection à faible éclairement. Exposé de l ' art antérieurThe present invention relates to the field of integrated image sensors and, more particularly, sensors allows ¬ a good detection at low illumination. Presentation of the prior art
De nombreux dispositifs de capture d'image intégrés sont connus . La structure la plus courante de ces capteurs comprend une pluralité de dispositifs élémentaires de détection ou pixels, chacun comprenant une photodiode formée dans un substrat semiconducteur, associée à un dispositif de transfert de charges et à un circuit de lecture des charges qui ont été transférées. On cherche généralement à minimiser le nombre d'éléments des capteurs en utilisant un circuit de lecture pour plusieurs photodiodes. Lorsqu'un capteur d'image reçoit un faisceau lumineux, les photons incidents pénètrent dans le substrat semiconducteur et forment, dans ce substrat, des paires électrons/trous. Les électrons de ces paires sont ensuite capturés par la photodiode puis transférés par le transistor de transfert de charges vers le circuit de lecture associé.Many built-in image capture devices are known. The most common structure of these sensors comprises a plurality of elementary detection devices or pixels, each comprising a photodiode formed in a semiconductor substrate, associated with a charge transfer device and a charge reading circuit that has been transferred. It is generally sought to minimize the number of sensor elements by using a read circuit for several photodiodes. When an image sensor receives a light beam, incident photons penetrate the semiconductor substrate and form electron-hole pairs in the substrate. The electrons of these pairs are then captured by the photodiode and then transferred by the charge transfer transistor to the associated readout circuit.
La demande de brevet US 2007/0176213 décrit une structure comprenant, en plus des éléments susmentionnés, des
dispositifs, associés à chaque pixel, permettant l'amplification des électrons photogénérés dans ce pixel pour améliorer la sensibilité des capteurs. Pour réaliser cette amplification, ou multiplication de charges, il est connu d'utiliser les techniques associées aux registres CCD (dispositif à transfert de charge), c'est-à-dire de former, en surface du substrat, un ensemble de grilles métalliques isolées polarisées en alter¬ nance. Cette polarisation alternée des grilles isolées permet, par un effet dit d'avalanche électronique, la multiplication des électrons photogénérés.US patent application 2007/0176213 describes a structure comprising, in addition to the aforementioned elements, devices, associated with each pixel, allowing the amplification of photogenerated electrons in this pixel to improve the sensitivity of the sensors. To achieve this amplification, or multiplication of charges, it is known to use the techniques associated with CCD registers (charge transfer device), that is to say, to form, on the surface of the substrate, a set of metal grids isolated polarized alter ¬ nance. This alternating polarization of isolated grids allows, by an effect called electronic avalanche, the multiplication of photogenerated electrons.
La figure 1 illustre un pixel d'un capteur d'image comprenant un étage de multiplication des charges et les figures 2A à 2E sont des courbes de potentiel illustrant le fonctionne¬ ment de ce pixel lors de différentes étapes de la détection. Le pixel de la figure 1 est formé dans et sur un substrat 10 de type P polarisé à une tension de référence, par exemple la masse. Dans le substrat 10, en surface de celui-ci, est formée une photodiode constituée d'une région 12 fortement dopée de type N (N+) . La photodiode est éclairée par un faisceau lumineux 13. Au voisinage de la photodiode est placée une grille de transfert 14 isolée commandée par un signal de transfert V^. A côté de la grille de transfert 14 sont formées plusieurs grilles isolées permettant la multiplication des charges par effet d'avalanche. Dans l'exemple représenté, quatre grilles 16, 18, 20, 22 sont commandées, respectivement, par des signaux de commande Φl, Φ2, Φ3 et Φ4. La représentation de la figure 1 est extrêmement schématique ; en particulier, on notera que dans un dispositif réel, la plus grande partie de la surface de chaque pixel est dévolue à la photodiode. Les figures 2A à 2E illustrent le potentiel dans le substrat 10, dans le plan de la figure 1, lors de différentes étapes de la capture d'image. Dans ces figures, un unique cycle de stockage, de transfert et de multiplication des électrons est décrit. Le potentiel illustré, dans chacune de ces figures, est le potentiel dans le substrat 10 en suivant une ligne que l'on
appellera par la suite "ligne de potentiel maximum". Cette ligne passe, en profondeur dans le substrat, par les points de plus forte polarisation en regard des grilles isolées et dans la photodiode. On notera que, en fonction de la tension appliquée sur les différentes grilles isolées, la ligne de polarisation maximum passe par des points plus ou moins profonds dans le substrat. On notera que, dans la suite de la description, on appellera la grille 16 "première grille de multiplication" bien que cette grille joue également un rôle lors de l'étape initiale de transfert.Figure 1 illustrates a pixel of an image sensor comprising a charge multiplication stage and 2A to 2E are potential curves illustrating the functioning ¬ that pixel during different steps of the detection. The pixel of FIG. 1 is formed in and on a P-type substrate 10 biased to a reference voltage, for example ground. In the substrate 10, on the surface thereof, is formed a photodiode consisting of a heavily doped N-type region (N +). The photodiode is illuminated by a light beam 13. In the vicinity of the photodiode is placed an isolated transfer gate 14 controlled by a transfer signal V ^. Next to the transfer gate 14 are formed several isolated grids for the multiplication of charges by avalanche effect. In the example shown, four gates 16, 18, 20, 22 are controlled, respectively, by control signals Φl, Φ2, Φ3 and Φ4. The representation of Figure 1 is extremely schematic; in particular, it will be noted that in a real device, most of the surface of each pixel is devolved to the photodiode. FIGS. 2A to 2E illustrate the potential in the substrate 10, in the plane of FIG. 1, during different stages of the image capture. In these figures, a single cycle of storage, transfer and multiplication of electrons is described. The potential illustrated in each of these figures is the potential in the substrate 10 along a line that is will call later "line of maximum potential". This line passes, deep in the substrate, by the points of strongest polarization opposite isolated grids and in the photodiode. It will be noted that, as a function of the voltage applied to the different isolated grids, the maximum polarization line passes through more or less deep points in the substrate. Note that, in the following description, we will call the grid 16 "first multiplication grid" although this grid also plays a role during the initial transfer step.
En figure 2A est représentée la courbe du potentiel dans la photodiode 12 et dans le substrat 10, lors d'une phase initiale de stockage des charges dans la photodiode 12. L'éclai- rement du capteur de la figure 1 provoque le stockage d'élec- trons dans la région 12 et le potentiel de cette région, initialement égal à V]_, diminue pour atteindre une valeur V2 qui est fonction du nombre d'électrons stockés et donc du nombre de photons incidents. Pendant la phase de stockage, la tension V^ appliquée à la grille de transfert est nulle pour former un mur de potentiel et éviter que des électrons ne sortent de la photo¬ diode 12. Le potentiel Φl, associé à la première grille de multiplication de charges 16 est, de préférence juste avant l'étape de transfert, fixé à une tension V3, supérieure à V]_, en prévision de l'étape suivante. A l'étape de la figure 2B, une tension de transfertFIG. 2A shows the potential curve in the photodiode 12 and in the substrate 10 during an initial charge storage phase in the photodiode 12. The illumination of the sensor of FIG. 1 causes the storage of electrons in the region 12 and the potential of this region, initially equal to V ] _, decreases to reach a value V2 which is a function of the number of electrons stored and therefore the number of incident photons. During the storage phase, the voltage V ^ applied to the transfer gate is zero to form a potential wall and to prevent electrons from coming out of the photo ¬ diode 12. The potential Φl, associated with the first multiplication grid of Charges 16 is, preferably just before the transfer step, set at a voltage V3, greater than V ] _, in anticipation of the next step. In the step of FIG. 2B, a transfer voltage
Vrj, sensiblement égale ou légèrement supérieure à V]_, est appliquée sur la grille de transfert 14, tandis que la tension Φl appliquée à la première grille de multiplication de charges 16 est égale à V3 (supérieure à V]_) et que la tension Φ2 appliquée à la deuxième grille de multiplication 18 est nulle.Vr j , substantially equal to or slightly greater than V ] _, is applied to the transfer gate 14, while the voltage Φl applied to the first charge multiplication gate 16 is equal to V3 (greater than V ] _ and that the voltage Φ2 applied to the second multiplication gate 18 is zero.
Les charges stockées dans la photodiode 12 sont ainsi transfé¬ rées dans le puits de potentiel formé, dans le substrat 10, en dessous de la première grille de multiplication 16.The charges stored in the photodiode 12 are thus transferred ¬ into the potential well formed in the substrate 10, below the first multiplication grid 16.
A l'étape de la figure 2C, la tension V^ (grille de transfert) repasse à un potentiel de référence tandis que la
tension Φ2 reste à ce potentiel de référence, par exemple égal à zéro, ce qui bloque les électrons dans la région du substrat 10 située sous la grille 16. Une nouvelle phase de stockage de charges peut alors commencer au niveau de la photodiode 12. A l'étape illustrée en figure 2D, on diminue la tension Φl appliquée sur la grille 16 jusqu'à une tension V4 faible. Le potentiel du substrat 10 situé en dessous de la grille 16 est ainsi abaissé. Pendant cette étape, les tensions Vrj et Φ2 appliquées, respectivement, aux grilles 14 et 18, sont nulles (potentiel de référence) . De préférence, juste avant l'étape suivante, la tension Φ3 appliquée à la grille 20 est fixée à une tension V5 très supérieure à la tension V4, en prévision de l'étape suivante.In the step of FIG. 2C, the voltage V ^ (transfer gate) returns to a reference potential while the voltage Φ2 remains at this reference potential, for example equal to zero, which blocks the electrons in the region of the substrate 10 located under the gate 16. A new charge storage phase can then begin at the photodiode 12. A the step illustrated in Figure 2D, decreases the voltage Φl applied to the gate 16 to a low voltage V4. The potential of the substrate 10 located below the gate 16 is thus lowered. During this step, the voltages Vr j and Φ2 applied, respectively, to the gates 14 and 18, are zero (reference potential). Preferably, just before the next step, the voltage Φ3 applied to the gate 20 is set to a voltage V5 much higher than the voltage V4, in anticipation of the next step.
A l'étape illustrée en figure 2E, la tension Φ2 appliquée à la grille 18 augmente rapidement pour être de l'ordre de la tension V4, ou légèrement supérieure à V4. La tension Φ3 étant égale à V5 (très supérieure à V4) , les charges sont transférées vers la région du substrat située sous la grille 20. La différence de potentiel entre la région située sous la grille 18 (≈ V4) et sous la grille 20 (V5) est suffisam¬ ment élevée pour permettre la multiplication des charges par effet d'avalanche électronique. Pendant cette étape, la grille 22 est polarisée à une tension nulle pour former un mur de potentiel et bloquer les charges au niveau de la grille 20. A titre d'exemple, la tension V4 peut être de l'ordre de 1 V et la tension V5 de 10 V. On notera que l'étape de transfert de charges (figure 2B) pourra également participer à l'amplifica¬ tion de celles-ci, la tension appliquée à la grille 16 lors de cette étape étant alors adaptée à produire une multiplication (tension élevée) .In the step illustrated in Figure 2E, the voltage Φ2 applied to the gate 18 increases rapidly to be of the order of the voltage V4, or slightly higher than V4. Since the voltage Φ3 is equal to V5 (much higher than V4), the charges are transferred to the region of the substrate situated under the gate 20. The potential difference between the region located under the gate 18 (≈ V4) and under the gate 20 (V5) is sufficiently high to allow ¬ multiplication of charges by electronic avalanche. During this step, the gate 22 is biased to a zero voltage to form a potential wall and block the charges at the gate 20. By way of example, the voltage V4 may be of the order of 1 V and the 10 V V5 voltage. Note that the charge transfer step (Figure 2B) may also participate in the amplifica ¬ tion thereof, the voltage applied to the gate 16 during this step then being adapted to produce a multiplication (high voltage).
Pour que la multiplication des charges par effet d'avalanche soit significative, les étapes des figures 2D et 2E sont répétées plusieurs fois. Pour cela, on réalise des trans¬ ferts en allers-retours au niveau des grilles 14, 16, 18, 20 et 22, ce qui permet de limiter le nombre de grilles à former.
Un problème se pose s ' il survient une durée longue à très faible niveau d'éclairement, par exemple dans le cas où le capteur d'image est destiné à détecter des images dans un envi¬ ronnement sombre (images nocturnes par exemple) . Dans ce cas, on montrera que le transfert des charges lors de l'étape de la figure 2B peut être incomplet ou être faussé. Le signal issu du détecteur présente alors des performances très dégradées, notamment en terme de rapport signal sur bruit.For the multiplication of charges by avalanche effect is significant, the steps of Figures 2D and 2E are repeated several times. For this, one carries out trans ¬ ferts back and forth at the grids 14, 16, 18, 20 and 22, which limits the number of grids to form. A problem arises if it occurs a long duration with a very low level of illumination, for example in the case where the image sensor is intended to detect images in an envi ronment ¬ dark (night images for example). In this case, it will be shown that the transfer of the charges during the step of FIG. 2B may be incomplete or be falsified. The signal from the detector then has very poor performance, especially in terms of signal-to-noise ratio.
Ainsi, il existe un besoin d'un dispositif permettant une détection et une transmission du signal de qualité, même à faible éclairement. RésuméThus, there is a need for a device for detection and transmission of the quality signal, even at low illumination. summary
Un objet d'un mode de réalisation de la présente invention est de prévoir un capteur d'image permettant une bonne détection lors d'un éclairement faible.An object of an embodiment of the present invention is to provide an image sensor allowing good detection during low illumination.
Ainsi, un mode de réalisation de la présente invention prévoit un dispositif élémentaire d'un capteur d'image, compre¬ nant une photodiode constituée d'une zone dopée d'un premier type de conductivité formée en surface d'un substrat semiconduc- teur d'un second type de conductivité adapté à être polarisé à une première tension de référence, la photodiode étant associée à un dispositif de transfert, de multiplication et d'isolement de charges, la photodiode étant de type complètement déplétée et comprenant, en surface de la zone dopée du premier type de conductivité, une région fortement dopée du second type de conductivité adaptée à être polarisée à une seconde tension de référence.Thus, one embodiment of the present invention provides a unit device of an image sensor include an ¬ ing a photodiode consisting of a doped region of a first conductivity type formed on the surface of a semiconduc- tor substrate a second type of conductivity adapted to be polarized at a first reference voltage, the photodiode being associated with a device for transferring, multiplying and isolating charges, the photodiode being of the completely depleted type and comprising, on the surface of the doped zone of the first conductivity type, a highly doped region of the second conductivity type adapted to be biased to a second reference voltage.
Selon un mode de réalisation de la présente invention, le dispositif de transfert, de multiplication et d'isolement de charges comprend une grille de transfert, une grille d'isolement et une pluralité de grilles de multiplication adaptées à être polarisées de façon à fixer le potentiel du substrat sous-jacent et permettre le transfert, l'isolement et la multiplication des charges par effet d'avalanche électronique.
Selon un mode de réalisation de la présente invention, le dispositif de transfert, de multiplication et d'isolement de charges comprend au moins cinq grilles.According to one embodiment of the present invention, the device for transferring, multiplying and isolating charges comprises a transfer gate, an isolation gate and a plurality of multiplication gates adapted to be polarized so as to fix the gate. potential of the underlying substrate and allow the transfer, isolation and multiplication of charges by electronic avalanche effect. According to one embodiment of the present invention, the device for transferring, multiplying and isolating charges comprises at least five grids.
Selon un mode de réalisation de la présente invention, les première et seconde tensions de référence sont égales et sont des tensions de masse.According to an embodiment of the present invention, the first and second reference voltages are equal and are ground voltages.
Selon un mode de réalisation de la présente invention, une couche dopée du premier type de conductivité est formée, en surface du substrat, en regard des grilles de transfert, d'isolement et de multiplication des charges.According to one embodiment of the present invention, a doped layer of the first type of conductivity is formed, on the surface of the substrate, facing the transfer gates, isolation and multiplication charges.
Selon un mode de réalisation de la présente invention, le dispositif comprend en outre un masque optique formé sur le dispositif de transfert, de multiplication et d'isolement des charges. Selon un mode de réalisation de la présente invention, le substrat est aminci et est destiné à être éclairé par la face opposée à celle sur laquelle est formé le dispositif de transfert, de multiplication et d'isolement de charges.According to one embodiment of the present invention, the device further comprises an optical mask formed on the device for transferring, multiplying and isolating the charges. According to one embodiment of the present invention, the substrate is thinned and is intended to be illuminated by the face opposite to that on which is formed the device for transferring, multiplying and isolating charges.
Selon un mode de réalisation de la présente invention, le premier type de conductivité est le type N.According to one embodiment of the present invention, the first type of conductivity is the type N.
La présente invention vise également un capteur d'image comprenant une pluralité de dispositifs élémentaires tels que ci-dessus.The present invention also provides an image sensor comprising a plurality of elementary devices as above.
Brève description des dessins Ces objets, caractéristiques et avantages, ainsi que d'autres seront exposés en détail dans la description suivante de modes de réalisation particuliers faite à titre non-limitatif en relation avec les figures jointes parmi lesquelles : la figure 1, précédemment décrite, illustre un capteur d'image à amplification de charge classique ; les figures 2A à 2E sont des courbes de potentiel illustrant le fonctionnement du dispositif de la figure 1 lorsqu'il est soumis à un éclairement important ; la figure 3 reprend la structure de la figure 1 et les figures 4A à 4C sont des courbes de potentiel illustrant un
problème susceptible d'être posé par cette structure en l'absence ou à faible niveau d'éclairement ; la figure 5 illustre un capteur d'image selon un mode de réalisation de la présente invention ; les figures 6 et 7 sont des courbes de potentiel dans le capteur de la figure 5 ; et la figure 8 illustre une variante d'un dispositif selon un mode de réalisation de la présente invention.BRIEF DESCRIPTION OF THE DRAWINGS These and other objects, features, and advantages will be set forth in detail in the following description of particular embodiments in a non-limiting manner with reference to the accompanying drawings, in which: FIG. , illustrates a conventional charge amplification image sensor; FIGS. 2A to 2E are potential curves illustrating the operation of the device of FIG. 1 when it is subjected to a large illumination; FIG. 3 shows the structure of FIG. 1 and FIGS. 4A to 4C are potential curves illustrating a problem likely to be posed by this structure in the absence or at low level of illumination; Fig. 5 illustrates an image sensor according to an embodiment of the present invention; Figures 6 and 7 are potential curves in the sensor of Figure 5; and Figure 8 illustrates a variant of a device according to an embodiment of the present invention.
Par souci de clarté, de mêmes éléments ont été désignés par de mêmes références aux différentes figures et, de plus, comme cela est habituel dans la représentation des circuits intégrés, les diverses figures ne sont pas tracées à l'échelle.For the sake of clarity, the same elements have been designated by the same references in the various figures and, moreover, as is customary in the representation of the integrated circuits, the various figures are not drawn to scale.
Description détaillée La figure 3 reprend la structure de la figure 1, dans un cas d'un éclairement quasi-nul (pas de faisceau lumineux 13) . Le dispositif comprend une photodiode 12 constituée d'une région fortement dopée de type N (N+) formée en surface d'un substrat 10 de type P, une grille de transfert 14 isolée formée en surface du substrat 10 et commandée par un signal de transfert Vrj et des grilles isolées de multiplication de charges 16, 18, 20, 22 commandées, respectivement, par des signaux Φl, Φ2, Φ3, Φ4.DETAILED DESCRIPTION FIG. 3 shows the structure of FIG. 1, in a case of almost zero illumination (no light beam 13). The device comprises a photodiode 12 consisting of a strongly doped N-type region (N +) formed on the surface of a P-type substrate 10, an insulated transfer gate 14 formed on the surface of the substrate 10 and controlled by a transfer signal. Vr j and isolated multiplication gates of charges 16, 18, 20, 22 controlled respectively by signals Φl, Φ2, Φ3, Φ4.
Les figures 4A à 4C sont des courbes du potentiel dans le substrat 10, en suivant des lignes de potentiel maximum, pendant différentes étapes de fonctionnement du dispositif de la figure 3.FIGS. 4A to 4C are curves of the potential in the substrate 10, along lines of maximum potential, during different stages of operation of the device of FIG. 3.
La figure 4A illustre le potentiel dans le substrat 10 lors d'une succession d'étapes de stockage et de transfert de charges (le potentiel V^ de la grille 14 variant entre zéro etFIG. 4A illustrates the potential in the substrate 10 during a succession of storage and charge transfer steps (the potential V 1 of the gate 14 varying between zero and
V]_) . Lorsque l 'éclairement de la photodiode est nul, aucune paire électron/trou n'est créée et le potentiel de la photodiode devrait théoriquement rester constant. Cependant, il s'avère que celui-ci augmente progressivement au fil des cycles de
stockage/transfert, jusqu'à, dans l'exemple représenté, une tension V]_ ' (figure 4B) .V ] _). When the illumination of the photodiode is zero, no electron / hole pair is created and the potential of the photodiode should theoretically remain constant. However, it turns out that it increases gradually over the cycles of storage / transfer, up to, in the example shown, a voltage V ] _ '(Figure 4B).
L'augmentation du potentiel dans la photodiode, lors d'une succession de cycles en l'absence ou à très faible niveau d'éclairement, est due à un courant de fuite entre la photodiode 12 fortement dopée de type N et la zone de charge d'espace située en regard de la grille 16. Pendant les phases de transfert (V^ = V]_), les potentiels de la photodiode et du canal formé sous la grille 14 sont très proches et les charges de la région 12 fuient par le canal situé sous la grille 14 en direc¬ tion du puits de potentiel formé sous la grille 16, selon une loi en courant de faible inversion dont l'expression est en exp(-qV/kT), q étant la charge élémentaire, V la différence de potentiel entre le potentiel de la grille 14 et de la photodiode 12, k la constante de Boltzmann et T la température. Ainsi, le potentiel de la région 12 devient supérieur au potentiel en regard de la grille 14. On notera que, en cas d'éclairement important, ce problème ne se pose pas puisque le courant de fuite est alors négligeable par rapport au courant issu de 1 ' éclairement . Par contre, à faible niveau d'éclairement, ce phénomène vient perturber l'injection des charges dans l'étage multiplicateur, annulant l'intérêt de cet étage dans les cas les plus critiques où celui-ci est essentiel.The increase of the potential in the photodiode, during a succession of cycles in the absence or at a very low level of illumination, is due to a leakage current between the strongly doped N-type photodiode 12 and the charging zone. of space located opposite the gate 16. During the transfer phases (V ^ = V ] _), the potentials of the photodiode and the channel formed under the gate 14 are very close and the charges of the region 12 leak by channel located under the gate 14 in the direc ¬ the potential well formed under the gate 16, according to a power law weak inversion whose expression is exp (-QV / kT), where q is the elementary charge, V the potential difference between the potential of the gate 14 and the photodiode 12, k the Boltzmann constant and T the temperature. Thus, the potential of the region 12 becomes greater than the potential with respect to the gate 14. It will be noted that, in case of significant illumination, this problem does not arise since the leakage current is then negligible compared to the current coming from 1 illumination. On the other hand, at low level of illumination, this phenomenon disturbs the injection of the charges in the multiplier stage, canceling the interest of this stage in the most critical cases where this one is essential.
Une fois le potentiel V]_ ' atteint, si un faible éclai- rement intervient et qu'une faible quantité d'électrons se trouve stockée dans la photodiode 12 (figure 4C), l'efficacité de lecture de ces charges sera très mauvaise, une quantité réduite d'électrons réussissant à passer la barrière de poten¬ tiel formée par la région située sous la grille 14 lors d'un transfert. En effet, puisque le potentiel dans la photodiode est passé de V]_ à V]_ ' , on a V]_ ' > V^ lors du transfert, ce qui forme un mur de potentiel ne permettant pas le transfert des électrons stockés dans la photodiode ou permettant seulement un transfert partiel. De plus, si une quantité d'électrons suffisante pour le transfert est stockée dans la photodiode 12, le transfert est
faussé du fait de la variation du potentiel pendant la période sans éclairement de la photodiode (on transfère moins de charges qu'il n'y en a eu de réellement stockées dans la photodiode 12) . Ainsi, dans le cas d'un très faible éclairement ou d'un éclairement nul, la lecture des charges réalisée par le dispositif de la figure 3 n'est pas bonne.Once the potential V] _ 'reached, if a low éclai- surely occurs and a small amount of electrons is stored in the photodiode 12 (Figure 4C), the reading efficiency of these loads will be very bad, a reduced amount of electrons succeeding to pass the barrier poten ¬ tiel formed by the region located under the gate 14 during a transfer. Indeed, since the potential in the photodiode is increased from V] _ to V] _ ', V] _'> V ^ during the transfer, which forms a potential wall does not allow the transfer of electrons stored in the photodiode or allowing only a partial transfer. Moreover, if a sufficient quantity of electrons for the transfer is stored in the photodiode 12, the transfer is distorted due to the variation of the potential during the period without illumination of the photodiode (transferring fewer charges than there were actually stored in the photodiode 12). Thus, in the case of very low illumination or zero illumination, the reading of the charges carried out by the device of FIG. 3 is not good.
Pour résoudre ce problème, les inventeurs proposent d'utiliser une photodiode particulière et, plus particulière¬ ment, une photodiode dans laquelle le potentiel de la région de capture d'électrons ne peut pas augmenter au-dessus d'un seuil prédéterminé. On peut ainsi lire correctement les charges photo- générées, y compris dans les cas de faible éclairement.To solve this problem, the inventors propose to use a particular photodiode and, more particularly ¬, a photodiode in which the potential of the electron capture region can not rise above a predetermined threshold. In this way, the photogenerated charges can be correctly read, even in cases of low illumination.
La figure 5 illustre une telle photodiode. Les inven¬ teurs proposent d'utiliser une photodiode de type clampée et complètement déplétée (en anglais fully depleted photodiode, ou pinned photodiode) . La photodiode est formée dans un substrat 30 de type P et comprend une région de capture 32 dopée de type N en surface de laquelle s'étend une région 34 mince fortement dopée de type P (P+) . Le substrat 30 est polarisé à un premier potentiel de référence Vre-Q et la région 34 fortement dopée de type P est polarisée à un second potentiel de référence, Vref2. Les premier et second potentiels de référence, Vre-Q et Vref2, peuvent être égaux et correspondre à une tension de masse, mais on notera que l'on pourra également prévoir de polariser le substrat 30 et la région 34 à des tensions de référence différentes.Figure 5 illustrates such a photodiode. The inven ¬ tors suggest using a photodiode and clamped completely depleted (in English fully-depleted photodiode, or pinned photodiode). The photodiode is formed in a P-type substrate and comprises an N-type doped capture region 32 at the surface of which extends a P-type (P +) strongly doped thin-film region 34. The substrate 30 is biased at a first reference potential V re - Q and the heavily doped P-type region 34 is biased at a second reference potential, V re f2. The first and second reference potentials, V re -Q and V re f2, may be equal and correspond to a ground voltage, but it will be noted that it is also possible to bias the substrate 30 and the region 34 to voltages. different reference numbers.
La photodiode est associée à une grille de transfert 36, à des grilles de multiplication de charges 38, 40, 42, et à une grille d'isolement 44 formées en surface du substrat 30, au voisinage de la photodiode. Les grilles 36, 38, 40, 42, 44 ont des structures de grille isolées et sont commandées, respective¬ ment, par des signaux de commande V^, Φl, Φ2, Φ3, Φ4. De préférence, on prévoit une couche de protection (non représentée) , ou masque optique, au-dessus de la grille de transfert 36, des grilles d'amplification ou de multiplication 38, 40, 42 et de la
grille d'isolement 44, pour que des faisceaux lumineux incidents ne génèrent pas de charges dans le substrat situé sous ces grilles.The photodiode is associated with a transfer gate 36, charge multiplication gates 38, 40, 42, and an isolation gate 44 formed on the surface of the substrate 30, in the vicinity of the photodiode. The gates 36, 38, 40, 42, 44 have insulated gate structures and are controlled respective ¬, for V ^ control signals, Φl, Φ2, Φ3, Φ4. Preferably, there is provided a protective layer (not shown), or optical mask, above the transfer gate 36, amplification grids or multiplication 38, 40, 42 and the isolation grid 44, so that incident light beams do not generate charges in the substrate located under these grids.
Les dopages des zones 32 et 34 sont ajustés de telle façon que la zone 34 fortement dopée de type P déplète complète¬ ment la zone 32 de type N. Ainsi, hors équilibre thermodynamique et en l'absence d'éclairement, le potentiel de la zone 32 est fixé uniquement par les dopages de la photodiode et du substrat, ce qui évite le régime de faible inversion lors du transfert des charges vers le substrat situé en regard de la grille 38. On notera que, contrairement à ce qui est représenté en figure 5, dans un dispositif réel, la plus grande partie de la surface de chaque pixel est dévolue à la photodiode (zone de détection du dispositif) . La figure 6 est une courbe du potentiel de la structure illustrée en figure 5 selon une coupe A-A, dans la hauteur du dispositif au niveau de la photodiode 32/34, dans le cas où Vref]_ = Vref2 = 0 V. En l'absence d'éclairement de la photodiode, le potentiel au coeur de la région 34 de type N est complètement déterminé par les dopages des régions 30, 32, 34 et, ainsi, la région 32 atteint au maximum un potentiel V]_max.The doping of the zones 32 and 34 are adjusted so that the heavily doped region 34 of P-type full ¬ depleted zone 32 of N-type Thus, non-equilibrium and the absence of illumination, the potential of the zone 32 is fixed only by the doping of the photodiode and the substrate, which avoids the low inversion regime when the charges are transferred to the substrate situated opposite the gate 38. It will be noted that, contrary to what is shown in FIG. 5, in a real device, most of the surface of each pixel is assigned to the photodiode (detection zone of the device). Figure 6 is a plot of the potential of the structure illustrated in Figure 5 according to section AA in the height of the device at the photodiode 32/34, in the case where V ref] _ = V re f2 = 0 V In the absence of illumination of the photodiode, the potential in the heart of the N-type region 34 is completely determined by the doping of the regions 30, 32, 34 and, thus, the region 32 reaches at most a potential V ] _ max .
On évite ainsi les inconvénients présentés en relation avec les figures 3 et 4A à 4C, à savoir la variation du poten¬ tiel maximum dans la région de capture de la photodiode en cas de faible éclairement. Lorsque la photodiode est éclairée, le potentiel de la région 32 diminue et lorsque le transfert des charges intervient, le potentiel de la région 32 revient à vlmax • This avoids the drawbacks presented in connection with Figures 3 and 4A to 4C, namely the variation of poten tial ¬ maximum in the capture region of the photodiode in the case of low illumination. When the photodiode is illuminated, the potential of the region 32 decreases and when the load transfer occurs, the potential of the region amounts to 32 V Imax •
La figure 7 illustre une courbe de potentiel identique à celle représentée en figure 4A (selon la ligne de potentiel maximum) dans le cas du dispositif de la figure 5. Dans ce cas, même sans éclairement de la photodiode, le potentiel de la région 32 reste toujours égal ou inférieur à V]_max. Ainsi, toutes les charges photogénérées et stockées dans la photodiode sont transférées lors d'une phase de transfert où la tension V^
passe à une tension V4, égale ou légèrement supérieure à V]_max, ce qui rend le capteur efficace même en cas de très faible éclairement ou après une longue période d'éclairement nul.FIG. 7 illustrates a potential curve identical to that represented in FIG. 4A (along the line of maximum potential) in the case of the device of FIG. 5. In this case, even without illumination of the photodiode, the potential of the region 32 always remains equal to or less than V ] _ max . Thus, all photogenerated charges stored in the photodiode are transferred during a transfer phase where the voltage V ^ it switches to a voltage V4 equal to or slightly greater than V ] _ max , which makes the sensor effective even in the case of very low illumination or after a long period of zero illumination.
Une fois que le transfert des électrons de la photo- diode vers la charge d'espace située sous la grille 38 est effectué, on réalise un cycle d'amplification des charges de façon classique, en appliquant un champ électrique important entre deux grilles adjacentes. On tire alors profit de l'effet d'avalanche électronique en forçant les charges à des allers- retours sous les grilles 38, 40 et 42 afin d'obtenir une ampli¬ fication significative. Le gain de l'amplification est ajusté en contrôlant le nombre d'allers-retours sous les grilles 38, 40 et 42. La grille de transfert 36 et la grille d'isolement 44 servent alors de murs de potentiel pour éviter que des charges ne sortent du dispositif lors de l'amplification des charges. Les grilles 38 et 42 sont alternativement polarisées pour créer des différences de potentiel importantes permettant l'effet d'avalanche électronique. On notera que l'on pourra également former le dispositif de transfert, d'amplification et d'isole- ment de charges en combinant plus de cinq grilles voisines.Once the transfer of electrons from the photodiode to the space charge below the gate 38 is performed, a charge amplification cycle is performed in a conventional manner, by applying a large electric field between two adjacent gates. We then take advantage of the electronic avalanche effect by forcing the loads back and forth under the grids 38, 40 and 42 in order to obtain a significant amplification ¬ . The gain of the amplification is adjusted by controlling the number of back and forth under the grids 38, 40 and 42. The transfer gate 36 and the isolation grid 44 then serve as potential walls to prevent charges from being lost. exit the device during the amplification of the loads. Grids 38 and 42 are alternately polarized to create large potential differences enabling the electronic avalanche effect. Note that it will also be possible to form the device for transferring, amplifying and isolating charges by combining more than five neighboring grids.
Optionnellement, une fine couche 46 dopée de type N pourra être formée, en surface du substrat 30, en regard de la grille de transfert 36, de multiplication 38, 40, 42 et d'isole¬ ment 44. Cette fine couche 46 permet d'éloigner légèrement le point de potentiel maximum de la surface du substrat pour éviter des phénomènes parasites (bruits) souvent présents aux inter¬ faces entre isolant de grille et substrat semiconducteur.Optionally, a thin N-type doped layer 46 may be formed, on the surface of the substrate 30, facing the transfer gate 36, of multiplication 38, 40, 42 and of isolation 44. This thin layer 46 makes it possible to move the maximum potential point slightly away from the surface of the substrate in order to avoid parasitic phenomena (noises) often present at the interfaces between the gate insulator and the semiconductor substrate.
La figure 8 illustre une variante du dispositif de la figure 5 dans laquelle le capteur d'image est éclairé par la face arrière du substrat 30. Le dispositif de la figure 8 diffère de celui de la figure 5 en ce que le substrat 30 est aminci et est éclairé par la face opposée à celle sur laquelle sont formées la grille de transfert 36, les grilles de multipli¬ cation de charges 38, 40, 42 et la grille d'isolement 44. Pendant la phase d'accumulation, un faisceau lumineux 48
atteignant le substrat y génère des paires électrons/trous et les électrons de ces paires sont collectés dans le puits de potentiel formé par la photodiode 32. Avantageusement, et de façon classique, un faisceau arrivant par la face arrière d'un substrat rencontre moins d'obstacles et est plus facilement détectable qu'un faisceau arrivant sur la face avant du substrat. Le fonctionnement de ce dispositif est ensuite similaire à celui décrit ci-dessus.FIG. 8 illustrates a variant of the device of FIG. 5 in which the image sensor is illuminated by the rear face of the substrate 30. The device of FIG. 8 differs from that of FIG. 5 in that the substrate 30 is thinned. and is illuminated by the face opposite that on which are formed the transfer gate 36, the multiplied grids ¬ cation loads 38, 40, 42 and the isolation gate 44. During the accumulation phase, a light beam 48 reaching the substrate generates electron pairs / holes and the electrons of these pairs are collected in the potential well formed by the photodiode 32. Advantageously, and conventionally, a beam arriving through the rear face of a substrate encounters less power. obstacles and is more easily detectable than a beam arriving on the front face of the substrate. The operation of this device is then similar to that described above.
Des modes de réalisation particuliers de la présente invention ont été décrits. Diverses variantes et modifications apparaîtront à l'homme de l'art. En particulier, bien que l'on ait décrit ici un dispositif dans lequel les charges photo- générées utiles sont les électrons, on notera que l'on pourra également prévoir des dispositifs similaires dans lesquels les charges utiles sont les trous. Pour cela, les types de conducti- vité des différentes régions dopées seront inversés, et les tensions appliquées aux différentes grilles pour les transferts de charges seront de signe opposé à celles présentées ci-dessus.Particular embodiments of the present invention have been described. Various variations and modifications will be apparent to those skilled in the art. In particular, although a device has been described here in which the useful photo-generated charges are electrons, it will be appreciated that similar devices may also be provided in which the payloads are the holes. For this purpose, the conductivity types of the different doped regions will be inverted, and the voltages applied to the different gates for the charge transfers will be of opposite sign to those presented above.
Les dispositifs des figures 5 et 8 pourront également être utilisés dans le cas de forts niveaux d'éclairement . Dans ce cas, on peut prévoir d'adapter le temps d'intégration, ou d'accumulation de charges, dans la photodiode en fonction de 1 'éclairement, à l'aide d'un circuit électronique adapté, pour éviter la saturation du pixel.
The devices of Figures 5 and 8 may also be used in the case of high levels of illumination. In this case, it is possible to adapt the integration time, or accumulation of charges, in the photodiode as a function of the illumination, using a suitable electronic circuit, to avoid the saturation of the pixel .
Claims
1. Dispositif élémentaire d'un capteur d'image, comprenant une photodiode constituée d'une zone dopée d'un premier type de conductivité (32) formée en surface d'un substrat semiconducteur d'un second type de conductivité (30) adapté à être polarisé à une première tension de référence (Vref]_), la photodiode étant associée à un dispositif de transfert (36), de multiplication (38, 40, 42) et d'isolement (44) de charges, la photodiode étant de type complètement déplétée et comprenant, en surface de la zone dopée du premier type de conductivité, une région fortement dopée du second type de conductivité (34) adaptée à être polarisée à une seconde tension de référence (Vref2) •An elementary device of an image sensor, comprising a photodiode consisting of a doped area of a first conductivity type (32) formed on the surface of a semiconductor substrate of a second conductivity type (30) adapted to be biased to a first reference voltage (V re f ] _), the photodiode being associated with a charge transfer (36), multiplication (38, 40, 42) and charge isolation (44) device, photodiode being of completely depleted type and comprising, on the surface of the doped zone of the first conductivity type, a heavily doped region of the second conductivity type (34) adapted to be polarized at a second reference voltage (V re f2);
2. Dispositif selon la revendication 1, dans lequel le dispositif de transfert, de multiplication et d'isolement de charges comprend une grille de transfert (36), une grille d'iso¬ lement (44) et une pluralité de grilles de multiplication (38, 40, 42) adaptées à être polarisées de façon à fixer le potentiel du substrat (30) sous-jacent et permettre le transfert, l'isolement et la multiplication des charges par effet d'avalanche électronique.2. Device according to claim 1, wherein the transfer device, multiplication and isolation of loads comprises a transfer gate (36), a gate iso ¬ LEMENT (44) and a plurality of multiplication gates ( 38, 40, 42) adapted to be polarized so as to fix the potential of the underlying substrate (30) and to allow the transfer, isolation and multiplication of charges by electronic avalanche effect.
3. Dispositif selon la revendication 2, dans lequel le dispositif de transfert, de multiplication et d'isolement de charges comprend au moins cinq grilles (36, 38, 40, 42, 44) .3. Device according to claim 2, wherein the device for transferring, multiplying and isolating charges comprises at least five grids (36, 38, 40, 42, 44).
4. Dispositif selon l'une quelconque des revendica- tions 1 à 3, dans lequel les première et seconde tensions de référence (Vref]_, Vref2) sont égales et sont des tensions de masse.4. Device according to any one of claims 1 to 3, wherein the first and second reference voltages (V re f] _, V re f2) are equal and are ground voltages.
5. Dispositif selon l'une quelconque des revendica¬ tions 2 à 4, dans lequel une couche (46) dopée du premier type de conductivité est formée, en surface du substrat (30) , en regard des grilles de transfert (36), d'isolement (44) et de multiplication des charges (38, 40, 42) .5. Device according to any one of revendica ¬ tions 2 to 4, wherein a layer (46) doped with the first type of conductivity is formed on the surface of the substrate (30), facing the transfer grids (36), isolating (44) and multiplying charges (38, 40, 42).
6. Dispositif élémentaire selon l'une quelconque des revendications 1 à 5, comprenant en outre un masque optique formé sur le dispositif de transfert, de multiplication et d'isolement des charges.6. Elementary device according to any one of claims 1 to 5, further comprising an optical mask formed on the device for transferring, multiplying and isolating charges.
7. Dispositif élémentaire selon l'une quelconque des revendications 1 à 6, dans lequel le substrat (30) est aminci et est destiné à être éclairé par la face opposée à celle sur laquelle est formé le dispositif de transfert, de multiplication et d'isolement de charges.7. Elementary device according to any one of claims 1 to 6, wherein the substrate (30) is thinned and is intended to be illuminated by the face opposite to that on which is formed the transfer device, multiplication and isolation of charges.
8. Dispositif selon l'une quelconque des revendica¬ tions 1 à 7, dans lequel le premier type de conductivité est le type N.8. Device according to any one of revendica ¬ tions 1 to 7, wherein the first type of conductivity is the type N.
9. Capteur d'image comprenant une pluralité de dispo¬ sitifs élémentaires selon l'une quelconque des revendications 1 à 8. 9. An image sensor comprising a plurality of elementary dispensing devices according to any one of claims 1 to 8.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0953192A FR2945667B1 (en) | 2009-05-14 | 2009-05-14 | INTEGRATED IMAGE SENSOR WITH VERY HIGH SENSITIVITY. |
PCT/FR2010/050919 WO2010130950A1 (en) | 2009-05-14 | 2010-05-11 | Built-in very high sensitivity image sensor |
Publications (1)
Publication Number | Publication Date |
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EP2430659A1 true EP2430659A1 (en) | 2012-03-21 |
Family
ID=41381729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP10731767A Withdrawn EP2430659A1 (en) | 2009-05-14 | 2010-05-11 | Built-in very high sensitivity image sensor |
Country Status (5)
Country | Link |
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US (1) | US20120119264A1 (en) |
EP (1) | EP2430659A1 (en) |
JP (1) | JP2012527106A (en) |
FR (1) | FR2945667B1 (en) |
WO (1) | WO2010130950A1 (en) |
Families Citing this family (5)
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JP5635938B2 (en) | 2011-03-31 | 2014-12-03 | 本田技研工業株式会社 | Solid-state imaging device |
JP5829036B2 (en) | 2011-03-31 | 2015-12-09 | 本田技研工業株式会社 | Signal addition method for unit pixel |
JP5660959B2 (en) * | 2011-03-31 | 2015-01-28 | 本田技研工業株式会社 | Receiver |
JP5573978B2 (en) * | 2012-02-09 | 2014-08-20 | 株式会社デンソー | Solid-state imaging device and driving method thereof |
CN112864183B (en) * | 2021-01-18 | 2023-08-25 | 上海集成电路装备材料产业创新中心有限公司 | Pixel structure for improving transmission delay |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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US6278142B1 (en) * | 1999-08-30 | 2001-08-21 | Isetex, Inc | Semiconductor image intensifier |
US20050029553A1 (en) * | 2003-08-04 | 2005-02-10 | Jaroslav Hynecek | Clocked barrier virtual phase charge coupled device image sensor |
JP4212623B2 (en) | 2006-01-31 | 2009-01-21 | 三洋電機株式会社 | Imaging device |
US7755685B2 (en) * | 2007-09-28 | 2010-07-13 | Sarnoff Corporation | Electron multiplication CMOS imager |
JP2009135242A (en) * | 2007-11-30 | 2009-06-18 | Sanyo Electric Co Ltd | Imaging device |
FR2924862B1 (en) * | 2007-12-10 | 2010-08-13 | Commissariat Energie Atomique | PHOTOSENSITIVE MICROELECTRONIC DEVICE WITH AVALANCHE MULTIPLIERS |
-
2009
- 2009-05-14 FR FR0953192A patent/FR2945667B1/en not_active Expired - Fee Related
-
2010
- 2010-05-11 US US13/319,782 patent/US20120119264A1/en not_active Abandoned
- 2010-05-11 EP EP10731767A patent/EP2430659A1/en not_active Withdrawn
- 2010-05-11 JP JP2012510344A patent/JP2012527106A/en active Pending
- 2010-05-11 WO PCT/FR2010/050919 patent/WO2010130950A1/en active Application Filing
Non-Patent Citations (1)
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See references of WO2010130950A1 * |
Also Published As
Publication number | Publication date |
---|---|
FR2945667B1 (en) | 2011-12-16 |
FR2945667A1 (en) | 2010-11-19 |
WO2010130950A1 (en) | 2010-11-18 |
JP2012527106A (en) | 2012-11-01 |
US20120119264A1 (en) | 2012-05-17 |
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