EP2319097A1 - Puce à semi-conducteur optoélectronique - Google Patents

Puce à semi-conducteur optoélectronique

Info

Publication number
EP2319097A1
EP2319097A1 EP09776012A EP09776012A EP2319097A1 EP 2319097 A1 EP2319097 A1 EP 2319097A1 EP 09776012 A EP09776012 A EP 09776012A EP 09776012 A EP09776012 A EP 09776012A EP 2319097 A1 EP2319097 A1 EP 2319097A1
Authority
EP
European Patent Office
Prior art keywords
structural units
semiconductor chip
layer
chip according
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09776012A
Other languages
German (de)
English (en)
Inventor
Norbert Linder
Christopher Wiesmann
Ralph Wirth
Ross Stanley
Romuald Houdre
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ams Osram International GmbH
Original Assignee
Osram Opto Semiconductors GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Osram Opto Semiconductors GmbH filed Critical Osram Opto Semiconductors GmbH
Publication of EP2319097A1 publication Critical patent/EP2319097A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector

Definitions

  • the present application relates to an electromagnetic radiation emitting semiconductor chip having an active layer, which is provided for the emission of the electromagnetic radiation.
  • the chip has a two-dimensional arrangement of structural units, which is arranged downstream of the active layer in a main emission direction of the semiconductor chip.
  • Radiation-emitting semiconductor chips are known in which a two-dimensional photonic crystal is arranged downstream of the active layer in a main emission direction.
  • a two-dimensional photonic crystal in the literal sense has a two-dimensional and in two dimensions periodic arrangement of regions with different refractive indices. Photonic crystals influence the propagation of electromagnetic radiation by diffraction and interference.
  • photonic crystals Analogous to crystals that have an electronic band structure, photonic crystals have a photonic band structure.
  • the photonic band structure may include areas of forbidden energy in which electromagnetic waves can not propagate within the crystal. This is called photonic band gaps.
  • An example of a radiation-emitting semiconductor chip with a two-dimensional photonic crystal is described in US Pat. No. 5,955,749. In this document it is stated that an increased radiation decoupling from the semiconductor chip can be realized by means of such a photonic crystal.
  • the semiconductor chip should have a directional emission characteristic in which the electromagnetic radiation is emitted for the most part within a relatively narrow emission cone.
  • the so-called Lambert 'radiation characteristic of a Lambert' see surface radiator could be referred to, which has an approximately direction-independent radiation density.
  • a radiation may be desirable in which a large part of the electromagnetic radiation is emitted in shallow angle (sublambert 'see emission).
  • An electromagnetic radiation-emitting semiconductor chip which has an active layer which is provided for the emission of the electromagnetic radiation.
  • the semiconductor chip comprises a two-dimensional arrangement of structural units arranged downstream of the active layer in a main emission direction of the semiconductor chip.
  • the structural units are arranged in an arbitrary statistical distribution.
  • the arbitrary statistical distribution of the structural units satisfies the Framework condition that the distribution of the distances of the next adjacent structural units one
  • the structural units are volumes laterally adjacent to regions of different refractive index. In other words, there is a refractive index jump between the structural units and the laterally adjacent regions.
  • lateral is previously used in the sense of “lateral”. By “lateral” is meant a direction parallel to a main extension plane of the active layer or the semiconductor chip. Vertical is according to a direction perpendicular to a main extension plane of the active layer or the semiconductor chip.
  • the structural units may in particular be recesses in a material layer or elevations extending away from a material layer.
  • the material layer may in particular be a semiconductor layer.
  • the structural units may have solid material and laterally adjoin a region filled with a gas, in particular air.
  • the structural units may also be areas which are filled with a gas, in particular air, and laterally adjoin a region comprising a solid material.
  • both the structural units or the laterally adjacent region to comprise a solid material, it being possible for the refractive index of the structural units to be both smaller and larger than that of the laterally delimiting regions.
  • a two-dimensional array is an array along a surface. The surface can be even. However, it can basically also be a curved surface.
  • the structural units are arranged in an arbitrary statistical distribution, that is, they are not arranged according to a deterministic mathematical algorithm.
  • the arrangement of the structural units does not follow any regularity, it is not a periodic arrangement and in particular also no aperiodic arrangement, which is created according to a predetermined regularity. Quasicrystalline arrangements also do not fall under an arbitrary, statistical distribution.
  • the arrangement of the structural units is not an arrangement starting from a periodic arrangement in which the position of the structural units arbitrarily but slightly deviates from the regular structure, with deviations of, for example, 10% or 20% of a lattice constant of the periodic arrangement.
  • it is nevertheless a substantially periodic arrangement.
  • a regular diffraction pattern is obtained.
  • the diffraction pattern is merely smeared but the same diffraction pattern remains.
  • the arbitrary statistical distribution of the structural units is not subject to any deterministic mathematical algorithm, but in one embodiment satisfies the constraint that the distribution of nearest neighbor distances has a standard deviation of at least +/- 10% and at most +/- 25% from an average.
  • a pair distribution function which describes the lateral distances of the adjacent structural units may have a maximum at a certain distance or a plurality of specific distances.
  • standard deviation implies that some distances may be less than 10% or more than 25% different from the mean.
  • standard deviation is a well-known and well-defined expression in the statistics.
  • an arbitrary statistical distribution of structural units may be suitable for acting in a manner similar to a photonic crystal.
  • a scattering of the electromagnetic radiation at the structural units generates in the far field, in particular, a ring with no recognizable substructure.
  • a directional radiation characteristic can be realized.
  • the directional radiation characteristic is a larger proportion of a electromagnetic radiation emitted in a certain Abstrahlkegel, for example, plus / minus 30 °, as without the arrangement of the structural units.
  • the structural units are suitable for influencing the electromagnetic radiation in its propagation.
  • the structural units each have a first lateral extent, a second lateral extent measured perpendicular to the first lateral extent, and / or a vertical extent greater than or equal to 0.2 times a wavelength of the emission maximum of the electromagnetic radiation is less than or equal to five times a wavelength of the emission maximum of the electromagnetic radiation.
  • the first lateral extent is measured along any first lateral direction.
  • extension the term “extension” or “spatial extension” can be used in principle. It is a one-dimensional size of the structural unit over which the structural unit extends along the first lateral direction.
  • the second lateral extension is the one-dimensional extension of the structural unit, which is measured perpendicular to the first extension, that is to the first lateral direction.
  • the first lateral direction for measuring the first lateral extension is preferably the same for all structural units, ie the first lateral extensions are aligned parallel to one another.
  • the maximum lateral extent is selected for each structural unit as the first lateral extent.
  • a radiation-emitting semiconductor chip emits not only radiation of a single wavelength but an emission spectrum having a maximum.
  • the first lateral extension, the second lateral extension and the vertical extent of the structural units are each greater than 0.2 times a wavelength of the emission maximum of the electromagnetic radiation. Additionally or alternatively, the first lateral extension, the second lateral extension and the vertical extension of the structural units are in each case less than five times a wavelength of the emission maximum of the electromagnetic radiation according to a further embodiment.
  • An additional embodiment provides that the first lateral extension, the second lateral extension and / or the vertical extension of the structural units deviates by less or at most 10% from the corresponding value of the respective remaining structural units.
  • the area of a projection of the structural units onto a main extension plane of the active layer differs at most slightly from the corresponding area of the remaining structural units.
  • the deviation of the area may be less than or not more than 20%, preferably less than or at most 15%, particularly preferably less than or at most 10%.
  • the surface of the structural units is not substantially different from each other.
  • the first lateral extent, the second lateral extent and / or the vertical extent are, according to a further embodiment, substantially the same for the major part of the structural units or for all structural units. According to a further embodiment, the majority of
  • the structural units are formed in a layer comprising semiconductor material.
  • the layer preferably terminates a semiconductor layer sequence of the semiconductor chip in the main emission direction. It can consist of a single layer of material or have multiple layers with different material compositions.
  • the structural units are formed in multiple layers. The structural units can extend over a plurality of layers of a semiconductor layer sequence of the semiconductor chip and in particular also over all semiconductor layers of the semiconductor chip.
  • the active layer of the chip is in one embodiment part of an epitaxial semiconductor layer sequence.
  • the semiconductor layer sequence is provided on one of the main emission side of the semiconductor chip opposite side with a reflector layer.
  • a reflector layer in combination with the structural units can have an additional positive influence on the realization of a directional emission characteristic of the semiconductor chip.
  • the semiconductor chip is free of an epitaxial substrate.
  • the semiconductor chip has epitaxial semiconductor layers which are grown on an epitaxial substrate during manufacture. However, the epitaxial substrate is subsequently at least partially removed so that the resulting semiconductor chip is free of an epitaxial substrate.
  • a carrier element is contained in the semiconductor chip.
  • the reflector layer is arranged between the carrier element and the semiconductor layer sequence.
  • FIG. 1 shows a schematic side sectional view of the semiconductor chip according to a first embodiment
  • FIG. 2 shows a lateral schematic sectional view of the semiconductor chip according to a second exemplary embodiment
  • FIG. 3 shows a lateral schematic sectional view of the semiconductor chip according to a third exemplary embodiment
  • FIG. 4 shows a schematic plan view of an arrangement of structural elements that is suitable for the semiconductor chip
  • FIGS. 5a, 6a, 7a and 8a show schematic lateral sectional views of structural elements according to various exemplary embodiments
  • FIGS. 5a, 6a, 7a and 8a show schematic lateral sectional views of structural elements according to various exemplary embodiments
  • FIGS. 5a, 6a, 7a and 8a show schematic lateral sectional views of structural elements according to various exemplary embodiments
  • Figures 5b, 6b, 7b and 8b are schematic plan views of the structural units shown in Figures 5a, 6a, 7a and 8a according to the various embodiments.
  • a side view is meant a representation from an angle of view that extends in a lateral direction to the semiconductor chip or to the cross section of the semiconductor chip.
  • top view is meant an illustration from a viewpoint that is vertical to the semiconductor chip.
  • the semiconductor chip shown in FIG. 1 has epitaxial semiconductor layers 2, 3, 4. Each of these semiconductor layers may basically have a plurality of epitaxial sublayers which are not shown.
  • the semiconductor chip has structural units 5 in the form of protrusions or protrusions.
  • the structural units may also comprise or consist of epitaxial semiconductor material. They are formed in a layer 50. It It is also possible that the layer 50 does not comprise an epitaxial semiconductor material, but instead has, for example, an inorganic material such as glass or is formed from this.
  • the layer 50 is arranged downstream of epitaxial semiconductor layers 2, 3, 4 in the main emission direction 6. If the layer 50 comprises a semiconductor material, it closes off the semiconductor layer sequence of the semiconductor chip in the main emission direction 6, for example. It is possible that the layer 50 and the structural units 5 in the main emission direction 6 is followed by additional material, which is not shown in the figures for reasons of clarity.
  • the semiconductor layer sequence has, for example, an active layer 2, a first cladding layer 3 and a second cladding layer 4.
  • the first cladding layer 3 and the second cladding layer 4 are each doped with at least one dopant, and have a different conductivity type from each other.
  • the first cladding layer 3 is n-doped and the second cladding layer 4 is p-doped.
  • it can also be the other way round.
  • the semiconductor chip may for example be based on a nitride, phosphide or arsenide compound semiconductor.
  • nitride compound semiconductor material in the present context means that the semiconductor layers of the chip or at least a part thereof, particularly preferably at least the active zone, a nitride compound semiconductor material, preferably Al n Ga m In 1-n - m N or has where O ⁇ n ⁇ l, O ⁇ m ⁇ l and n + m ⁇ 1.
  • This material does not necessarily have to have a mathematically exact composition according to the above formula. Rather, it may, for example, have one or more dopants and additional constituents.
  • the above formula contains only the essential constituents of the crystal lattice (Al, Ga, In, N), even if these can be partially replaced and / or supplemented by small amounts of further substances.
  • phosphide compound semiconductor material means that the semiconductor layer sequence or at least a part thereof, particularly preferably at least the active zone, preferably Al n Ga m Ini-n m P or As n Ga m Ini nm P where 0 ⁇ n ⁇ 1, 0 ⁇ m ⁇ 1 and n + m ⁇ 1.
  • this material does not necessarily have to have a mathematically exact composition according to the above formula. Rather, it may have one or more dopants as well as additional ingredients.
  • the above formula contains only the essential constituents of the crystal lattice (Al or As, Ga, In, P), even if these may be partially replaced by small amounts of other substances.
  • based on arsenide compound semiconductor material means that the semiconductor layer sequence or at least a part thereof, particularly preferably at least the active zone, preferably comprises Al n Ga n- As, where 0 ⁇ n ⁇ 1 not necessarily have a mathematically exact composition according to the above formula. Rather, it may have one or more dopants as well as additional ingredients.
  • the above formula contains only the essential components of the Crystal lattice (Al, Ga, As), although these may be partially replaced by small amounts of other substances.
  • the structural units 5 are formed in a continuous or closed layer 50.
  • the layer 50 has, for example, a continuous or closed part, from which the structural units 5 protrude in the main emission direction 6.
  • the layer 50 in which the structural units are formed may also be a non-continuous or non-closed layer, e.g. essentially consists of the spaced-apart structural units 5, see Figure 2.
  • the layer 50 may have corresponding breakthroughs.
  • the structural units 5 are formed by recesses in a layer 50.
  • the regions between the structural units 5 are filled with air, for example.
  • the structural units consist, for example, of air-filled recesses.
  • the regions between structural units 5 or the structural units 5 themselves may in principle have any other gaseous, liquid and / or solid substances. It is important that there is a significant jump in refractive index between the structural units 5 and the laterally adjacent regions.
  • the refractive indices of the structural units and lateral adjacent areas may be different by, for example, 1, 2, or more than 2.
  • the structural units 5 are, for example, all or at least substantially the same size and the same shape. However, they may also have slight differences in one or more of their characteristic size parameters.
  • Possible characteristic size parameters are, for example, a first lateral extent, a second lateral extent measured perpendicular to the first lateral extent, and the vertical extent. For example, at least one of these parameters may deviate from the corresponding size parameter of the remaining structural units by at most 10%, at most 8% or at most 5% in the case of the structural units.
  • Another possible characteristic size parameter of the structural units is the area of a projection of the structural units onto a main extension plane of the active layer 2.
  • the area of the structural units 5 can deviate, for example, by 17%, 13% or 7% from the corresponding area of the other structural units.
  • the size parameters may, in principle, also deviate to a greater extent from the corresponding size parameters of the other structural units.
  • the structural units 5 are arranged in an arbitrary statistical distribution.
  • the distribution of the structural units fulfills the general condition that the distribution of nearest neighbor distances has a standard deviation of at least +/- 10% and at most +/- 25% of an average. Such a distribution is illustrated, for example, in FIG. 4, in which a schematic plan view of an arrangement of structural units 5 is shown.
  • Such an arrangement of structural units 5 with an arbitrary statistical distribution can be produced for example by means of natural lithography.
  • beads or differently shaped bodies can be used as mask body for an etching process.
  • the layer 50 in which the structural units 5 are to be formed is selectively etched at the locations which are not covered by a mask body.
  • a dry etching method can be used.
  • the mask body for example, polystyrene bodies or silica bodies can be used. These are applied to the layer 50, for example, by means of a liquid containing water, alcohol or a mixture of water and alcohol. The application is carried out, for example, by immersing the body, on which the mask body are to be applied, in the liquid. Alternatively, the liquid may be e.g. be spun on the body.
  • the mask bodies may first be applied with a lower density than is ultimately provided. Subsequently, the bodies can then be selectively pushed together, for example mechanically. An arbitrary statistical distribution remains.
  • structural units in the form of recesses can also be produced by the same method. For example, a negative photoresist may be applied to the layer 50 and the mask bodies used as an exposure mask for it. Subsequently, the photoresist in the areas where the mask bodies were arranged can be selectively removed, and a plurality of structural units 5 can be formed in the form of recesses by means of etching, for example dry etching.
  • Further exemplary production methods may additionally or alternatively include the use of nanoimprinting, electron beam lithography, interference lithography and / or phase mask lithography.
  • Embodiments of the semiconductor chip each have a reflector layer 7, which is arranged upstream of the semiconductor layers 2, 3, 4 with respect to the main emission direction 6.
  • the reflector layer 7 has an electrically insulating layer 71 and a metallically conductive layer 72.
  • the electrically insulating layer 71 has openings 73, so that the metallic conductive material of the layer 72 can be passed therethrough.
  • the metallically conductive material 72 serves to feed electrical current into the semiconductor layers of the semiconductor chip.
  • a layer with a transparent, electrically conductive oxide (TCO) can be arranged between the semiconductor layers 2, 3, 4 and the reflector layer 7.
  • the semiconductor chips may also be free of a reflector 7.
  • a reflector 7 is advantageous for generating a directional radiation characteristic of the semiconductor chip in combination with the arrangement of the structural units 5.
  • the main emission direction 6 and emission directions 9 are illustrated by means of arrows at a critical angle 91.
  • a semiconductor chip without the structural units 5 with a semiconductor chip as illustrated in FIGS. 1 to 3, it is possible to achieve that a much greater proportion of the electromagnetic radiation is emitted within a radiation angle 91.
  • a large part of the electromagnetic radiation is emitted within a radiation cone of +/- 30 °.
  • the semiconductor chip illustrated in FIG. 1 has a carrier body 8.
  • the reflector layer 7 is arranged between the carrier body 8 and the semiconductor layers 2, 3, 4.
  • a carrier body for example, an electrically conductive semiconductor material can be used.
  • the semiconductor chip are, for example, free of an epitaxial substrate.
  • the semiconductor chip can also be realized with an epitaxial substrate.
  • the epitaxial substrate for producing the semiconductor chip is at least partially or completely removed.
  • the structural units 5 can also extend over a plurality of layers, ie the recesses can also be formed deeper than shown in the figures.
  • the layer 50 may comprise multiple layers of different material. It is also possible for the recesses to form structural units 5 to extend partly into or completely through the semiconductor layer sequence 2, 3, 4.
  • FIGS. 5A, 5B to 8A, 8B schematically show four different exemplary embodiments of a possible structural unit 5, both in a side view and in a plan view.
  • the structural unit 5 is a body which has a lateral cross-sectional area which is substantially constant in the vertical direction.
  • the structural unit 5 has an approximately circular surface (see FIG. 5B), although other surface shapes such as rectangles, squares, etc. are also possible.
  • FIG. 5A the vertical extent 53 and in FIG. 5B a first lateral extent 51, the second lateral extent 52 and the area 54 are identified.
  • the area 54 corresponds to the area of a projection of the structural unit 5 on a main extension plane of the active zone of the chip.
  • the structural unit 5 illustrated in FIGS. 6A and 6B likewise has an approximately circular shape in plan view. Generally speaking, the first lateral extent 51 and the second lateral extent 52 of FIG Structural unit 5 be about the same size. In contrast to the above-described structural unit, the structural unit 5 illustrated in FIGS. 6A and 6B has a shape that tapers in the vertical direction or in the main emission direction, see FIG. 6A.
  • the structural unit 5 illustrated in Figs. 7A and 7B has a main radiation direction side, e.g. contains several vaults.
  • the first lateral extension 51 and the second lateral extension 52 have different sizes.
  • the structural unit 5 has an irregular and asymmetrical shape.
  • FIGS. 8A and 8B illustrate an example of a structural unit 5 formed with a recess in a layer 50.
  • the vertical extent 52 is the depth of the recess.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Led Device Packages (AREA)

Abstract

L'invention porte sur une puce à semi-conducteur, comportant une couche active (2) qui est prévue pour l'émission d'un rayonnement électromagnétique, et un arrangement bidimensionnel d'unités structurales (5), qui est disposé en aval de la couche active, dans une direction principale de rayonnement (6) de la puce à semi-conducteur. Les unités structurales (5) sont disposées selon une répartition statistique quelconque. Grâce à un arrangement de ce type d'unités structurales, il est possible de réaliser une puce à semi-conducteur ayant une caractéristique dirigée de rayonnement.
EP09776012A 2008-08-29 2009-07-23 Puce à semi-conducteur optoélectronique Withdrawn EP2319097A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102008045028.6A DE102008045028B4 (de) 2008-08-29 2008-08-29 Optoelektronischer Halbleiterchip
PCT/DE2009/001038 WO2010022694A1 (fr) 2008-08-29 2009-07-23 Puce à semi-conducteur optoélectronique

Publications (1)

Publication Number Publication Date
EP2319097A1 true EP2319097A1 (fr) 2011-05-11

Family

ID=41314487

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09776012A Withdrawn EP2319097A1 (fr) 2008-08-29 2009-07-23 Puce à semi-conducteur optoélectronique

Country Status (7)

Country Link
US (1) US20110297982A1 (fr)
EP (1) EP2319097A1 (fr)
KR (1) KR20110056386A (fr)
CN (1) CN102138229B (fr)
DE (1) DE102008045028B4 (fr)
TW (1) TWI427826B (fr)
WO (1) WO2010022694A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008045028B4 (de) 2008-08-29 2023-03-16 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronischer Halbleiterchip
EP2613367A3 (fr) * 2012-01-06 2013-09-04 Imec Procédé de production d'un dispositif à DEL

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5779924A (en) 1996-03-22 1998-07-14 Hewlett-Packard Company Ordered interface texturing for a light emitting device
US5955749A (en) 1996-12-02 1999-09-21 Massachusetts Institute Of Technology Light emitting device utilizing a periodic dielectric structure
US6504180B1 (en) 1998-07-28 2003-01-07 Imec Vzw And Vrije Universiteit Method of manufacturing surface textured high-efficiency radiating devices and devices obtained therefrom
TW437104B (en) * 1999-05-25 2001-05-28 Wang Tien Yang Semiconductor light-emitting device and method for manufacturing the same
JP3466144B2 (ja) * 2000-09-22 2003-11-10 士郎 酒井 半導体の表面を荒くする方法
JP3782357B2 (ja) * 2002-01-18 2006-06-07 株式会社東芝 半導体発光素子の製造方法
US7083993B2 (en) 2003-04-15 2006-08-01 Luminus Devices, Inc. Methods of making multi-layer light emitting devices
US7262550B2 (en) * 2003-04-15 2007-08-28 Luminus Devices, Inc. Light emitting diode utilizing a physical pattern
CN100356592C (zh) * 2004-01-06 2007-12-19 元砷光电科技股份有限公司 发光二极管及其制造方法
US20050161696A1 (en) * 2004-01-28 2005-07-28 Matsushita Electric Industrial Co., Ltd. Semiconductor light-emitting device and method for fabricating the same
US7509012B2 (en) 2004-09-22 2009-03-24 Luxtaltek Corporation Light emitting diode structures
US7170100B2 (en) 2005-01-21 2007-01-30 Luminus Devices, Inc. Packaging designs for LEDs
US20070082418A1 (en) * 2005-10-11 2007-04-12 National Chung-Hsing University Method for manufacturing a light emitting device and light emitting device made therefrom
KR100640497B1 (ko) 2005-11-24 2006-11-01 삼성전기주식회사 수직 구조 질화갈륨계 발광다이오드 소자
US20070212813A1 (en) * 2006-03-10 2007-09-13 Fay Owen R Perforated embedded plane package and method
US7535646B2 (en) * 2006-11-17 2009-05-19 Eastman Kodak Company Light emitting device with microlens array
US8390008B2 (en) * 2008-05-29 2013-03-05 Global Oled Technology Llc LED device structure to improve light output
DE102008045028B4 (de) 2008-08-29 2023-03-16 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Optoelektronischer Halbleiterchip

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2010022694A1 *

Also Published As

Publication number Publication date
KR20110056386A (ko) 2011-05-27
DE102008045028A1 (de) 2010-03-04
CN102138229A (zh) 2011-07-27
TW201023406A (en) 2010-06-16
WO2010022694A1 (fr) 2010-03-04
TWI427826B (zh) 2014-02-21
DE102008045028B4 (de) 2023-03-16
US20110297982A1 (en) 2011-12-08
CN102138229B (zh) 2015-11-25

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