EP2237253A1 - Circuit de pixels, affichage l'utilisant et son procédé de commande - Google Patents

Circuit de pixels, affichage l'utilisant et son procédé de commande Download PDF

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Publication number
EP2237253A1
EP2237253A1 EP09157123A EP09157123A EP2237253A1 EP 2237253 A1 EP2237253 A1 EP 2237253A1 EP 09157123 A EP09157123 A EP 09157123A EP 09157123 A EP09157123 A EP 09157123A EP 2237253 A1 EP2237253 A1 EP 2237253A1
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Prior art keywords
terminal
tft
threshold voltage
driving transistor
voltage
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EP09157123A
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German (de)
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EP2237253B1 (fr
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Stylianos Siskos
Ilias Pappas
Charalampos Dimitriadis
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DIMITRIADIS, CHARALAMPOS
PAPPAS, IIIAS
Siskos Stylianos
Aristotle University of Thessaloniki ELKE Research Committee
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Aristotle University of Thessaloniki
Aristotle University of Thessaloniki ELKE Research Committee
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0833—Several active elements per pixel in active matrix panels forming a linear amplifier or follower
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0871—Several active elements per pixel in active matrix panels with level shifting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing

Definitions

  • the present invention is related to the structure and the driving method of a pixel circuit of a display and in particular to driving the pixel circuit and method compensating the threshold voltage variations of driving transistor thereof.
  • CRTs cathode ray tubes
  • FPDs Flat Panel Displays
  • AMOLED Active Matrix Organic Light Emitting Diode
  • LCD Liquid Crystal Displays
  • AMOLED displays offer many advantages over Liquid Crystal Displays (LCD), such as self-emitting nature, fast response time, light weight, wide viewing angle and thinner devices.
  • AMOLED displays have been implemented with amorphous silicon (a-Si), polycrystalline silicon, organic or other driving backplane.
  • poly-Si TFTs polysilicon thin-film transistors
  • a-Si or organic TFTs even with lower mobility, are cost effective solutions.
  • TFTs operation can be divided into three working modes: cut-off, linear and saturation modes.
  • Id_sat ⁇ C ox ⁇ WV eff 2 / 2 ⁇ L , when V eff ⁇ V ds
  • ⁇ is the effective surface mobility of the carriers
  • C ox is the gate oxide capacitance per unit area
  • W is the effective gate mask width
  • L is the effective gate mask length
  • V eff is the effective gate voltage, equal to the difference between the gate to source voltage V gs and the transistor threshold voltage V thn
  • V eff V gs -V thn
  • Id_off is the drain current when the TFT is operating in the cut-off mode
  • Id_linear is the drain current when the TFT is operating in the linear mode
  • Id_sat is the drain current when the TFT is operating in the saturation mode.
  • the above expressions indicate the important role of the threshold voltage in TFT operation.
  • the threshold voltage is determined by the gate and insulator materials, the gate oxide material thickness and the channel doping concentration.
  • the major TFT disadvantage is the threshold voltage variation from device to device due to the channel material structure and fabrication process.
  • the amorphous silicon film is turned to polysilicon film by excimer laser annealing. Annealing process generates grain boundaries (GB) along the TFT channel.
  • GB grain boundaries
  • Threshold voltage variation impacts the TFT drain current, since the drain current is a second order function of threshold voltage when the TFT operates in saturation mode and the TFT operation point shifts from the desired position. This means that the output drain current can not be well-controlled.
  • the pixels using such TFT drivers will have irregular display uniformity (mura) due to threshold voltage variation, because driving TFTs supplied with the same data signal will produce different driving current and different OLED luminance. Similar is the behavior of amorphous and organic or other types of TFTs.
  • threshold voltage variation Apart from the threshold voltage variation, mobility variations are also observed in TFT large area electronics. However, the variation in transistor threshold voltage affects the device performance more seriously than the mobility variation in AMOLED driver circuits, as confirmed with measurements by V. Vaidya et al., "Comparison of pentacene and amorphous silicon AMOLED display driver circuits", IEEE Transactions on Circuits and Systems-I: Regular papers, Vol. 55, NO. 5, June 2008 . Therefore, the threshold voltage shift poses a design constrain for the AMOLED backplanes.
  • FIG. 1 shows the configuration of a conventional 2T1C AMOLED pixel 100.
  • AMOLED panel is an array including a plurality of pixels, scan lines and data lines, as well as power supply VDD and VEE as shown in FIG. 2 .
  • Scan lines voltages are provided from external row driving circuits and data lines voltages are provided by column driving circuits.
  • the pixels each one including an organic light emitting diode (OLED) or other electroluminescent device as the light emitting device of the pixel, emits light when a certain amount of current pass through it, are coupled to power supply voltages VDD and VEE, and to external driving circuits via corresponding Scan lines and Data lines.
  • OLED organic light emitting diode
  • each pixel includes two TFTs and a storage capacitor as shown in FIG.1 .
  • the first TFT 102 is a switch, where the gate and drain/source electrodes are coupled to the Scan Line signal 12 and the Data Line signal 14, respectively.
  • the second TFT 104 is the driving TFT, where the gate electrode is coupled to the switch TFT 102 source/drain path and the source electrode to the power supply voltage VDD.
  • the storage capacitor C s 106 is coupled between the gate of the driving TFT 104 and the power supply voltage VDD, which keeps the gate voltage of the driving TFT 104 constant until the next frame period.
  • the OLED 108 is coupled between the drain of the driving TFT 104 and the power supply voltage VEE.
  • FIG. 2 illustrates the pixels array architecture for an AMOLED display.
  • the programming of the pixels array is made by row - at-a time, meaning that refreshing of the pixels configuration is implemented row by row and it is controlled by two external generated signals; a scan signal is generated from row driving circuits and data signal is generated from column driving circuits.
  • the programming procedure includes the steps: First, the scan voltage from the scan line 12 turns "ON" the switch TFT 102. Then, the data signal is delivered via the turned-on switch TFT 102 to the driving TFT 104 gate node and the storage capacitor 106, producing a corresponding to the data signal driving current from the driving TFT 104 to the OLED 108, causing OLED to illuminate in response to the driving current.
  • V ref is a reference or data voltage
  • an additional circuit block coupled to the gate node of the driving TFT was required for producing and adding the threshold voltage to the gate node.
  • the additional circuit part with the control signals is a dynamic component affecting the column and row drivers' architecture of the AMOLED, since complex signaling is needed. Also, more than one capacitors will be included increasing the real silicon area and the response time. Therefore, the prior work pixels and methods for suppressing the threshold voltage variations have many design difficulties, leading to limited applications and performance.
  • the present invention discloses a pixel circuit, an image display using the same and a driving method thereof, which presents advantages compared to the existing ones for suppressing the threshold voltage variation of thin film transistors and producing a stable threshold - independent current in the pixel.
  • the pixel circuit according to the present invention comprises:
  • the said threshold voltage cancellation circuit comprises :
  • the said opposite sign threshold voltage value extractor means comprises an extractor transistor means, providing at its output a voltage value, with the difference between said value and the opposite sign value of said threshold voltage of the driving transistor means being a constant, and the said buffer means having its input terminal coupled to the source output terminal of said extractor transistor means.
  • the said extractor transistor means has the same electrical characteristics than the driving transistor means, with its gate and drain terminals being electrically coupled to said second power supply voltage line means and its source terminal being fed by a bias current.
  • the said buffer means comprises a buffer transistor means having the gate terminal coupled to the drain terminal of an input transistor means and the source terminal coupled to said first power supply voltage line means of the pixel circuit, said input transistor means having the gate terminal coupled to the output terminal of the opposite sign threshold voltage value extractor means, the drain terminal coupled to a first bias current and the source terminal coupled to the drain terminal of said buffer transistor means.
  • said switching transistor means is either p-channel or n-channel and all other transistors means are of the same type, either p-channel or n-channel, thin film transistors (TFT).
  • said transistor means are selected from a list consisting of a polycrystalline silicon TFT, an amorphous silicon TFT, a nanocrystalline silicon TFT, an organic TFT and an oxide (transparent) TFT.
  • the present invention also proposes an image display comprising a scan driver means which is arranged for driving a plurality of scan lines means, a data driver means which is arranged for driving a plurality of data lines means, both said scan lines means and data lines means having intersections, and the pixel circuits arranged at said intersections.
  • the present invention proposes a method for driving a light emitting means of a pixel circuit of an image display, the pixel circuit including:
  • the said potential voltage value is equal to said opposite sign value of the threshold voltage of the driving transistor means.
  • the threshold voltage variation cancellation circuit is continuously in a conducting state.
  • the loading of the capacitor means comprises fully turning on the switching transistor means and wherein the applying of the voltage to the driving transistor means by the capacitor means comprises fully turning off the switching transistor means.
  • said switching transistor means is either p-channel or n-channel and all the rest transistors means are of the same type, either p-channel or n-channel, thin film transistors (TFT), and the TFT is one of a polycrystalline silicon TFT, an amorphous silicon TFT, a nanocrystalline silicon TFT, an organic TFT and an oxide (transparent) TFT.
  • TFT thin film transistors
  • Fig. 1 shows the prior art pixel driving circuit.
  • Fig. 2 shows the prior work AMOLED architecture
  • Fig. 3 shows the block diagram of the pixel circuit of an embodiment of the invention
  • Fig. 4 shows the p-type implementation of the pixel circuit according to an embodiment of the invention
  • Fig. 5 shows the n-type implementation of the pixel circuit according to an embodiment of the invention
  • Fig. 6 shows the "threshold voltage variation cancellation circuit" block diagram according to an embodiment of the invention
  • Fig. 7 shows the p-type implementation of the opposite sign threshold voltage value extractor
  • Fig. 8 shows the n-type implementation of the opposite sign threshold voltage value extractor
  • Fig. 9 shows the p-type implementation of the buffer implemented by a Flipped Voltage Follower circuit
  • Fig. 10 shows the n-type implementation of the buffer implemented by a Flipped Voltage Follower circuit
  • Fig. 11 shows the complete p-type implementation pixel circuit according to an embodiment of the invention
  • Fig. 12 shows the complete n-type implementation pixel driving circuit according to an embodiment of the invention
  • Fig. 13 shows an active matrix display architecture using the proposed pixel circuit for p-type (n-type) implementation with I bias1 and I bias2 (I bias11 and I bias22 ) bias currents.
  • the main disadvantage of the TFT technology is the variation of the threshold voltage from device to device, even if the devices are implemented on the same wafer. Therefore, the produced drain current is not well-controlled and the analog circuit design is a very difficult task.
  • the common method used for the design of analog circuits is to increase the TFT gate voltage by one threshold voltage and the produced drain current would be threshold voltage independent.
  • Id_satn ⁇ ⁇ C ox ⁇ W ⁇ V eff 2 / 2 ⁇ L
  • V thn is the TFT threshold voltage
  • V ref is the reference or data voltage
  • ⁇ is the mobility of the carriers
  • C ox is the gate capacitance of the TFT
  • W and L are the width and length of the TFT respectively.
  • Embodiments of the invention are related to a pixel circuit, an image display using the pixel, and a driving method for the pixel, and more particularly, the present invention is related to a pixel circuit, a display using the pixel, and a driving method for the light emitting element of the pixel, in which compensation is made for variation in the threshold voltage (V th ) of a drive transistor.
  • V th threshold voltage
  • the invention might be discussed in the context of a general light emitting device (EL device), and for simplicity it will be considered an organic light emitting diode (OLED) as a light emitting device.
  • EL device general light emitting device
  • OLED organic light emitting diode
  • FIG. 3 illustrates a pixel circuit according to an embodiment of the invention.
  • Pixel circuit 200 compensates the threshold voltage variations of the driving transistor 202, so that the drain current feeding the OLED 206 is stable and insensitive to the threshold voltage variations.
  • Pixel circuit 200 comprises a switch transistor 210, a driving TFT 202, a threshold voltage variations cancellation circuit 20 and an OLED 206.
  • the first terminal of the switch TFT 210 is coupled to the Data Line 14, the second terminal is coupled to the gate electrode of the driving TFT 202 and the third terminal, (its gate), is coupled to the Scan Line 12.
  • the source electrode of the driving TFT 202 is coupled to the first terminal (the output) of the threshold voltage variation cancellation circuit 20 and the drain electrode of the driving TFT 202 is coupled to the first terminal of the OLED 206.
  • the second terminal of the threshold voltage variation cancellation circuit 20 is coupled to a first external power supply, Power Supply 1.
  • the second terminal of the OLED 206 is coupled to a second external power supply, Power Supply 2.
  • the pixel comprises also a storage capacitor 204, with the first terminal coupled to the gate of the driving TFT 202 and the second terminal coupled to the higher external power supply, V supply-high , which can be either Power Supply 1 or Power Supply 2.
  • Fig. 4 illustrates a p-type implementation of the pixel circuit 200, where all thin film transistors (TFTs) used for the driving circuit are p-channel TFTs according to an embodiment of the invention.
  • the first terminal of the switch TFT 4210 is coupled to the Data Line 14, the second terminal is coupled to the gate of the driving TFT 4202 and the third terminal, (its gate), is coupled to the Scan Line 12.
  • the driving TFT 4202 can include a p-type TFT with the gate electrode coupled to the second terminal of the switch TFT 4210, the source electrode coupled to the threshold voltage variation cancellation circuit 20 and the drain electrode to a first terminal of the OLED 4206.
  • the second terminal of the threshold voltage variation cancellation circuit 20 is coupled to Power Supply 1.
  • the pixel circuit also, includes a storage capacitor 4204 with the first terminal coupled to the gate electrode of the driving TFT and the second terminal coupled to the Power Supply 1, which corresponds to the higher power line for the p-channel implementation.
  • the first terminal of the OLED 4206 is coupled to the drain of the driving TFT 4202 and the second terminal of the OLED is coupled to the Power Supply 2, which in this p-type implementation can be the lower power supply or ground.
  • OLED 4206 illuminates in response to the current flowing through it.
  • switch TFT 4210 When the Scan Voltage (V scan ) from the Scan line 12 is pulled low, switch TFT 4210 is turned “ON” and the Data Voltage (V data ) from the Data line 14 is being transferred through switch TFT 4210 in the pixel and which in turn is stored in the storage capacitor 4204.
  • the Scan Voltage is pulled low and the switch TFT 4210 is turned “OFF”.
  • the Data Voltage is then applied to the gate node of the driving TFT 4202.
  • the storage capacitor 4204 ensures that the gate voltage of the driving TFT 4202 is kept constant during a frame time.
  • Id_satp ⁇ ⁇ C ox ⁇ W ⁇ V s - V data - V thp 2 / 2 ⁇ L
  • V thp is the threshold voltage of the p-channel TFT 4202
  • V s is the voltage of the source node of the driving TFT 4202.
  • the above expression shows that the current flowing through the OLED device 4206 is independent of the driving TFT threshold voltage, considering that the threshold voltage variation cancellation circuit 20 provides at its output a threshold voltage equal to the threshold voltage of the driving TFT 4202.
  • Fig. 5 illustrates an n-type implementation of the pixel driving circuit and the OLED, where all transistors used for the driving circuit are n-channel TFTs according to an embodiment of the invention.
  • Switch TFT 5210 and driving TFT 5202 can include n-type TFTs.
  • the first terminal of the switch TFT 5210 is coupled to the Data Line 14, the second terminal is coupled to the gate of the driving TFT 5202 and the third terminal (gate) is coupled to the Scan Line 12.
  • the driving TFT 5202 has a gate electrode coupled to the second terminal of the switch TFT 5210, a source electrode coupled to the first terminal (output) of the threshold voltage variation cancellation circuit 20 and the drain electrode coupled to the first terminal of the OLED 5206.
  • the pixel circuit also, includes a storage capacitor 5204 with the first terminal coupled to the gate electrode of the driving TFT and the second terminal coupled to the Power Supply 2, which corresponds to the higher power supply, for the n-type implementation.
  • the first terminal of the OLED 5206 is coupled to the drain of the driving TFT 5202 and the second terminal of the OLED 5206 is coupled to the Power Supply 2.
  • the second terminal of the threshold voltage variation cancellation circuit 20 is coupled to Power Supply 1, which in this n-type implementation can be the lower power supply or ground. OLED 5206 illuminate in response to the current flowing through it.
  • the switch TFT 5210 When the scan voltage from the Scan Line 12 is pulled high, the switch TFT 5210 is turned “ON" and the data voltage V data from the Data Line 14 is stored to the storage capacitor 5204.
  • the storage capacitor 5204 ensures that the gate voltage of the driving TFT 5202 is kept constant during a frame time.
  • the above expression shows that the current flowing through the OLED device 5206 is a function of the Data Voltage (V data ) and a constant voltage (V ct1 ) which both are independent of the driving TFT threshold voltage.
  • Fig. 6 shows the block diagram of the threshold voltage variation cancellation circuit 20, having two terminals, the first one 170 being connecting at the power supply 1 either positive or negative/ground the second one 70 being its output.
  • This circuit may include an opposite sign threshold voltage extractor 40 and a buffer 30 with high source or sinking current capability depending on the specifications of the used light emitting device.
  • the opposite sign threshold voltage extractor 40 feeds the buffer 30 with a voltage equal to the threshold voltage of opposite sign, which is considered to be equal to the threshold voltage of the driving transistor 202.
  • a linear function of the threshold voltage of opposite sign is obtained.
  • FIG. 7 shows the p-type implementation of the opposite sign threshold voltage extractor 40.
  • An opposite sign threshold voltage extractor may include a p-channel TFT 742.
  • TFT 742 is diode-connected, which means that the gate and drain nodes are coupled together to the power supply 2 line, which in case of p-type implementation corresponds to the ground line. Since TFT 742 is diode-connected, it is working in the saturation mode.
  • the TFT 742 source electrode is coupled to a bias current I bias1 750.
  • the bias current I bias1 750 has a small value and the TFT's operation point will be close to the limit of the saturation mode.
  • the voltage at the source electrode 760 of the TFT 742 will be equal to the opposite sign value of the threshold voltage of the TFT 742.
  • transistors TFT 742 and the driving TFT 4202 have equal threshold voltages, since they are very closely located on the same wafer, the voltage at the source electrode 760 of the TFT 742 is equal to the opposite sign value of the driving TFT 4202 threshold voltage.
  • Fig. 8 shows the n-type implementation of the opposite sign threshold voltage extractor 40.
  • transistors TFT 842 and the driving TFT 5202 have equal threshold voltages, since they are very closely located on the same wafer, the voltage at the source electrode 860 of the TFT 842 is equal to a the difference between a constant voltage and the opposite sign value of the driving TFT 5202 threshold voltage.
  • Fig. 9 shows an example of the p-type implementation of a buffer.
  • the buffer 30 is called "flipped voltage follower" and it is based on the common source amplifier.
  • the buffer 30 includes a p-channel input TFT 932, which is connected as a common source amplifier.
  • the gate electrode of the input TFT 932 is connected to the output electrode 760 of the opposite sign threshold voltage extractor TFT 742, when p-channel transistor is used as shown in fig. 7 .
  • transistors TFT 742 and the driving TFT 4202 have equal threshold voltages, since they are closely located on the same wafer, the input voltage of the buffer 30 is equal to the opposite sign value of the driving TFT 4202 threshold voltage.
  • the drain electrode of TFT 932 is coupled to a dc bias current I bias2 980. This means that the current flowing through the input transistor TFT 932 of the buffer is kept constant and the voltage gain is unity.
  • the buffer 30 could be described as a voltage follower with shunt feedback.
  • the buffer also includes a p-channel TFT 934 with the gate electrode coupled to the drain electrode of input TFT 932, the drain electrode coupled to the source electrode of TFT 932 and the source electrode coupled to Power Supply 1, which is the higher power supply and it has a value equal to V DD .
  • the buffer 30 is able to source a large amount of current. The large sourcing capability is due to the low impedance at the source electrode of the input TFT 932.
  • the output current I OLED of the buffer 30 is equal to the drain current Id_sat of the driving TFT 4202.
  • the current of the TFT 934 is equal to the sum of the Id_sat current and the bias current I bias2 980. TFT 934 could either working in the saturation mode or in the linear mode without affecting the functionality of the buffer 30.
  • Fig. 10 shows an example of the n-type implementation of the buffer, ("flipped voltage follower").
  • the buffer includes an n-type TFT 1032 with the voltage at the gate electrode equal to the voltage at the output electrode 860 of the opposite sign threshold voltage extractor.
  • the drain electrode of the TFT 1032 is coupled to a dc bias current I bias22 1080. This means that the current flowing through TFT 1032 is kept constant and the voltage gain is unity.
  • the buffer 30 could be described as a voltage follower with shunt feedback.
  • the buffer also includes an n-channel TFT 1034 with the gate electrode coupled to the drain electrode of TFT 1032, the drain electrode coupled to the source electrode of TFT 1032 and the source electrode coupled to Power Supply 1, which is the lower power supply having a value equal to V EE or ground.
  • TFT 1032 is connected as a common source follower with constant drain current, since TFT 32 is coupled to a dc bias current I bias22 1080. Therefore, the gain of the buffer is unity. In this case where n-channel TFTs are used, the buffer is able to sink an amount of current, but the sinking capability is restricted from the bias current I bias22 1080.
  • the bias current I bias22 is equal to the sum of the Id_sat (or I OLED ) plus the drain current I EE of TFT 1034.
  • Fig. 11 shows the complete p-type implementation of the pixel circuit 200.
  • all transistors are p-channel thin film transistors
  • Power Supply 1 is the higher supply voltage designated here as V DD
  • Power Supply 2 is the ground line.
  • the first terminal of the switch TFT 11210 is coupled to the Data Line 14, the second terminal is coupled to the gate of the driving TFT 11202 and the third terminal (gate) is coupled to the Scan Line 12.
  • the source electrode of the driving TFT 11202 is coupled to the first terminal (output) 1170 of the threshold voltage variations cancellation circuit and the drain electrode of the driving TFT 11202 is coupled to the first terminal of the OLED 11206.
  • the second terminal of the OLED 11206 is coupled to the ground line.
  • the first terminal of the storage capacitor 11204 is coupled to the gate of the driving TFT 11202 and its second terminal is coupled to the higher external power supply V DD .
  • the storage capacitor 11204 ensures that the gate voltage of the driving TFT 11202 is kept constant during a frame time.
  • the drain electrode of TFT 1132 is coupled to a dc bias current I bias2 1180.
  • the gate electrode of TFT 1132 is coupled to node 1160, which is the source electrode of TFT 1142.
  • the gate electrode of TFT 1134 is coupled to the drain electrode of TFT 1132, the drain electrode is coupled to the source electrode of TFT 1132 and the source electrode coupled to the higher power supply voltage V DD .
  • TFT 1142 has the drain and gate electrodes coupled to the ground line and the source electrode coupled to the bias current I bias1 1150.
  • the threshold voltage extractor TFT 1142 provides at its output node 1160 a voltage value equal to the opposite sign of the threshold voltage,
  • This voltage which is the input voltage of the buffer, feeds the buffer consisting of the transistors TFT 1132 and TFT 1134.
  • a voltage is produced, which is equal to the sum of a constant voltage and the opposite sign of the threshold voltage value
  • , V s V ct +
  • Node 1170 is coupled to the source electrode of the driving transistor 11202.
  • a scan signal is applied to the gate of the switching TFT 11210, a data voltage V data is charging the capacitor 11204.
  • the above expression shows that the current flowing through the OLED device 11206 is independent from the driving TFT threshold voltage and the brightness of the OLED device will be well - controlled.
  • the anode of the OLED is driven and the cathode is coupled to the ground line.
  • Fig. 12 shows the complete n-type implementation of the pixel circuit 200.
  • all transistors are n-channel thin film transistors
  • the Power Supply 2 is the higher supply voltage designated here as V DD , where as the lower supply voltage Power Supply 1 is the ground line.
  • the first terminal of the switch TFT 12210 is coupled to the Data Line 14, its second terminal is coupled to the gate electrode of the driving TFT 12202 and the third terminal (its gate) with Scan Line 12.
  • the source electrode of the driving TFT 12202 is coupled to the first terminal (output) 1270 of the threshold voltage variations cancellation circuit and the drain electrode of the driving TFT 12202 is coupled to the first terminal of the OLED 12206.
  • the second terminal of the OLED 12206 is grounded.
  • the first terminal of the storage capacitor 12204 is coupled to the gate electrode of the driving TFT 12202 and the second terminal is coupled to the higher external power supply V DD .
  • the storage capacitor 12204 ensures that the gate voltage of the driving TFT 12202 is kept constant during a frame time.
  • the drain electrode of TFT 1232 is coupled to a dc bias current I bias22 1280.
  • the gate electrode of TFT 1232 is coupled to node 1260, which is the source electrode of TFT 1242.
  • the gate electrode of TFT 1234 is coupled to the drain electrode of TFT 1232, its drain electrode is coupled to the source electrode of TFT 1232 and its source electrode is coupled to the ground line.
  • TFT 1242 has the drain and gate electrodes grounded and its source electrode coupled to the bias current I bias11 1250.
  • the threshold voltage extractor TFT 1242 provides at its output node 1260 a voltage value equal to the difference between V DD and the threshold voltage (which is proportional to the opposite sign of the threshold voltage) V thn of TFT 1242.
  • This voltage which is the input voltage of the buffer, feeds the buffer consisting of the transistors TFT 1232 and TFT 1234.
  • V s1 V ct1 +
  • Node 1270 is coupled to the source electrode of the driving transistor 12202.
  • a scan signal is applied to the gate of switching TFT 12210 a data voltage V data is charging the capacitor 12204.
  • the above expression shows that the current that flows through OLED device 12206 is independent of the driving TFT threshold voltage, considering that TFT 1242 of the threshold voltage extractor circuit has similar electrical characteristics with those of the driving TFT 12202.
  • the cathode of the OLED is driven and its anode is coupled to V DD .
  • Fig. 13 shows the AMOLED display architecture using the proposed pixel circuit 200.
  • This architecture has the same simple structure with the basic AMOLED display architecture of the prior work shown in FIG. 2 , in terms of scan lines, data lines and power supplies. It is noted that the proposed pixel circuit requires two additional lines for the dc bias currents; first one for the opposite sign threshold voltage extractor and another one for the buffer.
  • the pixel circuit of the present invention offers several advantages that are worth noting, considering an AMOLED image display:

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
EP09157123.2A 2009-04-01 2009-04-01 Circuit de pixels, appareil d'affichage l'utilisant et son procédé de commande Active EP2237253B1 (fr)

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WO2015096387A1 (fr) * 2013-12-26 2015-07-02 京东方科技集团股份有限公司 Circuit et procédé d'excitation de grille, circuit à grille sur réseau et appareil d'affichage
WO2016141680A1 (fr) * 2015-03-11 2016-09-15 京东方科技集团股份有限公司 Circuit de compensation de pixels, dispositif d'affichage et procédé de commande
WO2016145692A1 (fr) * 2015-03-16 2016-09-22 深圳市华星光电技术有限公司 Circuit de commande de pixels amoled et procédé de commande de pixels
US9536476B2 (en) 2013-12-24 2017-01-03 Boe Technology Group Co., Ltd. Gate driver circuit, gate driving method, gate-on-array circuit, display device, and electronic product
US9620061B2 (en) 2013-12-30 2017-04-11 Boe Technology Group Co., Ltd. Gate driver circuit, gate driving method, gate-on-array circuit, display device, and electronic product
CN107274828A (zh) * 2017-06-09 2017-10-20 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
CN115568288A (zh) * 2021-04-30 2023-01-03 戴洛格半导体（英国）有限公司 电流驱动器

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9536476B2 (en) 2013-12-24 2017-01-03 Boe Technology Group Co., Ltd. Gate driver circuit, gate driving method, gate-on-array circuit, display device, and electronic product
WO2015096387A1 (fr) * 2013-12-26 2015-07-02 京东方科技集团股份有限公司 Circuit et procédé d'excitation de grille, circuit à grille sur réseau et appareil d'affichage
US9514683B2 (en) 2013-12-26 2016-12-06 Boe Technology Group Co., Ltd. Gate driving circuit, gate driving method, gate on array (GOA) circuit and display device
US9620061B2 (en) 2013-12-30 2017-04-11 Boe Technology Group Co., Ltd. Gate driver circuit, gate driving method, gate-on-array circuit, display device, and electronic product
WO2016141680A1 (fr) * 2015-03-11 2016-09-15 京东方科技集团股份有限公司 Circuit de compensation de pixels, dispositif d'affichage et procédé de commande
US9805661B2 (en) 2015-03-11 2017-10-31 Boe Technology Group Co., Ltd. Pixel compensation circuit, display device and driving method
WO2016145692A1 (fr) * 2015-03-16 2016-09-22 深圳市华星光电技术有限公司 Circuit de commande de pixels amoled et procédé de commande de pixels
CN107274828A (zh) * 2017-06-09 2017-10-20 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
CN115568288A (zh) * 2021-04-30 2023-01-03 戴洛格半导体（英国）有限公司 电流驱动器
CN115568288B (zh) * 2021-04-30 2023-10-31 瑞萨设计(英国)有限公司 电流驱动器

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