EP2196887A1 - Device for driving a load - Google Patents

Device for driving a load Download PDF

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Publication number
EP2196887A1
EP2196887A1 EP08170710A EP08170710A EP2196887A1 EP 2196887 A1 EP2196887 A1 EP 2196887A1 EP 08170710 A EP08170710 A EP 08170710A EP 08170710 A EP08170710 A EP 08170710A EP 2196887 A1 EP2196887 A1 EP 2196887A1
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Prior art keywords
transistor
drive
transistors
control
value
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EP08170710A
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German (de)
French (fr)
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EP2196887B1 (en
Inventor
Christian Feucht
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Elmos Semiconductor SE
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Elmos Semiconductor SE
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/59—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load

Definitions

  • the invention relates to a device for driving a load with at least two parallel-connected driver transistors.
  • the object of the invention is to provide a device for driving a load, in which the drive current is distributed symmetrically in a simple manner in a control manner to a plurality of parallel branches with semiconductor switches and measures for preventing destruction as a result of flowing in one of the branches , are hit to high currents.
  • a key feature of the invention is the cyclic sequential connection of the driver transistors of the parallel circuit, so that the average power loss in all transistors is substantially equal.
  • the activation and deactivation of the control of the transistors is controlled by their drive units of a higher-level control device, in such a way that the transistors are driven individually in a predetermined order in time.
  • This measure is initially taken once when the parallel circuit has only two transistors. Even with three or more transistors, these can be switched on individually sequentially and cyclically. How the activation and deactivation of the transistors takes place is of minor importance for the invention. For example, it would also be conceivable to have an ON / OFF switch in series with each transistor is switched, in which case the controller acts on these switches to enable the supply of the load with current through the individual transistors sequentially and cyclically.
  • connection of the next transistor to be driven and the deactivation of the currently driven transistor is advantageously carried out by a controlled change of the drive signals for these two transistors, which is done either directly by the control device or indirectly via the drive units of the transistors.
  • Load drivers are generally part of a control circuit for controlling the load current to a predetermined setpoint, with this control loop can be superimposed on other control loops.
  • the drive units of the transistors thus have regulators or else the drive units of the transistors are preceded by a common regulator. In the latter case, therefore, the controller output signal is supplied cyclically and sequentially to the individual transistors, wherein in the transition phases of two drive intervals for different transistors in turn leads to the temporary simultaneous control of two transistors.
  • each drive unit of a transistor is provided with a regulator at the input of which the differential signal from the setpoint for the load current and the actual value of the load current is applied and at whose output the drive signal for the respective transistor for controlling the actual value of the load current is output to the setpoint.
  • the controller of the drive unit of the currently driven transistor the difference signal supplied.
  • the regulators of the drive units of the other transistors are, for example, inactive.
  • one of the transistors or a group of transistors is switched from one transistor to the other transistor, its last activation signal is expediently stored before the deactivation of a transistor in order to activate this transistor during the next activation in turn to control with the stored drive signal.
  • each regulator of the drive units is supplied with a constant first default value for zeroing the drive signal to zero in order to reduce the drive signal instead of the setpoint for the load current or the differential signal, and to increase the drive signal to supply the drive signal to a constant second preset value close to the actual value of the load current.
  • the second default value is supplied, wherein the controller of the drive unit of the next transistor to be driven thereafter instead of the second default value, the difference signal can be supplied as soon as the drive signal for the currently drivable transistor has dropped by a predetermined value.
  • the difference value is cyclic and sequential to the Controller of control units of transistors of parallel connection "overlaid".
  • the above-described controlled reduction and increase of the drive signals in the transition phase between the final deactivation / deactivation of the one transistor and switching on / activating the next transistor can also be effected by influencing these drive signals behind the regulators, without different signals being applied at the input of the regulators.
  • Fig. 1 1 shows an exemplary embodiment of a voltage regulator 10 with two driver transistors T1 and T2 connected in parallel, which are regulated in such a way that the average power losses in both transistors are substantially the same.
  • the voltage regulator 10 is used in this embodiment, the regulation of a fan motor 12, the actual motor voltage is represented by a signal at the output of a measuring element 14.
  • the difference signal from the actual value and setpoint value is fed to the input of a driver stage 16 which has the two transistors T1 and T2 connected in parallel.
  • the uniform distribution of the power loss to the two transistors T1 and T2 is achieved by alternately conducting only one of the two transistors T1, T2 at a time. For the same duration of the respective phases (drive intervals), in which the respective transistor T1, T2 conducts, the average power loss is thus equally divided between the two transistors T1, T2.
  • the driver stage 16 thus has the two (power) transistors T1, T2, which are each driven in this embodiment by a variable gain amplifier A1 or A2 as the drive unit 18,20.
  • the outputs of the control amplifiers A1, A2 are each connected to a sampling comparator K1, K2, which determines whether the output voltage, that is, the output signal of the control amplifiers A1, A2 has dropped from the value at a sampling instant by an amount supplied as a reference value.
  • each Abtastkomparator in addition to the actual comparator on a sample / hold member.
  • MUX1 for controlling the Abtastkomparatoren, for evaluating the signals of the Abtastkomparatoren K1, K2 and for switching the multiplexer MUX1, MUX2 is a control device 22nd
  • the method described below can be used, which controls the transistors such that at any time the motor voltage (and thus the motor current) is controlled exactly to the desired value.
  • control deviation A1 is applied to the control amplifier A1 via the multiplexer MUX1.
  • the control amplifier A2 receives via the multiplexer MUX2 a negative constant, so that the output voltage according to the integrating characteristic of the control amplifier drops until the output of the lowest value of the control range (for example, 0 V) is applied.
  • Fig. 2 shows that in phase 1, the transistor T1 is turned on and the transistor T2 is turned off.
  • phase 1 therefore, the motor voltage is regulated by the control amplifier A1 and the associated power transistor T1, while the transistor T2 (after a transition phase to be described below) no longer conducts electricity.
  • the driver stage 16 remains in phase 1 for a predefinable period of time; towards the end of this period, the sampling comparator K1, controlled by the control device 22, samples the output signal of the control amplifier A1 and then the system switches to phase 2.
  • the control amplifier A2 now receives a positive constant via the multiplexer MUX2, so that the output voltage at the control amplifier A2 increases as a result of the integrating characteristic of the control amplifier A2.
  • the transistor T2 begins to conduct a current. This current adds to the current of the transistor T1 whose current is reduced, so that the total current (load current) through the motor 12 remains constant.
  • the associated reduction in the drive voltage of the control amplifier A1 is detected by the Abtastkomparator K1 at the end of phase 2, whereupon the driver stage 16 switches to phase 3.
  • phase 3 now receives the control amplifier A2 via the multiplexer MUX2 (by appropriate control by the controller 22) the control deviation.
  • the control amplifier A1 now receives the negative constant, likewise controlled by the control device 22 via its multiplexer MUX1, so that the output voltage at the control amplifier A1 drops as a result of the integrating characteristic of the control amplifier until the output of the control amplifier finally reaches the lowest value of the control range (for example 0V ) pending.
  • the motor voltage is thus regulated by the control amplifier A2 and the associated power transistor T2, while the transistor T1 no longer conducts electricity after the transition phase described above.
  • the system remains in phase 3 for a period of time T until the sample comparator K2, under control of the controller 22, samples the output of the variable gain amplifier A2 and switches the driver stage 16 to phase 4.
  • the control amplifier A1 now receives a positive constant via the multiplexer MUX1 (again controlled by the control device 22), so that the output voltage at the control amplifier increases as a result of the integrating behavior of the control amplifier.
  • an increasing current flows in the transistor T1, which adds to the current through the transistor T2, whereby the current through the motor to be controlled 12 increases.
  • this control amplifier A2 controls the transistor T2 to reduce its load current, so that the total current remains constant.
  • the drive voltage for the transistor T2 thus decreases, which is detected by the Abtastkomparator K2 at the end of the phase 4, whereupon the driver stage 16 again switches to the phase 1 described above.
  • the circuit described above is expandable to n voltage control loops, i. on more than two parallel-connected transistors with associated control amplifiers.
  • the concept according to the invention can also be realized as a digital circuit.
  • the actual voltage in this example, motor voltage
  • the multiplexer and the comparators are digitally implemented and the transistors are controlled by digital-to-analog converters.
  • the sampling comparators can also be replaced by a common comparator with input multiplexer.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
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Abstract

The load driving device has two control units (A1,A2) for generating control signals for controlling transistors (T1,T2). Each transistor is assigned a control unit (18,20). A control device (22) is provided for sequential release of the control of the transistors by the control unit. The control unit is assigned to the controlled transistor for similar length of control interval within a cycle.

Description

Die Erfindung betrifft eine Vorrichtung zum Treiben einer Last mit mindestens zwei parallel geschalteten Treibertransistoren.The invention relates to a device for driving a load with at least two parallel-connected driver transistors.

Bei einer Vielzahl von Anwendungsfällen ist es üblich, den Strom durch einen elektrischen Verbraucher (Last) mit Hilfe eines Halbleiterschalters (beispielsweise eines MOS-Transistors) zu steuern. Dabei entsteht in dem Schalter elektrische Verlustleistung, die in Form von Wärme abgeführt wird. Transistoren, die hohen Verlustleistungen standhalten müssen, sind kostenintensiver als Transistoren, die für kleinere, maximal zulässige Verlustleistungen ausgelegt sind. Auch steigt mit zunehmender Verlustleistung der Aufwand, der beispielsweise für die Kühlung des Transistors betrieben werden muss.In a variety of applications, it is common to control the current through an electrical load by means of a semiconductor switch (eg, a MOS transistor). This creates electrical power loss in the switch, which is dissipated in the form of heat. Transistors that have to withstand high power losses are more costly than transistors designed for smaller, maximum power losses. Also increases with increasing power dissipation of the effort that must be operated, for example, for the cooling of the transistor.

Daher geht man mitunter dazu über, einen elektrischen Verbraucher durch zwei oder mehrere Transistoren anzusteuern, deren Lastzweige parallel geschaltet sind. Dies hat den Vorteil, dass jeder einzelne Transistor für eine geringere maximal zu erwartende Verlustleistung ausgelegt sein muss. Voraussetzung hierfür ist allerdings, dass darauf geachtet wird, dass durch die parallel geschalteten Transistoren im wesentlichen die gleichen Treiberströme fließen (Symmetrierung). Die Parallelschaltung mehrerer Transistoren hat darüber hinaus den Vorteil, dass bei Ausfall eines Transistors die Last immer noch betrieben werden kann (gegebenenfalls in verringertem Maße).Therefore, one sometimes goes over to control an electrical load through two or more transistors whose load branches are connected in parallel. This has the advantage that each individual transistor must be designed for a lower maximum expected power loss. The prerequisite for this, however, is that care is taken that essentially the same driver currents flow through the transistors connected in parallel (symmetrization). The parallel connection of several transistors has the additional advantage that in case of failure of a transistor, the load can still be operated (possibly to a lesser extent).

Zur im wesentlichen symmetrischen Aufteilung des Treiberstroms einer Last durch zwei parallel geschaltete Transistoren ist es bekannt, die Teilströme durch beide Transistoren jeweils zu regeln, wobei der eine Regelkreis dem anderen Regelkreis folgt (Master-Siave-Anordnung). Derartige Systeme sind beispielsweise in EP-A-1 422 819 , EP-A-0 354 098 , US-A-3 675 114 und DE-A-35 38 584 beschrieben.For substantially symmetrical distribution of the drive current of a load through two transistors connected in parallel, it is known to regulate the partial currents through both transistors, the one control loop following the other control loop (master-Siave arrangement). Such systems are for example in EP-A-1 422 819 . EP-A-0 354 098 . US-A-3,675,114 and DE-A-35 38 584 described.

Aufgabe der Erfindung ist es, eine Vorrichtung zum Treiben einer Last zu schaffen, bei der auf regelungstechnisch einfache Art und Weise der Treiberstrom symmetrisch auf mehrere parallel geschaltete Zweige mit Halbleiter-Schaltern aufgeteilt wird und Maßnahmen zur Verhinderung einer Zerstörung infolge eines in einem der Zweige fließenden, zu hohen Stroms getroffen sind.The object of the invention is to provide a device for driving a load, in which the drive current is distributed symmetrically in a simple manner in a control manner to a plurality of parallel branches with semiconductor switches and measures for preventing destruction as a result of flowing in one of the branches , are hit to high currents.

Zur Lösung dieser Aufgabe wird mit der Erfindung eine Vorrichtung zum Treiben einer Last vorgeschlagen, die versehen ist mit

  • mindestens zwei Transistoren, deren Lastzweige (d. h. steuerbaren Strompfade) parallel geschaltet und mit der Last verbindbar sind,
  • mindestens zwei Ansteuereinheiten zur Erzeugung von Ansteuersignalen zur Ansteuerung der Transistoren, wobei jedem Transistoren eine Ansteuereinheit zugeordnet ist, und
  • einer Steuereinrichtung zur sequentiellen Freigabe der Ansteuerung jeweils eines der Transistoren durch die dem anzusteuernden Transistor zugeordneten Ansteuereinheit für im wesentlichen gleich lange Ansteuerintervalle innerhalb eines Zyklus.
To solve this problem, a device for driving a load is proposed with the invention, which is provided with
  • at least two transistors whose load branches (ie controllable current paths) are connected in parallel and connectable to the load,
  • at least two drive units for generating drive signals for driving the transistors, wherein each transistor is associated with a drive unit, and
  • a control device for the sequential release of the activation of one of the transistors in each case by the drive unit assigned to the drive to be driven for substantially equal drive intervals within one cycle.

Wesensmerkmal der Erfindung ist die zyklische sequentielle Aufschaltung der Treibertransistoren der Parallelschaltung, so dass die mittlere Verlustleistung in sämtlichen Transistoren im Wesentlichen gleich ist.A key feature of the invention is the cyclic sequential connection of the driver transistors of the parallel circuit, so that the average power loss in all transistors is substantially equal.

Erfindungsgemäß wird die Aktivierung und Deaktivierung der Ansteuerung der Transistoren durch deren Ansteuereinheiten von einer übergeordneten Steuereinrichtung gesteuert, und zwar derart, dass die Transistoren in einer vorbestimmten Reihenfolge zeitlich jeweils einzeln angesteuert werden. Diese Maßnahme wird zunächst einmal dann getroffen, wenn die Parallelschaltung lediglich zwei Transistoren aufweist. Auch bei drei oder mehreren Transistoren können diese einzeln sequentiell und zyklisch aufgeschaltet werden. Wie die Aktivierung und Deaktivierung der Transistoren erfolgt, ist für die Erfindung zunächst einmal von untergeordneter Bedeutung. So wäre es beispielsweise auch denkbar, wenn in Reihe zu jedem Transistor ein EIN/AUS-Schalter geschaltet ist, wobei dann die Steuereinrichtung auf diese Schalter einwirkt, um die Versorgung der Last mit Strom durch die einzelnen Transistoren sequentiell und zyklisch freizugeben.According to the invention, the activation and deactivation of the control of the transistors is controlled by their drive units of a higher-level control device, in such a way that the transistors are driven individually in a predetermined order in time. This measure is initially taken once when the parallel circuit has only two transistors. Even with three or more transistors, these can be switched on individually sequentially and cyclically. How the activation and deactivation of the transistors takes place is of minor importance for the invention. For example, it would also be conceivable to have an ON / OFF switch in series with each transistor is switched, in which case the controller acts on these switches to enable the supply of the load with current through the individual transistors sequentially and cyclically.

Da die Transistoren ein gewisses Einschalt- und Ausschaltverhalten zeigen, ist es zweckmäßig, gegen Ende des Ansteuerintervalls eines aktuell ansteuerbaren Transistors diesen zu deaktivieren, während gleichzeitig der nächste anzusteuernde Transistor eingeschaltet wird. Während dieser Phase des Übergangs zwischen zwei Ansteuerintervallen sind also kurzzeitig zwei Transistoren angesteuert.Since the transistors exhibit a certain turn-on and turn-off behavior, it is expedient to deactivate the latter at the end of the drive interval of a currently activatable transistor, while simultaneously turning on the next transistor to be driven. During this phase of the transition between two Ansteuerintervallen so briefly two transistors are driven.

Die Aufschaltung des nächsten anzusteuernden Transistors und die Deaktivierung des aktuell angesteuerten Transistors erfolgt zweckmäßigerweise durch eine gesteuerte Änderung der Ansteuersignale für diese beiden Transistoren, was entweder durch die Steuereinrichtung direkt oder aber indirekt über die Ansteuereinheiten der Transistoren erfolgt.The connection of the next transistor to be driven and the deactivation of the currently driven transistor is advantageously carried out by a controlled change of the drive signals for these two transistors, which is done either directly by the control device or indirectly via the drive units of the transistors.

Lasttreiber sind im Allgemeinen Bestandteil eines Regelkreises zur Regelung des Laststroms auf einen vorgegebenen Sollwert, wobei diesem Regelkreis weitere Regelkreise überlagert sein können. Die Ansteuereinheiten der Transistoren weisen also Regler auf oder aber den Ansteuereinheiten der Transistoren ist ein gemeinsamer Regler vorgeschaltet. Im letztgenannten Fall wird also das Reglerausgangssignal zyklisch und sequentiell den einzelnen Transistoren zugeführt, wobei es in den Übergangsphasen zweier Ansteuerintervalle für unterschiedliche Transistoren wiederum zur temporären gleichzeitigen Ansteuerung zweier Transistoren kommt.Load drivers are generally part of a control circuit for controlling the load current to a predetermined setpoint, with this control loop can be superimposed on other control loops. The drive units of the transistors thus have regulators or else the drive units of the transistors are preceded by a common regulator. In the latter case, therefore, the controller output signal is supplied cyclically and sequentially to the individual transistors, wherein in the transition phases of two drive intervals for different transistors in turn leads to the temporary simultaneous control of two transistors.

Zweckmäßigerweise ist jede Ansteuereinheit eines Transistors mit einem Regler versehen, an dessen Eingang das Differenzsignal aus dem Sollwert für den Laststrom und dem Istwert des Laststroms anliegt und an dessen Ausgang das Ansteuersignal für den betreffenden Transistor zur Regelung des Istwerts des Laststroms auf den Sollwert ausgegeben wird. Dabei wird jeweils nur dem Regler der Ansteuereinheit des aktuell angesteuerten Transistors das Differenzsignal zugeführt. Die Regler der Ansteuereinheiten der anderen Transistoren sind beispielsweise inaktiv geschaltet.Conveniently, each drive unit of a transistor is provided with a regulator at the input of which the differential signal from the setpoint for the load current and the actual value of the load current is applied and at whose output the drive signal for the respective transistor for controlling the actual value of the load current is output to the setpoint. In each case only the Controller of the drive unit of the currently driven transistor, the difference signal supplied. The regulators of the drive units of the other transistors are, for example, inactive.

Wird nun im Rahmen der erfindungsgemäßen zyklischen und sequentiellen Freigabe der Ansteuerung jeweils eines der Transistoren oder einer Gruppe von Transistoren von einem Transistor auf den anderen Transistor umgeschaltet, so wird vor der Deaktivierung eines Transistors dessen letztes Ansteuersignal zweckmäßigerweise abgespeichert, um diesen Transistor bei der nächsten Ansteuerung wiederum mit dem abgespeicherten Ansteuersignal anzusteuern.If, in the context of the cyclic and sequential release of the control according to the invention, one of the transistors or a group of transistors is switched from one transistor to the other transistor, its last activation signal is expediently stored before the deactivation of a transistor in order to activate this transistor during the next activation in turn to control with the stored drive signal.

Alternativ kann durch gezielte Aufschaltung des Differenzsignals auf den Eingang des Reglers der dem nächsten anzusteuernden Transistor zugeordneten Ansteuereinheit eine andere Ansteuerstrategie verfolgt werden. Hierbei wird jedem Regler der Ansteuereinheiten jeweils zur Verringerung des Ansteuersignals anstelle des Sollwerts für den Laststroms oder des Differenzsignals ein das Ansteuersignal auf Null ausregelnder konstanter erster Vorgabewert und zur Vergrößerung des Ansteuersignals ein das Ansteuersignal auf einen nahe dem Istwert des Laststroms liegenden konstanten zweiten Vorgabewert zugeführt. Bei einer derartigen Vorgehensweise ist es ferner von Vorteil, wenn zum Umschalten der Ansteuerung des aktuell ansteuerbaren Transistors auf die Ansteuerung des nächsten anzusteuernden Transistors im Regler der Ansteuereinheit des aktuell ansteuerbaren Transistors anstelle des Differenzsignals oder des Sollwerts für den Laststrom der erste Vorgabewert und dem Regler der Ansteuereinheit des nächsten anzusteuernden Transistors der zweite Vorgabewert zugeführt wird, wobei dem Regler der Ansteuereinheit des nächsten anzusteuernden Transistors danach anstelle des zweiten Vorgabewerts das Differenzsignal zuführbar ist, sobald das Ansteuersignal für den aktuell ansteuerbaren Transistors um einen vorgebbaren Wert abgefallen ist. Auf diese Weise wird also der Differenzwert zyklisch und sequentiell auf die Regler der Ansteuereinheiten der Transistoren der Parallelschaltung "übergeblendet".Alternatively, a different activation strategy can be pursued by deliberately connecting the differential signal to the input of the regulator of the drive unit assigned to the next transistor to be triggered. In this case, each regulator of the drive units is supplied with a constant first default value for zeroing the drive signal to zero in order to reduce the drive signal instead of the setpoint for the load current or the differential signal, and to increase the drive signal to supply the drive signal to a constant second preset value close to the actual value of the load current. In such an approach, it is also advantageous if, for switching the control of the currently drivable transistor to the drive of the next controlled transistor in the controller of the drive unit of the currently drivable transistor instead of the difference signal or the setpoint for the load current of the first default value and the controller Control unit of the next transistor to be driven, the second default value is supplied, wherein the controller of the drive unit of the next transistor to be driven thereafter instead of the second default value, the difference signal can be supplied as soon as the drive signal for the currently drivable transistor has dropped by a predetermined value. In this way, the difference value is cyclic and sequential to the Controller of control units of transistors of parallel connection "overlaid".

Die zuvor beschriebene gesteuerte Reduzierung und Vergrößerung der Ansteuersignale in der Übergangsphase zwischen dem endgültigen Abschalten/Deaktivieren des einen Transistors und Einschalten/Aktivieren des nächsten Transistors kann auch durch Beeinflussung dieser Ansteuersignale hinter den Reglern erfolgen, ohne dass am Eingang der Regler verschiedene Signale aufgeschaltet werden.The above-described controlled reduction and increase of the drive signals in the transition phase between the final deactivation / deactivation of the one transistor and switching on / activating the next transistor can also be effected by influencing these drive signals behind the regulators, without different signals being applied at the input of the regulators.

Die Erfindung wird nachfolgend anhand eines Ausführungsbeispiels unter Bezugnahme auf die Zeichnung näher erläutert. Im einzelnen zeigen dabei:

Fig. 1
schematisch und als Blockschaltbild die Treiberstufe eines Regelkreises zur Regelung des Betriebsstroms für beispielsweise einen Fahrzeuggebläsemotor und
Fig. 2
den Verlauf der Signale an einzelnen Punkten der Schaltung gemäß Fig. 1.
The invention will be explained in more detail with reference to an embodiment with reference to the drawing. In detail, they show:
Fig. 1
schematically and as a block diagram, the driver stage of a control loop for controlling the operating current for example, a vehicle fan motor and
Fig. 2
the course of the signals at individual points of the circuit according to Fig. 1 ,

In Fig. 1 ist ein Ausführungsbeispiel eines Spannungsreglers 10 mit zwei parallel geschalteten Treibertransistoren T1 und T2 gezeigt, die derart geregelt werden, dass die mittleren Verlustleistungen in beiden Transistoren im wesentlichen gleich ist.In Fig. 1 1 shows an exemplary embodiment of a voltage regulator 10 with two driver transistors T1 and T2 connected in parallel, which are regulated in such a way that the average power losses in both transistors are substantially the same.

Der Spannungsregler 10 dient in diesem Ausführungsbeispiel der Regelung eines Gebläsemotors 12, dessen Ist-Motorspannung durch ein Signal am Ausgang eines Messgliedes 14 repräsentiert wird. Das Differenzsignal aus Istwert und Sollwert wird dem Eingang einer Treiberstufe 16 zugeführt, die die beiden parallel geschalteten Transistoren T1 und T2 aufweist.The voltage regulator 10 is used in this embodiment, the regulation of a fan motor 12, the actual motor voltage is represented by a signal at the output of a measuring element 14. The difference signal from the actual value and setpoint value is fed to the input of a driver stage 16 which has the two transistors T1 and T2 connected in parallel.

Die gleichmäßige Aufteilung der Verlustleistung auf die beiden Transistoren T1 und T2 wird erreicht, indem abwechselnd jeweils nur einer der beiden Transistoren T1,T2 leitet. Bei gleicher Dauer der jeweiligen Phasen (Ansteuerintervalle), in der der jeweilige Transistor T1,T2 leitet, teilt sich die mittlere Verlustleistung somit auch gleichmäßig auf beide Transistoren T1,T2 auf.The uniform distribution of the power loss to the two transistors T1 and T2 is achieved by alternately conducting only one of the two transistors T1, T2 at a time. For the same duration of the respective phases (drive intervals), in which the respective transistor T1, T2 conducts, the average power loss is thus equally divided between the two transistors T1, T2.

Die Treiberstufe 16 weist also die beiden (Leistungs-)Transistoren T1,T2 auf, die in diesem Ausführungsbeispiel jeweils von einem Regelverstärker A1 bzw. A2 als Ansteuereinheit 18,20 angesteuert werden. Die Regelverstärker A1,A2, die einen I-Anteil und damit eine integrierende Charakteristik aufweisen, erhalten ihr Eingangssignal von jeweils einem Multiplexer MUX1,MUX2, der optional eine positive Konstante, eine negative Konstante oder das Differenzsignal aus dem Spannungssoll- und Spannungsistwert, also die Regelabweichung, an den Eingang des betreffenden Regelverstärkers schalten kann. Die Ausgänge der Regelverstärker A1,A2 sind mit jeweils einem Abtastkomparator K1,K2 verbunden, der feststellt, ob die Ausgangsspannung, d.h, das Ausgangssignal der Regelverstärker A1,A2 gegenüber dem Wert zu einem Abtastzeitpunkt um einen als Referenzwert zugeführten Betrag abgefallen ist. Dazu weist jeder Abtastkomparator neben dem eigentlichen Komparator auch ein Sample/Hold-Glied auf. Zur Steuerung der Abtastkomparatoren, zur Auswertung der Signale der Abtastkomparatoren K1,K2 und zur Umschaltung der Multiplexer MUX1,MUX2 dient eine Steuereinrichtung 22.The driver stage 16 thus has the two (power) transistors T1, T2, which are each driven in this embodiment by a variable gain amplifier A1 or A2 as the drive unit 18,20. The control amplifiers A1, A2, which have an I component and thus an integrating characteristic, receive their input signal from a respective multiplexer MUX1, MUX2, which optionally has a positive constant, a negative constant or the difference signal from the voltage setpoint and voltage actual value, ie Control deviation, can switch to the input of the relevant control amplifier. The outputs of the control amplifiers A1, A2 are each connected to a sampling comparator K1, K2, which determines whether the output voltage, that is, the output signal of the control amplifiers A1, A2 has dropped from the value at a sampling instant by an amount supplied as a reference value. For this purpose, each Abtastkomparator in addition to the actual comparator on a sample / hold member. For controlling the Abtastkomparatoren, for evaluating the signals of the Abtastkomparatoren K1, K2 and for switching the multiplexer MUX1, MUX2 is a control device 22nd

Um einen konstanten Laststrom auch während der Umschaltphasen zu gewährleisten, kann beispielsweise das nachfolgend beschriebenen Verfahren verwendet werden, das die Transistoren derart steuert, dass zu jedem Zeitpunkt die Motorspannung (und damit der Motorstrom) exakt auf den Sollwert geregelt ist. Dazu erfolgt in diesem Ausführungsbeispiel eine gezielte wechselweise Umschaltung der Ansteuerung der Transistoren T1 und T2 zwischen einem Regelbetrieb und einem Steuerbetrieb in den nachfolgend aufgeführten vier Phasen:In order to ensure a constant load current even during the switching phases, for example, the method described below can be used, which controls the transistors such that at any time the motor voltage (and thus the motor current) is controlled exactly to the desired value. For this purpose, in this embodiment, a targeted alternating switching of the control of the transistors T1 and T2 between a control operation and a control operation in the following four phases:

Phase 1Phase 1

In dieser Phase liegt am Regelverstärker A1 über den Multiplexer MUX1 die Regelabweichung an. Der Regelverstärker A2 erhält über den Multiplexer MUX2 eine negative Konstante, so dass die Ausgangsspannung gemäß der integrierenden Charakteristik des Regelverstärkers abfällt, bis am Ausgang der niedrigste Wert des Aussteuerbereichs (beispielsweise 0 V) anliegt. Diese Situation ist in Fig. 2 zu erkennen, die zeigt, dass in der Phase 1 der Transistor T1 aufgesteuert und der Transistor T2 ausgeschaltet ist.In this phase, the control deviation A1 is applied to the control amplifier A1 via the multiplexer MUX1. The control amplifier A2 receives via the multiplexer MUX2 a negative constant, so that the output voltage according to the integrating characteristic of the control amplifier drops until the output of the lowest value of the control range (for example, 0 V) is applied. This situation is in Fig. 2 can be seen, which shows that in phase 1, the transistor T1 is turned on and the transistor T2 is turned off.

In der Phase 1 wird also die Motorspannung vom Regelverstärker A1 und dem zugehörigen Leistungstransistor T1 geregelt, während der Transistor T2 (nach einer weiter unten noch zu beschreibenden Übergangsphase) keinen Strom mehr leitet.In phase 1, therefore, the motor voltage is regulated by the control amplifier A1 and the associated power transistor T1, while the transistor T2 (after a transition phase to be described below) no longer conducts electricity.

Die Treiberstufe 16 verbleibt für eine vorgebbare Zeitdauer in der Phase 1; gegen Ende dieser Zeitdauer tastet der Abtastkomparator K1, gesteuert von der Steuereinrichtung 22, das Ausgangssignal des Regelverstärkers A1 ab und anschließend schaltet das System in die Phase 2.The driver stage 16 remains in phase 1 for a predefinable period of time; towards the end of this period, the sampling comparator K1, controlled by the control device 22, samples the output signal of the control amplifier A1 and then the system switches to phase 2.

Phase 2Phase 2

In dieser Phase erhält nun der Regelverstärker A2 über den Multiplexer MUX2 eine positive Konstante, so dass die Ausgangsspannung am Regelverstärker A2 infolge der integrierenden Charakteristik des Regelverstärkers A2 ansteigt. Damit beginnt der Transistor T2, seinerseits einen Strom zu leiten. Dieser Strom addiert sich zum Strom des Transistors T1, dessen Strom verringert wird, so dass der Gesamtstrom (Laststrom) durch den Motor 12 konstant bleibt. Die damit einhergehende Verringerung der Ansteuerspannung des Regelverstärkers A1 wird vom Abtastkomparator K1 am Ende der Phase 2 erkannt, woraufhin die Treiberstufe 16 in die Phase 3 umschaltet.In this phase, the control amplifier A2 now receives a positive constant via the multiplexer MUX2, so that the output voltage at the control amplifier A2 increases as a result of the integrating characteristic of the control amplifier A2. Thus, the transistor T2 begins to conduct a current. This current adds to the current of the transistor T1 whose current is reduced, so that the total current (load current) through the motor 12 remains constant. The associated reduction in the drive voltage of the control amplifier A1 is detected by the Abtastkomparator K1 at the end of phase 2, whereupon the driver stage 16 switches to phase 3.

Phase 3Phase 3

In dieser Phase erhält nun der Regelverstärker A2 über den Multiplexer MUX2 (durch entsprechende Steuerung durch die Steuereinrichtung 22) die Regelabweichung. Der Regelverstärker A1 empfängt nun, ebenfalls durch die Steuereinrichtung 22 gesteuert über seinen Multiplexer MUX1 die negative Konstante, so dass die Ausgangsspannung am Regelverstärker A1 infolge der integrierenden Charakteristik des Regelverstärkers abfällt, bis am Ausgang des Regelverstärkers schließlich der niedrigste Wert des Aussteuerbereichs (beispielsweise 0 V) ansteht. In der Phase 3 wird die Motorspannung also vom Regelverstärker A2 und dem zugehörigen Leistungstransistor T2 geregelt, während der Transistor T1 nach der zuvor beschriebenen Übergangsphase keinen Strom mehr leitet. Das System verbleibt für eine Zeitdauer T in der Phase 3, bis der Abtastkomparator K2, gesteuert durch die Steuereinrichtung 22, das Ausgangssignal des Regelverstärkers A2 abtastet und die Treiberstufe 16 in die Phase 4 umschaltet.In this phase now receives the control amplifier A2 via the multiplexer MUX2 (by appropriate control by the controller 22) the control deviation. The control amplifier A1 now receives the negative constant, likewise controlled by the control device 22 via its multiplexer MUX1, so that the output voltage at the control amplifier A1 drops as a result of the integrating characteristic of the control amplifier until the output of the control amplifier finally reaches the lowest value of the control range (for example 0V ) pending. In phase 3, the motor voltage is thus regulated by the control amplifier A2 and the associated power transistor T2, while the transistor T1 no longer conducts electricity after the transition phase described above. The system remains in phase 3 for a period of time T until the sample comparator K2, under control of the controller 22, samples the output of the variable gain amplifier A2 and switches the driver stage 16 to phase 4.

Phase 4Phase 4

Der Regelverstärker A1 erhält nun über den Multiplexer MUX1 (wiederum gesteuert durch die Steuereinrichtung 22) eine positive Konstante, so dass die Ausgangsspannung am Regelverstärker infolge des integrierenden Verhaltens des Regelverstärkers ansteigt. Damit fließt im Transistor T1 ein ansteigender Strom, der sich zum Strom durch den Transistor T2 addiert, womit der Strom durch den zu regelnden Motor 12 ansteigt. Da der Regelverstärker A2 die Regelabweichung empfängt, steuert nun dieser Regelverstärker A2 den Transistor T2 zur Verringerung seines Laststroms, so dass der Gesamtstrom konstant bleibt. Die Ansteuerspannung für den Transistor T2 verringert sich also, was durch den Abtastkomparator K2 am Ende der Phase 4 erkannt wird, woraufhin die Treiberstufe 16 wieder in die oben beschriebene Phase 1 umschaltet.The control amplifier A1 now receives a positive constant via the multiplexer MUX1 (again controlled by the control device 22), so that the output voltage at the control amplifier increases as a result of the integrating behavior of the control amplifier. Thus, an increasing current flows in the transistor T1, which adds to the current through the transistor T2, whereby the current through the motor to be controlled 12 increases. Since the control amplifier A2 receives the control deviation, now this control amplifier A2 controls the transistor T2 to reduce its load current, so that the total current remains constant. The drive voltage for the transistor T2 thus decreases, which is detected by the Abtastkomparator K2 at the end of the phase 4, whereupon the driver stage 16 again switches to the phase 1 described above.

Die zuvor beschriebenen Schaltung ist erweiterbar auf n Spannungsregelkreise, d.h. auf mehr als zwei parallel geschaltete Transistoren mit zugehörigen Regelverstärkern.The circuit described above is expandable to n voltage control loops, i. on more than two parallel-connected transistors with associated control amplifiers.

Das erfindungsgemäße Konzept lässt sich auch als Digitalschaltung realisieren. Dazu wird die Istwertspannung (in diesem Beispiel Motorspannung) digitalisiert, während die Funktionen der Regelverstärker, der Multiplexer und der Komparatoren digital realisiert und die Transistoren über Digital-AnalogWandler angesteuert werden. Schließlich sei noch erwähnt, dass die Abtastkomparatoren auch durch einen gemeinsamen Komparator mit Eingangsmultiplexer ersetzt werden können.The concept according to the invention can also be realized as a digital circuit. For this purpose, the actual voltage (in this example, motor voltage) is digitized, while the functions of the control amplifier, the multiplexer and the comparators are digitally implemented and the transistors are controlled by digital-to-analog converters. Finally, it should be mentioned that the sampling comparators can also be replaced by a common comparator with input multiplexer.

Claims (6)

Vorrichtung zum Treiben einer Last, mit - mindestens zwei Transistoren (T1,T2), deren Lastzweige parallel geschaltet und mit der Last verbindbar sind, - mindestens zwei Ansteuereinheiten (A1,A2) zur Erzeugung von Ansteuersignalen zur Ansteuerung der Transistoren (T1,T2), wobei jedem Transistor (T1,T2) eine Ansteuereinheit (18,20) zugeordnet ist, und - einer Steuereinrichtung (22) zur sequentiellen Freigabe der Ansteuerung jeweils eines der Transistoren (T1,T2) durch die dem anzusteuernden Transistor (T1,T2) zugeordneten Ansteuereinheit (18,20) für im wesentlichen gleich lange Ansteuerintervalle (T) innerhalb eines Zyklus. Device for driving a load, with at least two transistors (T1, T2) whose load branches are connected in parallel and can be connected to the load, - At least two drive units (A1, A2) for generating drive signals for driving the transistors (T1, T2), wherein each transistor (T1, T2) is associated with a drive unit (18,20), and - A control device (22) for the sequential release of the control of each one of the transistors (T1, T2) by the the transistor (T1, T2) associated drive unit (18,20) for substantially equal length of drive intervals (T) within a cycle. Vorrichtung nach Anspruch 1, dadurch gekennzeichnet, dass gegen Ende des Ansteuerintervalls für einen aktuell ansteuerbaren Transistor (T1,T2) und vor Beginn des Ansteuerintervalls für den nächsten anzusteuernden Transistor (T2,T1) das Ansteuersignal für den aktuell ansteuerbaren Transistor (T1,T2) automatisch abfällt und das Ansteuersignal für den nächsten anzusteuernden Transistor (T2,T1) ansteigt.Apparatus according to claim 1, characterized in that towards the end of the drive interval for a currently controllable transistor (T1, T2) and before the start of the Ansteuerintervalls for the next driven transistor (T2, T1), the drive signal for the currently drivable transistor (T1, T2) automatically drops and the drive signal for the next driven transistor (T2, T1) increases. Vorrichtung nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Ansteuereinheiten (18,20) jeweils einen Regler (A1,A2) zum Empfang eines Differenzsignals aus einem vorgebbaren Sollwert und dem Istwert eines Laststroms und zum Ausgeben eines Ansteuersignals zur Regelung des Istwerts des Laststroms auf den Sollwert an die Transistoren (T1,T2) aufweisen und dass jeweils nur dem Regler (A1,A2) der Ansteuereinheit (18,20) des aktuell ansteuerbaren Transistoren (T1,T2) das Differenzsignal zuführbar ist.Apparatus according to claim 1 or 2, characterized in that the drive units (18,20) each have a regulator (A1, A2) for receiving a difference signal from a predetermined desired value and the actual value of a load current and for outputting a drive signal for controlling the actual value of the load current to the setpoint to the transistors (T1, T2) and that in each case only the controller (A1, A2) of the drive unit (18,20) of the currently controllable transistors (T1, T2), the difference signal can be fed. Vorrichtung nach Anspruch 3, dadurch gekennzeichnet, dass zum Ende des Ansteuerintervalls (T) für den aktuell ansteuerbaren Transistor (T1,T2) hin der Wert des von dessen Ansteuereinheit (18,20) ausgegebenen Ansteuersignals abspeicherbar ist und zu Beginn des nächsten Ansteuerintervalls (T6) zur Ansteuerung dieses Transistors (T1,T2) hin dessen Ansteuersignal den abgespeicherten Wert aufweist.Device according to claim 3, characterized in that at the end of the drive interval (T) for the currently activatable transistor (T1, T2) the value of the drive signal output by its drive unit (18, 20) can be stored and at the beginning of the next drive interval (T6 ) for driving this transistor (T1, T2) whose drive signal has the stored value. Vorrichtung nach Anspruch 3, dadurch gekennzeichnet, dass den Reglern (A1,A2) der Ansteuereinheiten (18,20) jeweils zur Verringerung der Ansteuersignale anstelle des Sollwerts für den Laststrom oder anstelle des Differenzsignals ein das Ansteuersignal auf Null ausregelnder konstanter erster Vorgabewert und zur Vergrößerung des Ansteuersignals ein konstanter zweiter Vorgabewert zuführbar ist, der das Ansteuersignal für den Transistor (T1,T2) auf einen dem Istwert des Laststroms entsprechenden Wert regelt.Apparatus according to claim 3, characterized in that the controllers (A1, A2) of the drive units (18,20) each for reducing the drive signals instead of the setpoint for the load current or instead of the difference signal, the drive signal to zero compensating constant first default value and magnification the control signal, a constant second setpoint is fed, which controls the drive signal for the transistor (T1, T2) to a value corresponding to the actual value of the load current value. Vorrichtung nach Anspruch 5, dadurch gekennzeichnet, dass zum Umschalten der Ansteuerung des aktuell ansteuerbaren Transistors (T1,T2) auf die Ansteuerung des nächsten anzusteuernden Transistors (T2,T1) das dem Regler (A1,A2) der Ansteuereinheit (18,20) des aktuell ansteuerbaren Transistors (T1,T2) anstelle des Differenzsignals oder anstelle des Sollwerts für den Laststrom der erste Vorgabewert und dem Regler (A2,A1) der Ansteuereinheit (20,18) des nächsten anzusteuernden Transistors (T2,T1) der zweite Vorgabewert zuführbar ist und dass dem Regler (A2,A1) der Ansteuereinheit (20,18) des nächsten anzusteuernden Transistors (T2,T1) anstelle des zweiten Vorgabewerts anschließend das Differenzsignal zuführbar ist, sobald das Ansteuersignal für den aktuell ansteuerbaren Transistor (T1,T2) um einen vorgebbaren Wert (ΔV) abgefallen ist.Apparatus according to claim 5, characterized in that for switching the control of the currently controllable transistor (T1, T2) to the control of the next transistor to be driven (T2, T1) that the controller (A1, A2) of the drive unit (18,20) of the currently drivable transistor (T1, T2) instead of the difference signal or instead of the setpoint for the load current, the first default value and the controller (A2, A1) of the drive unit (20,18) of the next transistor to be driven (T2, T1), the second default value can be fed and that the controller (A2, A1) of the drive unit (20,18) of the next transistor to be controlled (T2, T1) instead of the second default value then the difference signal can be supplied as soon as the drive signal for the currently drivable transistor (T1, T2) by a predetermined value (.DELTA.V) has dropped.
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Publication number Priority date Publication date Assignee Title
EP2844035A1 (en) 2013-08-28 2015-03-04 ELMOS Semiconductor AG Device for supplying at least one consumer with electrical energy or for providing electric power for at least one consumer
DE102014217070A1 (en) 2013-08-28 2015-03-05 Elmos Semiconductor Aktiengesellschaft Device for supplying at least one consumer with electrical energy or for providing electrical power for at least one consumer
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DE102014012789A1 (en) * 2014-08-27 2016-03-03 Elmos Semiconductor Aktiengesellschaft Device for controlling the operating current of an LED lamp unit
DE102014012790A1 (en) * 2014-08-27 2016-03-03 Elmos Semiconductor Aktiengesellschaft Method for controlling the operating current of a bridge circuit
DE102014012787A1 (en) * 2014-08-27 2016-03-17 Elmos Semiconductor Aktiengesellschaft Method for controlling the operating current of an LED lamp unit

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