DYNAMIC POWER CONTROL FOR DISPLAY SCREENS
The present systems and methods relates to dynamic power control (DPC) systems and methods for dynamically changing the brightness of display screens based on dividing the display into zones.
Conventional display screens are used to display video and computer images to individuals and small groups of people. These screens are based on technologies such as cathode ray tube, LCD and plasma and they produce high resolution images of sufficient brightness for viewing indoors.
In order to display static and moving images to large crowds of people, both in indoor and outdoor settings, an alternative technology is used, which can provide screen sizes from 1.5 meters wide up to 20 meters wide and beyond, with sufficient brightness to be used in bright sunlight conditions. The technology which has emerged as being ideally suited for this job uses Light Emitting Diodes (LEDs) as the light- producing devices. LED screens have been available for many years and hundreds are installed in sports and public venues around the world. Display screens which use LEDs are relatively energy-efficient devices, in that their power consumption is proportional to their size and light output. Typically, for a given screen size, power consumption is high when a bright image is displayed, and power consumption is low when a dark image is displayed. For an LED screen which is permanently installed in a venue, the rating (e.g., watt or power rating) of the power supply required to power it (i.e., to provide the proper voltage and current), may be easily calculated from the manufacturer's technical data, and is based on the amount of power the screen requires when displaying the brightest possible image (a plain white image filling the screen) at its full rated light output. In this situation, the screen is drawing the most power it can ever draw, i.e., maximum power, and the power supply must be of sufficient rating to handle this maximum power condition.
In recent times, a market has emerged for small LED screens (1.5 to 2 meters wide), the concept of which is similar to a large plasma or LCD monitor, in that it is a complete monitor in a cabinet, which can simply be hung on a wall in a shopping mall, for example, and used to display various content such as advertisements. Typically, this segment of the market is very price-conscious. Accordingly, it is desirable to have competitively priced screens that may be installed by non-specialist persons, i.e., simple enough for a typical consumer to install. Simplicity of installation reduces overall costs and is appealing to consumers.
Factors related to costs include the size or rating of the power supply necessary to provide the needed power to the LED screen, as well as the expense associated with providing separate or special power lines or feeds to provide the necessary power, voltage and/or current to the LED screen.
As noted, typically the power consumption of an LED screen is proportional to the brightness of the image displayed. Images vary in brightness content, from the very darkest (a plain black background with no detail) to the very lightest (a plain white background with no detail).
As the screen designer has no control over the brightness of content displayed on the LED screen, or any other screen, the screen has to be designed to cope with the worst case power consumption, namely, displaying white background. In this case, the screen is drawing maximum power from the supply. The following factors are taken into account in designing and installing display screen:
1. Above a certain required power, such as when the maximum screen power (for displaying a white background) is in excess of 3.5 kW, the screen cannot be powered from a typical feed, such as from a regular 230V single phase outlet. In such a case, special mains feed or power lines must be installed to power the screen, thus increasing installation costs.
2. The total power rating of the power supply units inside the screen must be sufficient to be able to deliver the maximum power. This requires bulky and heavy screen power supply unit(s) whose full capacity is not used most of the time. The large screen power supplies further add to the screen cost and weight, as well as require heat dissipation.
3. Due to the need for increased heat dissipation, the cooling capacity of the ventilation system inside screen must cope with increased heat produced during continuous running at maximum power (i.e., during the worst case scenario used in designing screen displays). Accordingly, more fans are required to circulate air, with the associated increase in cost, weight and noise.
As is clear, it is desirable to reduce the power requirement of a screen. A simple way of reducing the maximum power drawn by an LED screen is to limit the light output to a low value, i.e., turn the brightness down. While achieving the goal of reducing power, this clearly has the obvious disadvantage of rendering all the displayed images dim and lifeless. Another way of reducing power consumed by a screen includes limiting the current provided to the screen as described in Patent No. 7,193,592 to Nakamura, which is incorporated herein by reference in its entirety.
Nakamura describes an electro-luminescent (EL) display screen where pixels are driven by a drive current from a driving circuit. The driving circuit in Nakamura restricts current upon an increase in the total sum of the drive current.
It is desirable to further reduce the power requirement of a screen without substantially affecting the brightness of the content, images or texts displayed on the screen.
One object of the present systems and methods is to overcome the disadvantages of conventional displays. This and other objects are achieved by a display system having a screen configured to display an image with a screen brightness value; and a processor configured to divide the screen into zones, to determine a zone brightness of each zone, e.g., via real time content analysis of the image displayed in the zone; and to reduce the screen brightness by a factor when the zone brightness of one of the zones is greater than a threshold value.
The threshold value is associated with a maximum rated current drawn from a power supply driving a zone, and each zone may be driven by a respective power supply. The processor may also be configured to measure virtual zone brightness of virtual zones which are moved by a predetermined number of pixels across the screen,
and reduce the screen brightness by the factor when the virtual zone brightness of one of the virtual zones is greater than the threshold value.
Further areas of applicability of the present systems and methods will become apparent from the detailed description provided hereinafter. It should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the systems and methods, are intended for purposes of illustration only and are not intended to limit the scope of the invention.
These and other features, aspects, and advantages of the apparatus, systems and methods of the present invention will become better understood from the following description, appended claims, and accompanying drawing where:
Figs. 1-3 show screens divided into 8 zones according to illustrative embodiments; Fig. 4 shows block diagram showing the signal path of an LED screen according to an illustrative embodiment;
Fig. 5 shows block diagram including a delay element according to another illustrative embodiment;
Figs. 6-8 show various graphs of demonstrating the effects of DPC according to another illustrative embodiment;
Fig. 9 shows zoned screen with large, bright graphic objects moving across the screen according to another illustrative embodiment; and
Fig. 10 shows virtual zones according to another illustrative embodiment.
The following description of certain exemplary embodiments is merely exemplary in nature and is in no way intended to limit the invention, its applications, or uses. In the following detailed description of embodiments of the present systems and methods, reference is made to the accompanying drawings which form a part hereof, and in which are shown by way of illustration specific embodiments in which the described systems and methods may be practiced. These embodiments are described in sufficient
detail to enable those skilled in the art to practice the presently disclosed systems and methods, and it is to be understood that other embodiments may be utilized and that structural and logical changes may be made without departing from the spirit and scope of the present system. The following detailed description is therefore not to be taken in a limiting sense, and the scope of the present system is defined only by the appended claims. The leading digit(s) of the reference numbers in the figures herein typically correspond to the figure number, with the exception that identical components which appear in multiple figures are identified by the same reference numbers. Moreover, for the purpose of clarity, detailed descriptions of well-known devices, circuits, and methods are omitted so as not to obscure the description of the present system.
The present systems and methods use dynamic power control (DPC) to reduce and limit the maximum power drawn by a screen display device, such as an LED screen, without affecting the quality of images having medium and low brightness content. Whenever images containing a high brightness content are encountered, DPC automatically and substantially instantly reduces the image brightness to a level which maintains the total power consumption within a predefined limit.
In addition to not affecting the images having medium and low brightness content, the present systems and methods using DPC allow reduction of the screen maximum power consumption to a level which allows the LED screen to be powered from a regular outlet, such as a 230V mains outlet (or any other suitable voltage level with associated cables suitable for the proper power, current and voltage levels), instead of a special 3-phase supply, for example. That is, a special mains supply is not required, thus reducing the cost of installation. Further, screens with DPC use less electricity and are therefore more eco-friendly, and smaller/fewer power supply units are required inside the screen, thus reducing the cost and weight of the screen. Reduced power consumption leads to reduced heat generation which, in turn, leads to reduced cooling requirement. Accordingly, fewer fans are needed to cool the screen thus further reducing the cost and weight of the screen and allowing for quieter operation. According to the present systems and methods that use DPC to reduce power consumption without affecting the quality of images having medium and low
brightness content, the active area of a screen, such as an LED screen, is divided into zones. Each zone is driven by its own power supply unit(s) (PSUs). The image signal to be displayed on screen is analyzed in real time, by dividing incoming fields into zones which in size, exactly match screen zones. Further, the pixel luminance value of the brightest zone is determined, such as by determining the zone luminance values, or white/light colored image areas, of each zone from content analysis in real time and selecting the brightest zone, e.g., the zone filled with the most white and/or light colored content or image.
The maximum zone luminance value or total pixel luminance value of the brightest zone is compared to a predetermined threshold value. The threshold value is the value which, if reached by the pixels in any one zone, would cause the maximum rated current to be drawn from the PSU(s) driving that zone.
If the determined zone luminance value(s) of any one zone exceeds the predetermined threshold, then a processor reduces the output level of the entire screen by a certain target factor, which may be a predetermined or a calculated power reduction factor, in order to reduce power consumption and prevent the PSUs from becoming overloaded. When the total pixel level of highest zone equals, or falls below the threshold, then the processor returns the screen output level to normal.
The target reduction factor in maximum screen power, brought about by DPC, may be determined by one or more factors. The target may be to reduce the screen's overall power consumption so that, for example, the screen may be operated from a typical single phase outlet, instead of a 3 -phase supply. One beneficial byproduct may be that the quantity of PSUs needed to drive the screen is reduced, with associated savings in cost and weight. Alternatively, the target may be to reduce power consumption so as to bring it within the range of a specific quantity of PSUs, or within the capacity of a different specification of PSU.
The effect of DPC to the average viewer is usually invisible, where brightness of the displayed content is reduced when a zone luminance of any one zone exceeds the predetermined DPC threshold. Consider a situation in which the image contains small areas of bright detail; this may be below the DPC threshold and the screen output will be at maximum level. If the image contains increasing areas of bright detail,
then the screen output level will be progressively reduced, and vice-versa. The more severe the reduction factor, then the earlier the screen output level reduction will occur and the lower it will go. A power reduction factor of 0.6 has been demonstrated using DPC in accordance with the present systems and methods. As shown in system 100 of Fig. 1, a display device, such as an LED screen 110 includes a processor 120 configured to perform DPC and control the LED screen 110 to display images and change screen brightness when the brightness of any one zone exceeds a threshold stored in a memory 130 coupled to processor 120. As is well known, the memory 130 may also store other data and application software including software instructions for execution by the processor to perform DPC, for example.
The processor 120 may be configured to divide the active display area of the screen 110 into zones, such as eight zones 1-8 of identical size and shape. Each zone may be powered by its own one or more PSUs, where a PSU for zone 1 is shown as a dashed box 140 in Fig. 1. The size of a zone (measured in pixels) and/or the number of zones may be determined by a number of factors such as, the power consumption per unit area of the screen at full rated light output; the reduction factor in the maximum screen power expected due to incorporation of DPC, e.g. a reduction factor of 0.6; and the power rating of each zone's PSU(s). The power consumption per unit area of the screen, at full rated output, may be determined either from manufacturer's specification, or by measurement.
During operation, the processor 120 is configured to analyze in real time the pixel content of each corresponding zone of the incoming image signal, determine the total pixel luminance sum of the brightest zone, and compare it to a predetermined threshold value stored in the memory 130. Content analysis is well known, such as described in U.S. Patent No. 6,714,594 to Dimitrova, and U.S. Patent Application Publication No. 2004/0168205 to Nesvadba, each of which is incorporated herein by reference in its entirety. If the determined maximum zone luminance value of the brightest zone, or the luminance value of any of the zones exceeds the threshold value, then the processor 120 is configured to perform DPC and reduce the entire screen output or brightness level. To minimize incidences of output level reduction, it is
desirable for the shape of the zones to represent, in the best way possible, an 'average' slice of the total image. The zone shape has a pronounced effect on DPC performance.
For example, in Fig. 1, the screen 110 is divided into eight zones numbered 1 through 8; where each zone may be half the height of the screen 110, for example, or have different heights (i.e., have a partial screen height). When analyzing each zone in Fig. 1 , it will be evident that zones 2 and 3 will each have higher total pixel values than any other zone, due to the bright areas of these zones 2 and 3. The high pixel values in zone 2 or 3 may well cause the screen output level to be reduced (if higher than the threshold value). By comparison to Fig. 1, Fig. 2 shows a screen 210 with eight zones where the same image as that of Fig. 1 is displayed except that each zone of the screen 210 is full (active) screen height. Zone analysis, e.g., performed by the processor 120 shows that zones 4 and 5 of Fig. 2 have the highest pixel values. However, the percentage of each of those zones 4 and 5 devoted to bright areas (such as sunlit bright clouds in the actual viewing scene) is much lower than that of zones 2 and 3 shown in Fig. 1. In the case of the screen 210 of Fig. 2, the total pixel luminance sum of each of these zones 4 and 5 may be lower than the threshold value and thus will not cause a reduction in screen output level.
In the examples shown in Figs 1-2, it can be seen that eight full-height zones in Fig. 2 give better results than the eight half-height (or partial-height) zones in Fig. 1, because the total content or screen brightness is not effected or reduced, i.e., the screen output level reduction is minimized. This is because the top part of the image in this example contains brighter content than the bottom part and the zones are full-height, resulting in averaging that produces a zone brightness which is less than the threshold value. Of course, it is not always the case that the top part of an image is brighter than the bottom part, however, it does occur more often than not. Therefore, the system may have full-height zones, which minimizes DPC operation and hence maintains image brightness over the widest range of images. Fig. 3 shows one embodiment of a screen 310 having 256x144 pixels and divided into 8 full-height zones, each zone being 32x144 pixels.
As noted, each zone may have its own one or more power supply units (PSUs). PSUs are available in a range of output voltages and powers. In a conventional screen without DPC, each PSU must be powerful enough to be able to drive its area of the screen when a plain white image is displayed (i.e., maximum brightness/power). The incorporation of DPC enables less powerful (and thus less expensive) PSUs to be used, or alternatively, each existing PSU can drive a larger area of the screen.
When calculating the required PSU rating per zone, the power reduction achieved by DPC is taken into account to yield PSUs of lower power ratings. Thus, if the DPC factor is 0.6, for example, then the maximum power required to drive the zone is:
(PZONE WITH NO DPC) x 0.6 Watts where PZONE WITH NO DPC is the power required to display a plain white image on the zone, without DPC operating.
The image signal including the content, e.g., the image, to be displayed on the screen is analyzed to determine brightness value of each pixel to anticipate the current which would be drawn by each individual screen pixel if that image was displayed on the screen with no DPC. If the total current, hence power, of all pixels in any one zone exceeds the threshold value, then the entire screen output level is reduced accordingly to not exceed the rated power rating of the screen or the PSUs. To achieve a sufficiently accurate anticipation of screen pixel performance, it is desired to properly choose where in the signal path to make the content analysis. Fig. 4 shows block diagram 400 showing the signal path of an LED screen according to one embodiment, where a composite video signal 405 is received by a video decoder 410 for decoding. The decoded signal passes through a multiplexer (MUX), and may be multiplied by a scalar 420 to match (e.g., reduce) the signal resolution with the screen resolution since, typically, the incoming image will typically be of somewhat higher resolution (e.g., 720x576 pixels) than the LED screen (e.g., 256x144 pixels). Image resolution is therefore reduced in the scalar 420, to a resolution which matches the LED screen. The image analysis should take place somewhere where the entire incoming image is available. This eliminates the latter stages of the signal path, where
the internal data distribution within the screen physically splits the image data to direct only relevant data to each part of the screen. Analysis is best made after the scalar 420, because after the scalar 420 there is a one to one pixel relationship between image data and LED screen. Incorporation of a field programmable gate array (FPGA) 430 and a field store or memory 435 (with associated micro-controller) enables many functions including image analysis to be carried out after the sealer 420 and before the signal is distributed within the screen 440. The output of the FPGA 430 is provided to a block processor for processing and providing signal to line drivers 455 for driving the screen 440. It is desirable to perform content analysis by the FPGA 430 after the sealer 420. As shown in Fig. 4, the screen 440 includes an internal data distributor
460 to direct relevant data to relevant part of the screen 440. A gamma corrector 465 provides gamma correction. Color correction is also provided by a color corrector 470 for providing signal to drivers 475 for driving LEDs 480 and displaying the content or images on the screen 440. As an illustrative example, the following assumptions are made in the embodiment shown in Fig. 4: at the output of the sealer 420, the image signal exists as an 8-bit RGB (Red-Green-Blue) luminance data (e.g., 3 x 8-bit streams - one for 'R', one for 'G' and one for 'B'); and the LED currents for red, green and blue LEDs are equal. The following describes the sequence of events during image analysis in order to calculate a gain factor which will be applied later in the signal path, to control the screen output level to achieve the target power reduction factor (FactorTARGETREDuc):
1. Apply anti-gamma correction to the 8-bit RGB luminance data and in the process, scale data into 3 x 9-bit values. Anti-gamma correction is desirable in order to emulate what happens to the image data prior to actually being displayed on the LED screen. All image signals have a gamma characteristic applied at the source, for example, to stretch the dynamic range of dark parts of the image, prior to transmission. This characteristic should be removed in the display device. Data is scaled into 3 x 9-bit values, each having a maximum value of 341. When the R, G and B values are later summed, this sum has a maximum value of 3x341 = 1023, which is a convenient 10-bit value.
2. Sum the 9-bit RGB luminance values together to produce a luminance value of 0-1023 for each pixel (now 10-bit).
3. Sum the 10-bit pixel luminance values in each zone.
4. At the end of the incoming image field, compare the zone sums to find the zone having the greatest luminance sum (ZoneSumMEAsuRED). It should be noted that during initial set-up, the system should be calibrated in order to ascertain maximum possible luminance sum per zone (ZoneSumMAχposs). This is achieved by providing a plain white background as image source and measuring as above.
5. Calculate Gain Factor to be applied to LED drivers from following formula:
FactoroAiN = ZoneSumMAx POSS x FactorTARGEτ REDUC / ZoneSumMEAsuRED
For example:
If: ZoneSuniMAXPoss = 800 and: ZoneSumMEAsuRED = 600 and: FactorTARGEτ REDUC = 0.6 then FactoroAiN = 800 x 0.6 / 600 = 0.8
This means that gain of the LED drivers must be multiplied by 0.8 (i.e. reduced) to provide the target power reduction factor of 0.6. It should be noted that it is not desirable to increase the power when displaying dark images, therefore a formula should also be applied that prevents FactorGAiN from having a value greater than 1.
The gain factor should be applied at a suitable stage in the signal path to provide the desired effect at a suitable time. The process of measuring pixel values and calculating the gain factor for a field of incoming image, actually takes a duration of one field to complete. Therefore, the calculated gain factor actually relates to the field just passed i.e. it is one field in arrears. To correctly apply the gain factor, the image signal may be delayed by one field, or by the amount of time it takes to process the image signal, between analysis 510 and application 520 as shown in the block diagram 500 in Fig. 5. Thus, the analyzed signal from the FPGA 430 corresponds to the signal being displayed on the screen 440 by the LEDs 480 due to the field delay 530 of the signal from the FPGA 430 to the LEDs 480.
The ideal point in the signal path to apply the gain factor is at the color correction stage 470 shown in Fig 4. It is here that various modifications to image RGB levels are normally carried out to provide, e.g., correct white balance and color uniformity. There is also the benefit that, at this point, inherent time delays in data- processing (due to DPC analysis 510 shown in Fig. 5) are likely to equate to one field duration, and thus be properly taken into account by the delay 530 of Fig. 5. This results in the gain factor being applied to the correct field of data on which it is based (i.e., proper timing), rather than on data from the following field, thus eliminating transient PSU overloads. There may be practical difficulties in applying the gain factor at the color correction stage 470, caused by the fact that this stage is normally physically spread out across the entire area of the screen; therefore applying it to all screen areas simultaneously may prove difficult. Accordingly, an easier albeit less effective stage to apply the gain factor is downstream of the data analysis stage in the same FPGA 430 where content analysis is carried out. This has the benefit of providing easy access to the data stream, but has the disadvantage of the gain factor being applied to the field of data following that to which it applies. This theoretical disadvantage is in practice virtually unnoticeable to the viewer. The transient PSU overloads which may be theoretically caused are of short (e.g., one field) duration and normally easily handled by the PSUs without a problem.
The effects of DPC have been demonstrated using the following parameters shown in Table 1, where an LED screen with pixel resolution 256x144 pixels has been fitted with DPC and the following measurements noted in Table 1, which shows a comparison of values with and without DPC.
TABLE 1
Figs. 6-8 show graphs of quantity of rows of pixels illuminated on screen (256 pixels per row) on the x-axis, versus the main supply current in amperes AC on the y-axis, where the middle vertical dotted line is the DPC threshold, and the right dotted line is the line where all the rows are illuminated, i.e., the entire screen is driven. In particular, Fig. 6 shows a curve 600 of measured screen mains current versus size of illuminated zone area showing the effect of DPC when all zones driven, under the following conditions: plain white test pattern; all zones driven; screen size 256x144 pixels (h x v); mains current measured with A. C. current transducer; and Mains voltage of235 V A.C.
Fig. 7 shows a curve 700 of measured PSU output current versus size of illuminated zone area showing the effect of DPC when one is zone driven, under the following conditions: plain white test pattern; only one zone driven; zone size 32x144 pixels (h x v); and PSU current measured with D. C. current transducer. Fig. 8 shows a curve 800 of measured light output of a small area of screen versus size of illuminated zone area, showing the effect of DPC when one zone driven, under the following conditions: plain white test pattern; one zone driven; zone size 32x144 pixels (h x v); and light output measured with Minolta CS-100 Chroma Meter at 5 meters. It should be noted that the light output per pixel is dependent on the LED temperature.
Virtual zone analysis is an alternative implementation of DPC zoning. The above described methods involving zones of fixed locations, work well with most image material. There are, however, instances in which bright graphic images that are tracking slowly around the screen may cause DPC to become noticeable to a viewer of the content or image displayed on the screen.
Fig. 9 shows a system 900 with a screen 910 divided into 8 zones with large, bright graphic objects, e.g., content image portion or graphic object 920 tracking or moving across the screen 910 from position A to position B. As in Fig 2, the screen 910 is divided into eight equal full-height zones 1-8. However, in the situation where a large, bright graphic object 920 is slowly tracked or moved across the screen 910, then there might be times, e.g., at position A, when the object 920 virtually fills a zone, e.g., zone 7, perhaps causing DPC to reduce the overall image brightness such as when the total pixel brightness of zone 7 is larger than the DPC threshold value. There might be other times, e.g., when the object 920 is at position B, when object 920 is spread across two zones, e.g., zone 4 and 5, which may not cause DPC to reduce overall brightness, since the total pixel brightness of any one zone is less than the DPC threshold value.
As the graphic object 920 moves, the effect of DPC is to slowly pulsate the brightness of the entire screen, up and down. This effect may be eliminated by employing virtual zone analysis. As before, virtual zone analysis involves analyzing each 32x144 pixels zone 1-8 and ascertaining the zone which has the greatest luminance sum. However, rather than using only the eight zones directly linked to their own PSUs, virtual zone analysis looks at every possible 32x144 (h x v) zone that can exist within the entire screen.
Fig. 10 shows a system 1000 configured to use the concept of virtual zone analysis. The first analysis looks at the leftmost 32x144 pixels area of the screen 1010 (section 1020 as virtual zone 1) and calculates the total luminance sum of this virtual zone 1 same as that for fixed zones. The second analysis moves the virtual zone one pixel to the right (section 1030 as virtual zone 2) and again calculates the total luminance sum of this virtual zone. The third analysis moves the virtual zone one more pixel to the right and so on. The process repeats until the right side of the screen is reached as shown by section 1040 of the screen 1010 which is virtual zone 225. In this example where the screen 910 is 144 pixels by 256 pixels and each zone having a 32x144 pixels area is progressively moved by one pixel, there would be a total of 225 virtual zones. The total pixel luminance sums of the 225 virtual zones are compared to each other to determine the zone having the greatest sum, and the greatest sum is used in the same way as before, to calculate the gain factor and apply DPC.
Compared to fixed zone locations, this method of virtual zone analysis has the advantage of removing the undesirable pulsating effects described in our example, but has the disadvantage of yielding a lower average screen brightness.
Various modifications may also be provided as recognized by those skilled in the art in view of the description herein. The operation acts of the present methods are particularly suited to be carried out by a computer software program. The application data and other data are received by the controller or processor for configuring it to perform operation acts in accordance with the present systems and methods. Such software, application data as well as other data may of course be embodied in a computer-readable medium, such as an integrated chip, a peripheral device or memory, such as the memory or other memory coupled to the processor.
The computer-readable medium, the memory, and/or any other memories may be long-term, short-term, or a combination of long- and-short term memories. These memories configure the processor/controller to implement the methods, operational acts, and functions disclosed herein. The memories may be distributed or local and the processor, where additional processors may be provided, may be distributed or singular. The memories may be implemented as electrical, magnetic or optical memory, or any combination of these or other types of storage devices.
The processor and the memories may be any type. The processor may be capable of performing the various described operations and executing instructions stored in the memory. The processor may be an application-specific or general-use integrated circuit(s). Further, the processor may be a dedicated processor for performing in accordance with the present system or may be a general-purpose processor wherein only one of many functions operates for performing in accordance with the present system. The processor may operate utilizing a program portion, multiple program segments, or may be a hardware device utilizing a dedicated or multi-purpose integrated circuit.
Finally, the above-discussion is intended to be merely illustrative of the present system and should not be construed as limiting the appended claims to any particular embodiment or group of embodiments. Thus, while the present system has been described in particular detail with reference to specific exemplary embodiments thereof, it should also be appreciated that numerous modifications and alternative
embodiments may be devised by those having ordinary skill in the art without departing from the broader and intended spirit and scope of the present system as set forth in the claims that follow. The specification and drawings are accordingly to be regarded in an illustrative manner and are not intended to limit the scope of the appended claims. In interpreting the appended claims, it should be understood that: a) the word "comprising" does not exclude the presence of other elements or acts than those listed in a given claim; b) the word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements; c) any reference signs in the claims do not limit their scope; d) several "means" may be represented by the same or different item or hardware or software implemented structure or function; e) any of the disclosed elements may be comprised of hardware portions (e.g., including discrete and integrated electronic circuitry), software portions (e.g., computer programming), and any combination thereof; f) hardware portions may be comprised of one or both of analog and digital portions; g) any of the disclosed devices or portions thereof may be combined together or separated into further portions unless specifically stated otherwise; and h) no specific sequence of acts or steps is intended to be required unless specifically indicated.