EP2091303A2 - Appareil de montage simple télécommandé pour lampes fluorescentes - Google Patents

Appareil de montage simple télécommandé pour lampes fluorescentes Download PDF

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Publication number
EP2091303A2
EP2091303A2 EP08021494A EP08021494A EP2091303A2 EP 2091303 A2 EP2091303 A2 EP 2091303A2 EP 08021494 A EP08021494 A EP 08021494A EP 08021494 A EP08021494 A EP 08021494A EP 2091303 A2 EP2091303 A2 EP 2091303A2
Authority
EP
European Patent Office
Prior art keywords
circuit
ballast according
ballast
clock signal
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP08021494A
Other languages
German (de)
English (en)
Other versions
EP2091303A3 (fr
Inventor
Manfred Abele
Stefan Raithel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vossloh Schwabe Deutschland GmbH
Vossloh Schwabe GmbH
Original Assignee
Vossloh Schwabe Deutschland GmbH
Vossloh Schwabe GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vossloh Schwabe Deutschland GmbH, Vossloh Schwabe GmbH filed Critical Vossloh Schwabe Deutschland GmbH
Publication of EP2091303A2 publication Critical patent/EP2091303A2/fr
Publication of EP2091303A3 publication Critical patent/EP2091303A3/fr
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/26—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
    • H05B41/28—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
    • H05B41/282—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices
    • H05B41/2825—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage
    • H05B41/2828—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage using control circuits for the switching elements

Definitions

  • the invention relates to a ballast for the operation of fluorescent lamps.
  • Fluorescent lamps must be operated on ballasts which ensure the ignition and operation of the fluorescent lamp.
  • the related problems are known. Fluorescent lamps are gas discharge lamps. To ignite, they require a sufficiently high voltage. In addition, they usually have heated coils, which are to preheat starter relief. In operation, they have a negative internal resistance. As the lamp current increases, the lamp voltage decreases. Ballasts must therefore have a current-limiting characteristic.
  • ballasts In addition to simple ballast reactors, which serve to limit the current drawn from the AC mains, free-running ballasts have become established.
  • the voltage taken from the grid is rectified and converted by a high frequency free-running inverter into an AC voltage for operation of the fluorescent lamp.
  • the resulting frequency of oscillation of the inverter depends on various conditions such as lamp power, lamp age, lamp temperature, etc. This makes troubleshooting measures difficult.
  • ballasts have been developed which operate the fluorescent lamp at a fixed frequency. To ignite this frequency is usually changed, but otherwise it is constant. This leads to well controllable conditions with regard to the suppression of the ballast and the lamp.
  • ballasts usually contain a special integrated circuit that realizes the functions of the ballast.
  • the ballast according to the invention uses for driving the half-bridge inverter an integrated drive circuit, which does not take over the clock generation.
  • the clock generation is incumbent on a clock generator circuit with at least one inverting gate with a hysteresis switching characteristic. It generates a clock signal which is converted by an inverting gate into an inverted clock signal. Both clock signals, ie the inverted and the non-inverted clock signal are respectively supplied via an RC low-pass driver circuit.
  • the RC low-pass filter can be easily adapted to desired conditions by appropriate dimensioning of its time constant. In conjunction with the switching threshold of the input of the connected Driver circuit, the two RC low-pass filters generate a time interval between the trailing edge of the clock signal and the leading edge of the inverted clock signal.
  • a hysteresis-prone gate which generates square-wave voltages with a surprisingly stable frequency in a simple RC circuit.
  • a frequency-determining device is for example an RC low-pass into consideration, with which the output signal of the gate is coupled back to its input. By simply switching capacitors or resistors of this RC low pass different frequencies, for example, for the ignition operation and for the regular operation of the fluorescent lamp can be set.
  • the ignition operation of the ballast can be initiated via a simple monoflop, which is triggered when switching on the operating voltage of the ballast.
  • the monoflop circuit can be used to switch the frequency of the clock generator circuit from one frequency to another.
  • the monoflop circuit preferably comprises a gate, wherein its output signal or also its output signal, which is inverted via a further gate, for switching over a frequency-determining capacitor can be used.
  • the clock generator circuit may also include an input / disable input.
  • the enable / disable circuit is formed by two interconnected inputs of the two gates, one of which is the clock generator circuit and the other is the downstream inverting gate for generating an inverted clock signal.
  • the enable / disable input can be used to implement various safety functions on the ballast. For example, voltage monitoring, current monitoring, rectifier effect monitoring or the like may be provided.
  • the corresponding monitoring circuit is connected to the lamp branch and blocks the clock generation circuit as soon as and as far as there is an error.
  • the ballast according to the invention does not require any complicated or expensive special components. It can be manufactured with very little effort and, for example, just as cheap as a freely oscillating ballast, but it works with a defined frequency. It can thus be mastered interference frequencies occurring better. Also, the vote on different lamp types is easier than free-swinging ballasts.
  • FIG. 1 is a ballast 1 illustrated, which is set up for network operation, but if necessary, can also be used for battery operation.
  • a mains rectifier 2 is provided whose Störschutzbesciens is not illustrated.
  • the power rectifier 2 supplies at its output an intermediate circuit voltage which is applied to a corresponding line 3.
  • the negative output terminal of the mains rectifier 2 is in FIG. 1 denoted by A. It is connected to ground 5 via a diode compensator combination 4.
  • To the diode capacitor combination 4 includes two series-connected diodes 6, 7 with anode each at the ground-side end.
  • the lower-side in the series circuit diode 7 is bridged by a capacitor 8.
  • Another capacitor 9 connects the anode of the upper diode 6 with the intermediate circuit voltage on line 3rd
  • an inverter 10 is also connected, which has two suitable transistors 11, 12, for example, field effect transistors.
  • the transistors 11, 12 form electronic switches.
  • the inverter output is formed by a connection point 13, in which the two transistors 11, 12 are connected to each other.
  • the inverter output 13 is connected both to a lamp branch 14 which contains a fluorescent lamp 15 and to a power factor correction circuit 16 which converts the voltage present on the inverter output to capacitors 17, 18 and at the same time to ensure that the current flowing to the mains rectifier 2 is present does not deviate too much from the sinusoidal shape.
  • the power factor correction circuit 16 includes an inductor 19 which connects the connection point 13 via two diodes to the capacitors 17, 18, one of which (17) is connected to the line 13 and the other (18) to ground. Further Diodes connect the capacitors 17 and 18 then still each with ground or DC link voltage.
  • the lamp branch 14 includes a coupling capacitor 20 which connects a current limiting inductor 21 to the connection point 13.
  • the current limiting inductor 21 leads to an electrode 22 of the fluorescent lamp 15.
  • the opposite electrode 23 leads to the connection point between the two diodes 7, 8.
  • the electrodes 22, 23 are interconnected by a firing capacitor 24.
  • a driver circuit 25 For driving the two transistors 11, 12 is a driver circuit 25, which is designed as an integrated circuit. For example, a circuit that is available under the name FAN7380W is used. It has driver outputs Ho, Lo for the gate electrodes of the two transistors 11, 12. In addition, it has an input v s , via which it is connected to the connection point 13. Via an operating voltage input v b , it is connected to a low operating voltage of 10 to 15 volts, 12 volts in the present embodiment. The inputs v b and v s are connected to each other via a capacitor 26. In operation, the input v b b receives its operating voltage via a rectifier circuit 27 whose input is connected to the connection point 13. It can be designed as a Villard circuit.
  • the operating voltage line is indicated by a small cross.
  • a start-up circuit 28 with a high-impedance resistor 29 and a series-connected diode 30, as Half-wave rectifier is used.
  • the start-up circuit 28 is connected on the input side to the mains alternating voltage and thus derives the operating voltage for operating the drive circuit 25 from the AC line voltage as long as the inverter 10 is not working.
  • the starting circuit 28 may optionally be provided with a further branch 28a, which connects the cathode of the diode 30 via one or more relatively high-resistance resistors to the line 3.
  • a further branch 28a which connects the cathode of the diode 30 via one or more relatively high-resistance resistors to the line 3.
  • the clock generator with discrete transistors.
  • a clock generator for example, find an A-stable flip-flop application.
  • the in the FIGS. 1 and 4 however, the illustrated clock generator circuit is preferred.
  • the resistor 29 may be a simple ohmic resistor. However, it is also possible to use in its place a thermistor, which is heated by the current flowing through it and high resistance after a short time.
  • the thermal inertia of the thermistor is preferably such that it becomes high-impedance as soon as the inverter 10 is operating and the auxiliary voltage generation thus takes place via the rectifier circuit 27.
  • the starting circuit 28 can thus, as mentioned, be permanently active or be active by suitable means only when switching on the ballast.
  • a device suitable for switching off is also, for example, a reed contact lying in series with the diode 30, the magnetic coil of which a charging current surge of a capacitor can be energized, for example, then connects this coil with the line 3.
  • the ballast after FIG. 1 comprises a clock generating circuit 31 having at least one gate with hysteresis characteristic.
  • this is a Schmitt trigger NAND gate 32.
  • the NAND gate 32 has two inputs and one output. The output is connected via a frequency-determining device in the form of an RC circuit 33 to one of the inputs.
  • the RC circuit 33 has at least one resistor 34 which connects the output of the gate 32 to its input. This input is connected via at least one, in the present embodiment, two capacitors 35, 36 connected in series with each other.
  • the clock generator thus formed outputs a square wave signal at its output. This is also fed to the output of a second similar Schmitt trigger NAND gate 37. It generates an inverted clock signal at its output.
  • the other two inputs of the gates 32, 37 are interconnected and set, for example, to operating voltage. In the present embodiment, however, they form an enable / disable input which, when grounded, disables the operation of the clock generator and sets both clock signals to one.
  • the outputs of the two gates 32, 37 are each connected via RC low-pass filters 38, 39 to corresponding inputs Lin, Hin of the driver circuit 25.
  • the low-pass filters 38, 39 each comprise at least one resistor and a capacitor connected to ground.
  • the time constant is preferably the same for both low passes 38, 39. Preferably, it is in the range of 0.01 ⁇ sec. to 10 ⁇ sec, more preferably in the range of 0.1 ⁇ sec. to 1 ⁇ sec. and 0.56 in the present embodiment .mu.sec.
  • the time constant is tuned to the inverter 10 to set the period of time during which neither one nor the other conducts when switching the transistors 11, 12.
  • a simple adaptation to the idle times or shutdown times of the transistors 11, 12 can be made via the low-pass filters 38, 39.
  • the clock generating circuit 31 is preferably connected to a monoflop 40, which is based on at least one, but preferably two gates 41, 42, the design of the type of the gates 32, 37 matches.
  • the gates 32, 37, 41, 42 may thus be formed by a single standard integrated circuit.
  • the output of gate 42 is, for example, an open collector output. It may then be connected to the connection point between the capacitors 35, 36 in order to short-circuit the capacitor 36 as needed. If the gate output is not an open collector output, the capacitor 36 may be connected in parallel with a corresponding transistor which is controlled by the gate 42. Alternatively, a decoupling diode may be provided between the output of the gate 42 and the capacitor 36.
  • the monoflop circuit 40 includes an operating voltage connected resistor 43 and a grounded capacitor 44 whose connection point goes to an input of the gate 41. After switching on the operating voltage passes a certain time, which is determined by the charging time of the capacitor 44, after which the output of the gate 42 goes to zero. While previously the series connection of the capacitors 35, 36 was the frequency-determining element of the clock generating circuit 31, it is now only the capacitors 35. The frequency thus goes from a higher ignition frequency (preheating the lamp above the resonant frequency) to a lower operating frequency (eg Resonant frequency) via.
  • a monoflop circuit 40 'application contains a transistor T in the emitter circuit, the base of which is optionally connected via a series resistor R to a capacitor C.
  • the capacitor is grounded with its other leg. It receives charging current via a voltage divider ST and via the starting circuit 28 or the low-voltage supply of the circuit.
  • the transistor T is only a defined period of time after switching on the operating voltage conductive, so that it bridges the capacitor 36 only after the expiration of the given period of time.
  • the basic components of the present ballast 1 are described. However, it may include other components including, for example, a helix detection circuit 45.
  • the helix detection circuit 45 is eg via a in FIG. 1 dotted path, comprising a plurality of resistors 46, 47 connected in series, is connected to one end of the electrode 23. Occurs by Wendelbruch or the like at the input of the coil detection circuit 45 an inadmissible voltage, it sets the enable / disable input of the clock generating circuit 31 to ground and thus blocks the operation of the inverter 10th
  • a restart circuit 46 which detects the insertion of a lamp into the socket when the operating voltage is applied and then briefly short circuits the auxiliary operating voltage of 12 volts. This resets the monoflop circuit 40 and initiates the ignition of the lamp.
  • a further monitoring circuit 47 can be provided, which at a suitable point the voltage at the fluorescent lamp 15 picks up. If this leaves the allowable limits for more than a given period of time, a self-holding circuit, such as a thyristor or a thyristor replacement circuit and a similar electrical circuit is set in its conductive state to short-circuit the auxiliary operating voltage. The ballast is then disabled until the next power up.
  • a self-holding circuit such as a thyristor or a thyristor replacement circuit and a similar electrical circuit is set in its conductive state to short-circuit the auxiliary operating voltage. The ballast is then disabled until the next power up.
  • the ballast 1 described so far operates as follows:
  • the gates 41, 42, 32, 37 and the driver circuit 25 receive operating voltage via the starting circuit 28.
  • the monoflop circuit 40 is initially in its first unstable state and is thus at its output (open collector output) high impedance.
  • the clock generating circuit 31 thus operates at a high frequency.
  • the driver circuit 25 controls the transistors 11, 12 accordingly. It starts on the one hand, the operating voltage generation for the supply voltage of the gates and the driver circuit and the preheating of the lamp 15. To ignite the same is switched to a lower frequency.
  • the throttle 21 and the capacitor 24 resonate. The result is a heating current to the electrodes 22, 23 and a high ignition lamp voltage.
  • the clock generating circuit 31 now operates at a lower operating frequency. It generates on the lines 48, 49 clock signals that are precisely inverse to each other. This is in FIG. 2 illustrates, where the signals indicated by the reference number of their line are. These mutually inverse clock signals are now passed through the RC low-pass filters 38, 39. The resulting time deviations deviating from the rectangular edges are in FIG. 2 entered dashed. They go through switching thresholds S at the inputs Lin and Hin of the driver circuit 25 at slightly different times. This is evident FIG.
  • the approximately exponential time courses are shown separately dashed behind the RC low-pass filters. It thus arises between the times at which the signals L and H switch in the driver circuit 25, a time offset .DELTA.t.
  • the size thereof can be regulated by the time constant ⁇ set by the low-pass filters 38, 39, respectively.
  • tau ie the product of resistor and capacitor of the RC low-pass filter 38, is 0.56 ⁇ sec.
  • the RC low-pass filter 39 preferably has the same time constant. In individual cases, it may also be expedient to choose the time constants differently.
  • the inverter 10 operates at the predetermined frequency of the clock generating means 31. If the transistor 11 switches off, the time ⁇ t elapses until the transistor 12 receives its switch-on signal and vice versa. As a result, the inverter half-bridge 10 can be operated with low losses with a relatively high switching frequency. The circuit complexity to achieve the controlled lamp operation is extremely low.
  • the ballast 1 can be built only with readily available standard components. The circuit is simple.
  • a ballast for fluorescent lamps uses for clock generation and control of the inverter 10 consisting of a few gates logic circuit in conjunction with an integrated driver circuit 25. To set a sufficient margin of safety between the individual Turn-on pulses of the transistors 11, 12 of the inverter 10 are used between the constructed of standard gates clock generating circuit 31 and the driver circuit 25 low passes.

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  • Circuit Arrangements For Discharge Lamps (AREA)
EP08021494A 2008-02-14 2008-12-11 Appareil de montage simple télécommandé pour lampes fluorescentes Ceased EP2091303A3 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE200810009078 DE102008009078A1 (de) 2008-02-14 2008-02-14 Einfaches fremdgesteuertes Vorschaltgerät für Leuchtstofflampen

Publications (2)

Publication Number Publication Date
EP2091303A2 true EP2091303A2 (fr) 2009-08-19
EP2091303A3 EP2091303A3 (fr) 2011-03-30

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EP08021494A Ceased EP2091303A3 (fr) 2008-02-14 2008-12-11 Appareil de montage simple télécommandé pour lampes fluorescentes

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EP (1) EP2091303A3 (fr)
DE (1) DE102008009078A1 (fr)
RU (1) RU2009105150A (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0766499A1 (fr) * 1995-09-27 1997-04-02 STMicroelectronics S.r.l. ContrÔle du déroulement de différentes phases dans un circuit de démarrage
US5723953A (en) * 1996-09-19 1998-03-03 General Electric Company High voltage IC-driven half-bridge gas discharge lamp ballast
EP0835044A2 (fr) 1996-10-01 1998-04-08 General Electric Company Ballast avec fonction de préchauffage des cathodes
US6002213A (en) 1995-10-05 1999-12-14 International Rectifier Corporation MOS gate driver circuit with analog input and variable dead time band

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0059064B1 (fr) * 1981-02-21 1985-10-02 THORN EMI plc Circuit de démarrage et d'exploitation de lampes
AU2001275494A1 (en) * 2000-06-19 2002-01-02 International Rectifier Corporation Ballast control ic with minimal internal and external components
DE10229633A1 (de) * 2002-07-02 2004-01-29 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Ansteuerung für einen Halbbrückenwechselrichter
KR101197512B1 (ko) * 2005-12-02 2012-11-09 페어차일드코리아반도체 주식회사 안정기 집적회로

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0766499A1 (fr) * 1995-09-27 1997-04-02 STMicroelectronics S.r.l. ContrÔle du déroulement de différentes phases dans un circuit de démarrage
US6002213A (en) 1995-10-05 1999-12-14 International Rectifier Corporation MOS gate driver circuit with analog input and variable dead time band
US5723953A (en) * 1996-09-19 1998-03-03 General Electric Company High voltage IC-driven half-bridge gas discharge lamp ballast
EP0835044A2 (fr) 1996-10-01 1998-04-08 General Electric Company Ballast avec fonction de préchauffage des cathodes

Also Published As

Publication number Publication date
DE102008009078A1 (de) 2009-08-27
RU2009105150A (ru) 2010-08-20
EP2091303A3 (fr) 2011-03-30

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