EP2052319A1 - Vorrichtung und verfahren zur erzeugung von zufallsbitfolgen - Google Patents
Vorrichtung und verfahren zur erzeugung von zufallsbitfolgenInfo
- Publication number
- EP2052319A1 EP2052319A1 EP07805161A EP07805161A EP2052319A1 EP 2052319 A1 EP2052319 A1 EP 2052319A1 EP 07805161 A EP07805161 A EP 07805161A EP 07805161 A EP07805161 A EP 07805161A EP 2052319 A1 EP2052319 A1 EP 2052319A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- diode
- breakdown
- voltage
- diodes
- bit string
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/588—Random number generators, i.e. based on natural stochastic processes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
- H04L9/0866—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S40/00—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them
- Y04S40/20—Information technology specific aspects, e.g. CAD, simulation, modelling, system security
Definitions
- the present invention relates to a device and a method for generating a bit string, in particular a bit string representing a cryptographic key or a unique identifier.
- a chip is provided with such identifiers/keys in a separate process, after manufacture of the chip itself.
- One method is to set the value of what are called "fuses”.
- Another method is to equip the chip with an additional EEPROM into which the identifier/key can be written.
- bit strings stored by means of these methods can be read out rather easily, which is problematic especially if the bit string is to be used as a secret key.
- bit strings should not be derived from stored values, but from some physical property of the chip itself, such as resistances, conductances, capacitances or delay times (cf. R. Posch, Protecting Devices by Active Coating, Journal of Universal Computer Science, vol.4, no.7 (1998), pp.652-668; B. Gassend, D. Clarke, M. van Dijk, S. Devadas, Silicon Physical Random Functions, Proc. 9th ACM Conf. on Computer and Communications Security, Nov. 2002).
- Such a physical property is sometimes called a Physical Uncloneable Function (PUF) or a Physical Random Function if the property is to some extent uncontrollable during manufacture of the relevant device.
- PAF Physical Uncloneable Function
- the lack of controllability is advantageous because it allows deriving a bit string from a value of the property which is random and unique with a very high probability.
- PUFs has advantages over the above methods in that: the production cost may be reduced, - it is hard for an attacker to read the values of the relevant physical parameters from "outside" the chip, a chip virtually cannot be cloned even if an attacker has obtained the secret key or the identifier, and a PUF provides some inherent tamper detection, as many types of probing attacks will measurably influence the relevant physical parameters from which the bit string is derived.
- a device for generating a bit string which comprises: - at least one diode, connectors connected to said at least one diode for applying a voltage to said at least one diode, and a diode breakdown processor connected to said at least one diode for detecting a breakdown of said at least one diode resulting from a voltage applied to said at least one diode, which exceeds a breakdown voltage of said at least one diode, and for generating said bit string on the basis of said detection of said breakdown.
- an apparatus which - in contrast to the device described above - does not comprise any diodes itself, for generating a bit string
- a method of generating a bit string comprises the steps of applying a voltage to at least one diode, which exceeds a breakdown voltage of said at least one diode, - detecting a breakdown suffered by said at least one diode resulting from the application of said voltage, and generating a bit string on the basis of said detection of said breakdown.
- Another aspect of the present invention includes a computer program comprising program code means for causing a device or an apparatus according to the present invention to carry out the steps of the method according to the present invention when said computer program is carried out on said device or said apparatus.
- the computer program might itself completely contain the program code for implementing all the steps of the corresponding method in software, or might simply be a short script or link that refers to or makes use of such a complete computer program.
- a further aspect of the present invention includes the use of a diode for generating a bit string, wherein the bit string is generated on the basis of a breakdown of the diode resulting from a voltage applied to said diode, which exceeds a breakdown voltage of said diode.
- Preferred embodiments of the invention are defined in the dependent claims. It will be understood that the device, the apparatus, the method and the computer program of the present invention have similar and/or identical preferred embodiments as defined in the respective dependent claims.
- the invention is based on the insight that the circumstances of a breakdown of a diode are complex enough for the diode suffering a breakdown to be used as a physical uncloneable function (PUF) or physical random function, because the exact voltage value at which a breakdown would occur is virtually uncontrollable during manufacture and virtually impossible to predict by ordinary inspection of the diode.
- a plurality or an array of diodes exhibits an even more complex behavior resulting in a larger variety of responses to challenges given to the diodes.
- a diode breakdown is not only a complex and virtually unpredictable event (in its exact value) but may also be easily detected by simple means of common integrated circuits.
- the present invention relates to generating a bit string based on the circumstances of a breakdown of a diode or a number of diodes.
- One or more diodes are provided with a voltage exceeding a breakdown voltage of the diodes, which are connected to a diode breakdown processor detecting the breakdown and, optionally, relevant circumstances like an exact breakdown voltage and generates a bit string based on the detection of this breakdown.
- the bit string may be used as a unique identifier or as a secret key.
- the present invention provides the advantageous effect that additional components and sensors for embodying such a PUF and, if necessary, for reading out the PUF are inexpensive and easy to handle.
- the PUF consists of components that are already present in the chip.
- a PUF having an entropy (information content) which is large enough to be able to derive sufficiently long bit strings (e.g. 40 bits for an identifier; 128 bits for an AES key) can be obtained, so that an attacker will not be able to guess the bit string.
- bit strings e.g. 40 bits for an identifier; 128 bits for an AES key
- electromagnetic emissions, power consumption, and other "side channels" during a PUF measurement of a chip in which the invention is implemented do not enable an attacker to derive the bit string, which is particularly useful if the bit string represents a secret (key).
- Fig. 1 shows a first embodiment of a device according to the present invention
- Fig. 2 shows a second embodiment of a device according to the present invention, together with an external voltage source
- Fig. 3 shows a third embodiment of a device according to the present invention, together with an external voltage source
- Fig. 4 shows a first embodiment of an apparatus according to the present invention, together with an external plurality of diodes
- Fig. 5 shows a second embodiment of an apparatus according to the present invention, together with an external plurality of diodes and an external voltage source
- Fig. 6 is a flow chart of a method according to the present invention.
- Fig. 1 shows a first embodiment of a device 10 according to the present invention.
- the device 10 comprises a diode 11, a diode breakdown processor 13 and a voltage source 15.
- the diode 11 is connected with the voltage source 15 via connectors 12 and the diode breakdown processor 13, which is arranged parallel to diode 11, is also connected to these connectors 12.
- the voltage source 15 is adapted to apply a voltage in reverse bias direction to diode 11. As long as the voltage applied to diode 11 is lower than its breakdown voltage, this diode 11 is non-conducting and no or only a small current will flow. Once the voltage applied to diode 11 exceeds its breakdown voltage, this diode 11 will break down and a (larger) current will flow.
- the diode breakdown processor 13 detects a breakdown of diode 11 and, based on this detection, a bit string is generated by breakdown processor 13.
- the voltage at which the breakdown occurred is detected and serves as a basis for generating the bit string.
- the diode breakdown processor 13 then outputs this generated bit string. Since the bit string is derived from a characteristic of diode 11, which is unique to this diode 11, the generated bit string may serve as an identifier of the device 10.
- a number of different ways and methods for detecting a breakdown are known to the skilled person and a detailed description of the diode breakdown processor 13 may therefore be omitted here.
- a dedicated circuit may be used, which is able to detect the breakdown by detecting the (increased) current flowing through the diode 11 at a breakdown, as well as a general purpose integrated circuit or processor connected to the diode 11 in a suitable way.
- Changing the state of a flip-flop (e.g. included in the diode breakdown processor 13) may be used for recording a diode breakdown.
- Fig. 2 shows a second embodiment of a device 20 according to the present invention together with an external voltage source 25.
- the device 20 comprises a plurality of diodes 21 which are arranged in parallel, a diode breakdown processor 23, a plurality of resistors 27 and two connectors 22.
- the diode breakdown processor 23 is arranged in series with the plurality of diodes 21 and is connected separately to each diode 21 of this plurality.
- a resistor 27 of the plurality of resistors 27 is arranged in series with each diode, each resistor having a resistance of 1 M ⁇ .
- a line is formed from one connector 22 through the breakdown processor 23, the plurality of diodes 21 and the plurality of resistors 27 to the other connector 22.
- the device 20 is connected to a controllable voltage source 25 via the connectors 22.
- the external voltage source 25 provides a voltage to the connectors 22 and thus to the plurality of diodes 21 in reverse bias direction.
- the voltage is controlled to rise from a lower voltage value to a higher voltage value.
- breakdown voltages of diodes 21 of the plurality of diodes 21 are reached and exceeded, wherein the order in which the diodes 21 suffer a breakdown depends on their respective breakdown voltages.
- the occurrence of a breakdown in a diode 21 is detected by the diode breakdown processor 23 and, based on this detection, a bit string is generated. Since the diode breakdown processor 23 is connected separately with each diode 21, the occurrence of a breakdown can be related to the particular diode 21 in which the breakdown occurred.
- the diode breakdown processor 23 generates the bit string based on the detected order.
- two diodes 21 are considered to form a pair of diodes leading to four pairs of diodes 21.
- a respective bit of a four-bit string is set or not set.
- the voltage sweep is no sweep in the normal sense but is reduced to a single voltage which is applied to said plurality of diodes 21.
- the lower voltage value and the higher voltage value are the same and there is no detectable order in which the diodes suffer a breakdown.
- some diodes will suffer a breakdown and the others will not.
- the result of this single- voltage "sweep" also forms a suitable basis for generating a bit string.
- the plurality of diodes comprises eight diodes.
- the number of diodes in the plurality of diodes may also be any other number depending on the size of the bit string to be generated and the way of generating the bit string based on the breakdown of diodes. This also applies to other embodiments of the present invention described herein.
- the resistors 27 have a resistance of 1 M ⁇ , but they may of course have a different resistance (preferably at least 100 k ⁇ ) which, if necessary, ensures that the current flowing through a diode during or after breakdown is small enough to avoid damage.
- Other ways of controlling the current known to the skilled person may be used instead or additionally.
- a device according to the invention may be capable of, or to limit the number of times a diode may be used for generating a bit string to a given number.
- the order in which different components are arranged in a serial connection is not important for the present invention. A different order of arrangement may be chosen for implementing the present invention.
- the external voltage source 25 is adapted to provide a predetermined voltage sweep
- the diode breakdown processor 23 is adapted to detect a start of the predetermined voltage sweep and the times at which breakdowns occur in the plurality of diodes. Similar to the embodiment described above with reference to Fig. 2, it is not necessary in this alternative embodiment to measure the voltage at which a breakdown occurs, as, for generating a bit string depending on the breakdown characteristics of the plurality of diodes, it is sufficient to detect the order or time of the breakdowns.
- Fig. 3 shows a third embodiment of a device 30 according to the present invention, together with an external voltage source 35.
- the device 30 comprises a plurality of diodes 31 arranged in parallel, a diode breakdown processor 33, a voltage meter 36 arranged in parallel to the plurality of diodes 31 and a resistor 37.
- the device 30 further comprises two connectors 32, which are connected by the diode breakdown processor 33, the plurality of diodes 31 and the resistor 37 arranged in series, and a memory unit 38.
- the diode breakdown processor 33 is connected to a memory unit 38 for receiving data therefrom upon request.
- the diode breakdown processor 33 is further connected to the voltage meter 36 for receiving data on a voltage applied to the plurality of diodes 31.
- One of the diodes 31 of the plurality is a reference diode 31 '.
- the external voltage source 35 is connected to the device via the connectors 32. Furthermore, there is a data link between the external voltage source 35 and the diode breakdown processor 33.
- the external voltage source 35 is adapted to generate a voltage sweep ranging between a lower voltage and a higher voltage in accordance with a predetermined function of time, to apply this voltage sweep to the device 30 (and thereby to the plurality of diodes 31 within the device 30) and to transmit an indication of this voltage function of time to the diode breakdown processor 33.
- each diode 31 of the plurality of diodes 31 will suffer a breakdown during the voltage sweep, the time of which breakdown is detected by the diode breakdown processor 33.
- the voltage at which a breakdown occurred is detected by the voltage meter 36 and transmitted to the breakdown processor 33.
- the resistor 37 prevents that a current which is high enough to damage the diodes 31 flows through the diodes 31.
- the diode breakdown processor 33 has acquired data on the points of time at which breakdowns of diodes occurred (with reference to a starting time of the voltage sweep) and data on the voltages at which breakdowns occurred (measured by the voltage meter). Furthermore, a breakdown voltage of the reference diode 31 ' is stored in the memory unit 38 which also comprises helper data for use in a key-extraction algorithm. The helper data is acquired during an enrolment phase of the device and then stored in the memory unit 38.
- the diode breakdown processor 33 can calculate the actual breakdown voltages of the plurality of diodes 31 with a high accuracy compensating any noise factors from sources such as, for example, temperature fluctuations, external electromagnetic fields, mechanical pressure, radiation, moisture or vibrations.
- a bit string is then generated on the basis of the obtained breakdown voltages. The generation of this bit string will have a high reproducibility allowing very reliable use of this bit string as an identifier identifying the device 30.
- Fig. 4 shows an embodiment of an apparatus 40 according to the present invention, together with an external plurality of diodes 41.
- the apparatus 40 comprises a diode breakdown processor 43, a controllable voltage source 45 and a resistor 47 arranged in series with connectors 42 for connecting the external plurality of diodes 41.
- the external plurality of diodes 41 is comprised in a carrier unit 49.
- the operation of the complete arrangement is similar to that of the devices according to the invention described above. A further detailed description may therefore be omitted here.
- the main difference with the devices described above is that the plurality of diodes 41 is provided separately from the apparatus 40 comprising the diode breakdown processor 43. This allows replacement of the plurality of diodes by a different plurality of diodes.
- a carrier unit 49 comprising a plurality of diodes 41 having breakdown voltages which are intrinsically random in terms of their relative and absolute values may thus be used for transporting a (secret) key for cryptographic purposes.
- Fig. 5 shows a further embodiment of an apparatus 50 according to the present invention, together with an external plurality of diodes 51 and an external voltage source 55.
- the apparatus 50 comprises a diode breakdown processor 53 which is provided with five connectors 52.
- the diode breakdown processor 53 is separately connected via four of the connectors 52 to each diode of an external plurality of diodes 51, which are arranged in parallel.
- An external resistor 57 and an external voltage source 55 are connected in series with the external plurality of diodes 51, the external voltage source 55 being connected to the diode breakdown processor 53.
- Fig. 6 is a flow chart of a method according to the present invention.
- a voltage is applied to at least one diode wherein the voltage is higher than a breakdown voltage of this at least one diode, so that it suffers a breakdown.
- This breakdown is detected in a subsequent step 2, and a bit string is generated on the basis of the detection in a further step 3.
- bit string does not only refer to a series of symbols having two different values or states, like the commonly used series of "0" and “1”, but also to series of symbols having a larger variety of values, e.g. each symbol having three different states or values.
- an n-bit symbol can be obtained from each diode by first dividing the whole interval of possible breakdown voltages into 2 n equal-probability subintervals. These intervals are labelled 0,1, ... 2 n l .
- the breakdown voltage of one diode belongs to interval number x.
- the interval number x then is the PUF "response", which is an unpredictable n-bit value. It should be noted that the number of intervals does not have to be a power of 2 and that, instead of the voltage axis, the time axis can also be divided into intervals.
- breakdown and “breakdown voltage” are well understood by those skilled in the art. However, depending on the particular circumstances of an implementation of the present invention, it is possible to give these terms a different meaning. For example, instead of taking the voltage value at which a breakdown starts (which is hard to find exactly in some cases) as the breakdown voltage, a voltage value may also be taken as the "breakdown voltage" at which the current through the diode reaches or exceeds a selected value or at which the diode exhibits in reverse bias a predetermined differential resistance.
- a computer program may be stored/distributed on a suitable medium, such as an optical storage medium or a solid-state medium supplied together with or as part of other hardware, but may also be distributed in other forms, such as via the Internet or other wired or wireless telecommunication systems. Any reference signs in the claims should not be construed as limiting the claim.
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Storage Device Security (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP07805161A EP2052319A1 (de) | 2006-07-31 | 2007-07-16 | Vorrichtung und verfahren zur erzeugung von zufallsbitfolgen |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP06118182 | 2006-07-31 | ||
EP07805161A EP2052319A1 (de) | 2006-07-31 | 2007-07-16 | Vorrichtung und verfahren zur erzeugung von zufallsbitfolgen |
PCT/IB2007/052821 WO2008015603A1 (en) | 2006-07-31 | 2007-07-16 | Device and method for generating a random bit string |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2052319A1 true EP2052319A1 (de) | 2009-04-29 |
Family
ID=38782854
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07805161A Withdrawn EP2052319A1 (de) | 2006-07-31 | 2007-07-16 | Vorrichtung und verfahren zur erzeugung von zufallsbitfolgen |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP2052319A1 (de) |
JP (1) | JP2009545908A (de) |
CN (1) | CN101495957A (de) |
WO (1) | WO2008015603A1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007087559A2 (en) | 2006-01-24 | 2007-08-02 | Pufco, Inc. | Signal generator based device security |
CN101542496B (zh) | 2007-09-19 | 2012-09-05 | 美国威诚股份有限公司 | 利用物理不可克隆功能的身份验证 |
IL199272A0 (en) | 2009-06-10 | 2012-07-16 | Nds Ltd | Protection of secret value using hardware instability |
JP5474705B2 (ja) * | 2010-08-23 | 2014-04-16 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US20120137137A1 (en) * | 2010-11-30 | 2012-05-31 | Brickell Ernest F | Method and apparatus for key provisioning of hardware devices |
CN102523579B (zh) * | 2011-12-23 | 2014-09-10 | 东南大学 | 基于物理不可克隆功能的无线传感器网络及其实现方法 |
US9088278B2 (en) | 2013-05-03 | 2015-07-21 | International Business Machines Corporation | Physical unclonable function generation and management |
JP2017028354A (ja) | 2015-07-16 | 2017-02-02 | 渡辺 浩志 | 電子装置ネットワーク及びチップ認証方式 |
EP3377977A4 (de) | 2015-11-16 | 2019-08-21 | Arizona Board Of Regents Acting For And On Behalf Of Northern Arizona University | Mehrstufige unklonbare funktionen und zugehörige systeme |
US10469083B2 (en) | 2016-07-10 | 2019-11-05 | Imec Vzw | Breakdown-based physical unclonable function |
US20210026604A1 (en) * | 2018-03-21 | 2021-01-28 | Indian Institute Of Technology Bombay | System and method for generating random bit string in an integrated circuit |
US10685918B2 (en) * | 2018-08-28 | 2020-06-16 | Semiconductor Components Industries, Llc | Process variation as die level traceability |
GB2613989B (en) | 2019-05-15 | 2023-12-06 | Quantum Base Ltd | Alternative approach to the generation of a unique response to a challenge |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000066592A (ja) * | 1998-08-19 | 2000-03-03 | Syst Kogaku Kk | 乱数生成装置 |
HRPK20010751B3 (en) * | 2001-10-17 | 2005-06-30 | Stipčević Mario | Random bit generating device and method based on time summation of electronic noise source |
EP1513061B1 (de) * | 2003-09-04 | 2006-11-15 | Infineon Technologies AG | Vorrichtung zur Erzeugung eines Takt-Signals mit Jitter und zum Erzeugen von Zufallsbits |
US7472148B2 (en) * | 2004-07-23 | 2008-12-30 | Qualcomm Incorporated | Method and apparatus for random-number generator |
-
2007
- 2007-07-16 CN CNA2007800286806A patent/CN101495957A/zh active Pending
- 2007-07-16 EP EP07805161A patent/EP2052319A1/de not_active Withdrawn
- 2007-07-16 JP JP2009522382A patent/JP2009545908A/ja active Pending
- 2007-07-16 WO PCT/IB2007/052821 patent/WO2008015603A1/en active Application Filing
Non-Patent Citations (1)
Title |
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See references of WO2008015603A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2008015603A1 (en) | 2008-02-07 |
JP2009545908A (ja) | 2009-12-24 |
CN101495957A (zh) | 2009-07-29 |
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