EP1895705A3 - Taktsynchronisierung von Datenströmen - Google Patents

Taktsynchronisierung von Datenströmen Download PDF

Info

Publication number
EP1895705A3
EP1895705A3 EP07013138A EP07013138A EP1895705A3 EP 1895705 A3 EP1895705 A3 EP 1895705A3 EP 07013138 A EP07013138 A EP 07013138A EP 07013138 A EP07013138 A EP 07013138A EP 1895705 A3 EP1895705 A3 EP 1895705A3
Authority
EP
European Patent Office
Prior art keywords
data
bus
data streams
length
clock synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP07013138A
Other languages
English (en)
French (fr)
Other versions
EP1895705A2 (de
Inventor
Alex Escott
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
QNX Software Systems Wavemakers Inc
Original Assignee
QNX Software Systems Wavemakers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by QNX Software Systems Wavemakers Inc filed Critical QNX Software Systems Wavemakers Inc
Publication of EP1895705A2 publication Critical patent/EP1895705A2/de
Publication of EP1895705A3 publication Critical patent/EP1895705A3/de
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/005—Correction by an elastic buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
EP07013138A 2006-08-16 2007-07-04 Taktsynchronisierung von Datenströmen Withdrawn EP1895705A3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/504,948 US7657668B2 (en) 2006-08-16 2006-08-16 Clock synchronization of data streams

Publications (2)

Publication Number Publication Date
EP1895705A2 EP1895705A2 (de) 2008-03-05
EP1895705A3 true EP1895705A3 (de) 2009-01-21

Family

ID=38800837

Family Applications (1)

Application Number Title Priority Date Filing Date
EP07013138A Withdrawn EP1895705A3 (de) 2006-08-16 2007-07-04 Taktsynchronisierung von Datenströmen

Country Status (6)

Country Link
US (1) US7657668B2 (de)
EP (1) EP1895705A3 (de)
JP (1) JP2008048392A (de)
KR (1) KR20080015717A (de)
CN (1) CN101159531A (de)
CA (1) CA2593073C (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9007525B2 (en) * 2009-03-16 2015-04-14 Panasonic Intellectual Property Management Co., Ltd. Audio and video communications apparatus and communications method thereof
US8503586B2 (en) * 2009-04-16 2013-08-06 Sony Corporation Receiving apparatus and method with clock drift estimation and compensation
US8949448B1 (en) * 2011-01-27 2015-02-03 Integrated Device Technology, Inc. System and method for improving the timestamp precision in a precision time protocol (PTP) device
US8522292B2 (en) 2011-06-15 2013-08-27 Microsoft Corporation Streaming media bandwidth reduction
CN104380273B (zh) * 2012-06-18 2017-10-24 高通股份有限公司 基于环形缓冲器的数据的自适应偏移同步
JP2014052548A (ja) * 2012-09-07 2014-03-20 Sharp Corp メモリ制御装置、携帯端末、メモリ制御プログラムおよびコンピュータ読み取り可能な記録媒体
US9489009B2 (en) 2014-02-20 2016-11-08 Samsung Electronics Co., Ltd. System on chip, bus interface and method of operating the same
DE102014215078A1 (de) * 2014-07-31 2016-02-04 Continental Automotive Gmbh Überwachungsvorrichtung, netzwerk und fahrzeug
CN105430486B (zh) * 2015-11-27 2019-06-07 北京小鸟听听科技有限公司 音频或视频播放的方法和装置
US9965219B2 (en) * 2016-02-25 2018-05-08 International Business Machines Corporation Synchronizing a cursor based on consumer and producer throughputs
US10055807B2 (en) * 2016-03-02 2018-08-21 Samsung Electronics Co., Ltd. Hardware architecture for acceleration of computer vision and imaging processing
JP2017130930A (ja) * 2017-01-19 2017-07-27 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ リングバッファに基づいたデータの適応オフセット同期（ａｄａｐｔｉｖｅ ｏｆｆｓｅｔ ｓｙｎｃｈｒｏｎｉｚａｔｉｏｎ）
US10686581B2 (en) 2018-02-20 2020-06-16 Keysight Technologies, Inc. Methods, systems, and computer readable media for transmit timestamp autocalibration
CN111372038B (zh) * 2018-12-26 2021-06-18 厦门星宸科技有限公司 多串流影像处理装置及方法
CN112289429A (zh) * 2019-07-25 2021-01-29 深圳市理邦精密仪器股份有限公司 中央监护站、监护系统及数据回顾方法和装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6594329B1 (en) * 1999-11-01 2003-07-15 Intel Corporation Elastic buffer
WO2004063931A2 (en) * 2003-01-16 2004-07-29 Thomson Licensing S.A. Method and system for optimization of a data processing chain using synchronous handshake protocol with data assembly and segmentation
US6920578B1 (en) * 2001-12-18 2005-07-19 Lsi Logic Corporation Method and apparatus for transferring data between a slower clock domain and a faster clock domain in which one of the clock domains is bandwidth limited

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2196668T3 (es) * 1993-12-18 2003-12-16 Sony Corp Aparato de reproduccion de datos y medio de almacenamiento de datos.
JP3438223B2 (ja) * 1997-03-28 2003-08-18 ソニー株式会社 多重化装置および多重化方法、並びに伝送装置および伝送方法
US7743183B2 (en) * 2005-05-23 2010-06-22 Microsoft Corporation Flow control for media streaming

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6594329B1 (en) * 1999-11-01 2003-07-15 Intel Corporation Elastic buffer
US6920578B1 (en) * 2001-12-18 2005-07-19 Lsi Logic Corporation Method and apparatus for transferring data between a slower clock domain and a faster clock domain in which one of the clock domains is bandwidth limited
WO2004063931A2 (en) * 2003-01-16 2004-07-29 Thomson Licensing S.A. Method and system for optimization of a data processing chain using synchronous handshake protocol with data assembly and segmentation

Also Published As

Publication number Publication date
EP1895705A2 (de) 2008-03-05
US7657668B2 (en) 2010-02-02
US20080043276A1 (en) 2008-02-21
KR20080015717A (ko) 2008-02-20
CA2593073C (en) 2014-04-01
JP2008048392A (ja) 2008-02-28
CN101159531A (zh) 2008-04-09
CA2593073A1 (en) 2008-02-16

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