EP1886410A1 - Procede de codage, emetteur, element de reseau, et terminal de communication - Google Patents

Procede de codage, emetteur, element de reseau, et terminal de communication

Info

Publication number
EP1886410A1
EP1886410A1 EP06725959A EP06725959A EP1886410A1 EP 1886410 A1 EP1886410 A1 EP 1886410A1 EP 06725959 A EP06725959 A EP 06725959A EP 06725959 A EP06725959 A EP 06725959A EP 1886410 A1 EP1886410 A1 EP 1886410A1
Authority
EP
European Patent Office
Prior art keywords
code matrix
matrix
rows
generating
parity check
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06725959A
Other languages
German (de)
English (en)
Other versions
EP1886410A4 (fr
Inventor
Risto Nordman
Mauri NISSILÄ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Oyj
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FI20055248A external-priority patent/FI20055248A0/fi
Application filed by Nokia Oyj filed Critical Nokia Oyj
Publication of EP1886410A1 publication Critical patent/EP1886410A1/fr
Publication of EP1886410A4 publication Critical patent/EP1886410A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2721—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions the interleaver involves a diagonal direction, e.g. by using an interleaving matrix with read-out in a diagonal direction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2771—Internal interleaver for turbo codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H03M13/296—Particular turbo code structure
    • H03M13/2963—Turbo-block codes, i.e. turbo codes based on block codes, e.g. turbo decoding of product codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/1505—Golay Codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes

Definitions

  • the invention relates to an encoding method, a transmitter, a network element and a communication terminal.
  • a data sequence is transformed into another sequence.
  • the new sequence is longer having more redundancy than the original data sequence.
  • Each symbol in the new coded sequence may be represented by a group of bits.
  • the error probability of a code is mainly determined by a distance spectrum of the code.
  • the distance spectrum is the same as a weight spectrum.
  • BER bit error rate
  • the smallest weight and its multiplicity tends to determine the performance of a code.
  • a code that has a large minimum Hamming distance gives the best performance at a iow BER.
  • an encoding method comprising: arranging information bits in an information matrix encoding rows of the information matrix for generating a base code matrix; generating a parity check row for the base code matrix to obtain an extended code matrix; shifting predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; derotating the rows of the following extended code matrix for generating a multiple parity code matrix.
  • a component comprising: means for arranging information bits in an information matrix; means for encoding rows of the information matrix for generating a base code matrix; means for generating a parity check row for the base code matrix to obtain an extended code matrix; means for shifting predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; and means for derotating the rows of the following extended code matrix for generating a multiple parity code matrix.
  • a network element comprising: means for arranging information bits in an information matrix; means for encoding rows of the information matrix for generating a base code matrix; means for generating a parity check row for the base code matrix to obtain an extended code matrix; means for shifting predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; means for derotating the rows of the following extended code matrix for generating a multiple parity code matrix and means for adapting an encoded signal for a radio path.
  • a communication terminal comprising: means for arranging information bits in an information matrix; means for encoding rows of the information matrix for generating a base code matrix; means for generating a parity check row for the base code matrix to obtain an extended code matrix; means for shifting predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; means for derotating the rows of the following extended code matrix for generating a multiple parity code matrix and means for adapting an encoded signal for a radio path.
  • acomponent configured to: arrange information bits in an information matrix; encode rows of the information matrix for generating a base code matrix; generate a parity check row for the base code matrix to obtain an extended code matrix; shift predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; and derotate the rows of the following extended code matrix for generating a multiple parity code matrix.
  • a network element configured to: arrange information bits in an information matrix; encode rows of the information matrix for generating a base code matrix; generate a parity check row for the base code matrix to obtain an extended code matrix; shift predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; derotate the rows of the following extended code matrix for generating a multiple parity code matrix and adapt an encoded signal for a radio path.
  • a communication terminal configured to: arrange information bits in an information matrix; encode rows of the information matrix for generating a base code matrix; generate a parity check row for the base code matrix to obtain an extended code matrix; shift predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; derotate the rows of the following extended code matrix for generating a multiple parity code matrix and adapt an encoded signal for a radio path.
  • a computer program product encoding a computer program of instructions for executing a computer process, the process configured to: arrange information bits in an information matrix; encode rows of the information matrix for generating a base code matrix; generate a parity check row for the base code matrix to obtain an extended code matrix; shift predetermined rows of the extended code matrix with respect to a preceding row in a predetermined way and generating a following parity check row for obtaining a following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix; and derotate rows of the following extended code matrix for generating a multiple parity code matrix.
  • Figure 1 shows an example of a communication system
  • Figure 2 is a flow chart
  • Figure 3 illustrates an example of a transmitter
  • Figure 4 shows an example of a terminal of a communication system.
  • UMTS Universal Mobile Telecommunications System
  • WCDMA wideband code division multiple access
  • GSM Global System for Mobile Communications
  • FIG. 1 is a simplified illustration of a data transmission system to which the solution according to the invention is applicable.
  • a cellular radio system which comprises a base station (or node B) 100, which has bi-directional radio links 102 and 104 to subscriber terminals 106 and 108.
  • the subscriber terminals may be fixed, vehicle-mounted or portable.
  • the base station includes transceivers, for instance. From the transceivers of the base station, there is a connection to an antenna unit that establishes the bidirectional radio links to the subscriber terminals.
  • the base station is further connected to a controller 110, a radio network controller (RNC) or a base station controller (BSC), which transmits the connections of the terminals to the other parts of the network.
  • RNC radio network controller
  • BSC base station controller
  • the base station controller of the radio network controller controls in a centralized manner several base stations connected to it.
  • the base station controller or the radio network controller is further connected to a core network 112 (CN).
  • CN core network 112
  • the counterpart on the CN side can be mobile services switching centre (MSC), media gateway (MGW) or serving GPRS (general packet radio service) support node (SGSN) etc.
  • the cellular radio system can also communicate with other networks, such as a public switched telephone network or the Internet.
  • the new code class of turbo product (or block) codes according to the embodiment of the invention is called multiple parity check of cyclic codes (MPCC codes).
  • MPCC codes multiple parity check of cyclic codes
  • best distance properties can be obtained by using a horizontal code C(n v k ⁇ ) that fulfils the following conditions: first, the code is linear, and second, the code is cyclic.
  • the vertical code is typically a single parity check code.
  • any cyclic shifting of the cyclic codeword is also a cyclic codeword itself and any linear combination of linear cyclic codewords is also a linear cyclic codeword, all the parity check rows generated in the embodiment described above are also code words of the C(n ⁇ ,k x ) code. Due to the cyclically requirement, the code is called in this application multiple parity check of cyclic code, MPCC code.
  • Channel coding can be divided into two main groups: block coding and convolutional coding.
  • block coding the source data sequence is segmented into blocks.
  • the encoder then transforms the blocks into larger code blocks which include redundant bits. Redundant bits do not carry new information.
  • the class of cyclic codes is a sub-class of linear codes that in turn belong to the block code group.
  • a cyclic code word after cyclic shifts, has the property of remaining a valid code from the original set of code words.
  • Cyclic codes can be encoded with feed-back shift registers.
  • Known cyclic codes are, for instance, cyclic Hamming codes, Golay codes and Bose-Chaudhuri- Hocquenghem (BCH) codes.
  • a parity check code is used to detect (not correct) a single error.
  • a simple parity check code for instance, when information includes k bits, a (k+1)th bit is added so as to make the total number of ones in a codeword even.
  • the information bits of the matrix are denoted as bj n , where / denotes the order of the bit in each row and Q) denotes the row number.
  • the matrix is of the form Jc 2 Xk 1 and the matrix of table 1 is hereafter referred to as a Ic 2 Xk 1 information matrix.
  • rows of the information matrix are encoded for generating a base code matrix.
  • the encoding is typically carried out by using a cyclic code C(W 15 A-,) , where «, denotes the number of bits of the resulting codeword and Iz 1 denotes the number of original information bits from which the codeword is formed.
  • This matrix is hereafter referred to as a k 2 xn x base code matrix.
  • the coded bits are denoted as ⁇ (/) , where / denotes the order of a coded bit in each row and 0) denotes the row number.
  • ⁇ (/) the coded bits are denoted as ⁇ (/) , where / denotes the order of a coded bit in each row and 0) denotes the row number.
  • a parity check row is generated for the base code matrix to obtain an extended code matrix.
  • the parity row is typically generated at the bottom of the matrix by computing parity check bits.
  • the parity check bits can be computed for each column of the base code matrix (Table 2).
  • a parity check bit can be computed as:
  • coded bits are denoted as , where / denotes the order of the bit in each row and (j) denotes the row number.
  • the number of code bits vary according to the current practical implementation.
  • the parity check bits for other columns are calculated in a similar manner.
  • the operator ® denotes a modulo-2 sum.
  • the code may be denoted as C(H 1 , k x ) x P ⁇ k 2 + 1, k 2 ) cod e .
  • predetermined rows of the extended code matrix are shifted with respect to the preceding row in a predetermined way, and the following parity check row is generated for obtaining the following extended code matrix in such a way that there are more than two parity check rows in the following extended code matrix.
  • the parity check row to be generated is the second one, the rows are shifted one step (one bit position) to the left (or alternatively right).
  • the first row of the matrix usually remains unshifted.
  • the maximum number of unique parity rows that can be generated with the embodiment is n x .
  • the actual number of parity check rows is determined on the basis of the dimensions of the overall code matrix and the desired bit error rate performance of the system.
  • each new parity check row increases the minimum distance of the MPCC code at least by the amount of d mi ⁇ , where d min denotes the minimum Hamming distance of the linear cyclic horizontal code C(n, , k ⁇ ) .
  • rows of the following extended code matrix are derotated (de-rotate) for generating a multiple parity code matrix.
  • the derotation is carried out in such a way that the original order (typically an increasing order) of coded bits is retained.
  • a row-wise parity check (calculating an additional parity column) is determined after the derotation for generating a multiple parity code matrix.
  • This overall parity check is usually determined for each row of the following extended code matrix. Since the rows of the MPCC code matrix are code words of a cyclic code, the row-by-row parity computation will lead to a code matrix where each row is a codeword of an extended cyclic code. [0050] In the example, the last following extended code matrix (this matrix is in this application called an extended MPCC code matrix) includes seven rows and eight columns altogether:
  • the embodiment ends in block 212.
  • the rows of the MPCC code matrix are code words of the Hamming code
  • the rows of the extended MPCC code matrix are code words of the extended Hamming code.
  • the additional parity column of the extended MPCC code further improves the distance properties of the MPCC code.
  • the code words in a cyclic code typically have a composite length (i.e., the length of the code word can be presented as a product of two numbers) from which follows the limitation that n x has to be a prime number, except under certain strict requirements for the dimensions of the MPCC code matrix.
  • each new parity check row increases the minimum distance of the MPCC code at least by the amount of J 111111 , where d mm denotes the minimum Hamming distance of the linear cyclic horizontal code C ⁇ n ⁇ ,k ⁇ ). Therefore, the lower bound for the minimum Hamming distance of the MPCC code is obtained as follows:
  • m denotes the number of parity rows in MPCC code matrix
  • d mm denotes the minimum Hamming distance
  • the minimum Hamming distance of the horizontal code has to be selected large enough or the dimensions of the code matrix have to be selected small enough to prevent the generation of unwanted zero parity check rows (parity check row where all parity bits are zero).
  • FIG. 3 shows an example of a transmitter, which is typically placed in a network element such as a base station or in another communication device, such as a communication terminal without being restricted thereto. It is obvious for a person skilled in the art that the structure of the transmitter may vary according to the implementation.
  • the signal is first modulated in block 300.
  • Modulation means that a data stream modulates a carrier.
  • the modulated signal characteristic may be frequency or phase for example. Modulation methods are known in the art and therefore they are not explained here in greater detail.
  • the signal in Figure 3 is a wide-band system
  • the signal is spread for example by multiplying it with a long pseudo-random code. Spreading is carried out in block 302. If the system is a narrow-band system, a spreading block will not be required.
  • DSP Digital Signal Processing
  • the signal to be transmitted is processed in several ways, for instance it is encrypted and/or coded. Hence the embodiment of the coding method described above is typically carried out in the DSP block.
  • the DSP block may also include modulation means of block 300 and spreading means of block 302.
  • Block 306 converts the signal into an analogue form.
  • RF-parts in block 308 up-convert the signal to a carrier frequency, in other words a radio frequency, either via an intermediate frequency or straight to the carrier frequency.
  • RF-parts also comprise a power amplifier which amplifiers the signal for a radio path.
  • the transmitter has an antenna 310. If a receiver and a transmitter use the same antenna, there is a duplex filter (not shown) to separate transmission and reception.
  • the antenna may be an antenna array or a single antenna.
  • the disclosed functionalities of the described embodiments of the coding method can be advantageously implemented by means of software which typically locates in a Digital Signal Processor.
  • the implementation solution can also be, for instance, an ASIC (Application Specific Integrated Circuit) component.
  • a hybrid of these different implementations is also feasible.
  • Figure 4 shows a simplified example of a communication terminal to which the embodiments of the invention can be applied.
  • the terminal may be a mobile telephone or a microcomputer, for example, without being restricted thereto, it is obvious for a person skilled in the art that the structure of the terminal may vary according to the implementation.
  • the terminal comprises an antenna 400 with which signals are both transmitted and received via a duplex filter.
  • the terminal further comprises a transmitting RF (radio frequency) means 402 for a wireless communication system, to amplify and transmit a modulated signal to the antenna; a modulator 404 modulating the carrier wave by a data signal comprising the desired information in accordance with a selected modulation method; a receiving RF means 406 which amplifies the signal supplied from the antenna and down-converts the signal to a selected intermediate frequency or directly to base-band; and a demodulator 408 demodulating the received signal to enable a data signal to be separated from the carrier wave.
  • RF radio frequency
  • the terminal also comprises a controller block 416 comprising, for example, control means for controlling the operation of the different parts of the terminal and means for processing the user's speech or the data generated by the user, such as a Digital signal Processor.
  • control means for controlling the operation of the different parts of the terminal and means for processing the user's speech or the data generated by the user, such as a Digital signal Processor.
  • the Digital Signal Processor has also coding (and decoding) means.
  • the control means further comprises A/D converters converting an analogue signal into a digital one by sampling and quantizing the base-band signal.
  • the spectrum of the signal is spread at the transmitter by means of a pseudorandom spreading code over a wide band and de-spread at the receiver, in an attempt to increase channel capacity.
  • the user interface of the terminal usually comprises a loudspeaker or an earpiece 410, a microphone 412, a display 418 and possibly a keypad and/or a joystick or a similar device.
  • the user interface devices communicate with the control block.
  • the terminal typically also comprises several different memory elements that are shown as one functional block 414.
  • the disclosed functionalities of the described embodiments of the coding method can be advantageously implemented by means of software which typically locates in a Digital Signal Processor.
  • the implementation solution can also be, for instance, an ASIC (Application Specific Integrated Circuit) component. A hybrid of these different implementations is also feasible.

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

La présente invention concerne un composant comprenant des organes pour agencer les bits d'information dans une matrice d'informations, des organes pur coder des lignes de la matrice d'information de façon à générer une matrice de code de base, des organes pour générer une ligne de contrôle de parité pour que la matrice de code de base dispose d'une matrice de code étendu, des organes pour décaler des lignes définies de la matrice de code étendu par rapport à une ligne précédente d'une façon déterminée, et pour générer une ligne de contrôle de parité suivante pour disposer d'une matrice de code étendu suivante, de façon à avoir plus de deux lignes de contrôle de parité dans la matrice de code étendu suivante, et des organe pour réaligner les lignes de la matrice de code étendu suivante de façon à générer une matrice à plusieurs codes de parité.
EP06725959A 2005-05-25 2006-05-19 Procede de codage, emetteur, element de reseau, et terminal de communication Withdrawn EP1886410A4 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FI20055248A FI20055248A0 (fi) 2005-05-25 2005-05-25 Koodausmenetelmä, lähetin, tietoverkkoelementti ja tiedonvälitysterminaali
US11/400,312 US7634704B2 (en) 2005-05-25 2006-04-10 Encoding method, transmitter, network element and communication terminal
PCT/FI2006/050202 WO2006125861A1 (fr) 2005-05-25 2006-05-19 Procede de codage, emetteur, element de reseau, et terminal de communication

Publications (2)

Publication Number Publication Date
EP1886410A1 true EP1886410A1 (fr) 2008-02-13
EP1886410A4 EP1886410A4 (fr) 2009-03-04

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EP06725959A Withdrawn EP1886410A4 (fr) 2005-05-25 2006-05-19 Procede de codage, emetteur, element de reseau, et terminal de communication

Country Status (2)

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EP (1) EP1886410A4 (fr)
WO (1) WO2006125861A1 (fr)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7356752B2 (en) 2000-03-14 2008-04-08 Comtech Telecommunications Corp. Enhanced turbo product codes
GB2370477B (en) * 2000-12-22 2004-03-03 Tandberg Television Asa Method and apparatus for encoding a product code
WO2002078196A1 (fr) * 2001-03-22 2002-10-03 University Of Florida Procede et element de codage pour correction d'erreurs utilisant une parite concatenee et des codes turbo
EP1359672A1 (fr) * 2002-05-03 2003-11-05 Siemens Aktiengesellschaft Méthode pour améliorer les performances de codes concaténés

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
A. HUNT ET AL.: "Hyper-codes: High-Performance low-complexity error-correcting codes" PROC. 19TH BIENNIAL SYMP. ON COMMUNICATIONS, [Online] 31 May 1998 (1998-05-31), - 3 June 1998 (1998-06-03) pages 1-5, XP002510704 Ontario, Canada Retrieved from the Internet: URL:http://www.crc.gc.ca/fr/html/fec/home/hyper/hyper> [retrieved on 2009-01-16] *
A. HUNT ET AL.: "Hyper-codes: High-Performance, Low-Complexity Codes" 2ND INT. SYMP. ON TURBO CODES & RELATED TOPICS, [Online] 2000, pages 121-124, XP002510703 Brest, France Retrieved from the Internet: URL:http://www-turbo.enst-bretagne.fr/2emesymposium/actes2000/022.pdf> [retrieved on 2009-01-16] *
A.W. HUNT: "Hyper-Codes: High-Performance Low-complexity Error-correcting codes" THESIS OTTAWA-CARLETON INST. OF ELECT. ENGIN., May 1998 (1998-05), pages 1-76, XP002510705 Ottawa Canada *
See also references of WO2006125861A1 *

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Publication number Publication date
WO2006125861A1 (fr) 2006-11-30
EP1886410A4 (fr) 2009-03-04

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