EP1859289A4 - Fpga emulation system - Google Patents

Fpga emulation system

Info

Publication number
EP1859289A4
EP1859289A4 EP06738201A EP06738201A EP1859289A4 EP 1859289 A4 EP1859289 A4 EP 1859289A4 EP 06738201 A EP06738201 A EP 06738201A EP 06738201 A EP06738201 A EP 06738201A EP 1859289 A4 EP1859289 A4 EP 1859289A4
Authority
EP
European Patent Office
Prior art keywords
emulation system
fpga emulation
fpga
emulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06738201A
Other languages
German (de)
French (fr)
Other versions
EP1859289A2 (en
Inventor
Christopher A Schalick
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gaterocket Inc
Original Assignee
Gaterocket Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gaterocket Inc filed Critical Gaterocket Inc
Publication of EP1859289A2 publication Critical patent/EP1859289A2/en
Publication of EP1859289A4 publication Critical patent/EP1859289A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31704Design for test; Design verification
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318516Test of programmable logic devices [PLDs]
    • G01R31/318519Test of field programmable gate arrays [FPGA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/261Functional testing by simulating additional hardware, e.g. fault simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • G06F30/3308Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/331Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
EP06738201A 2005-03-16 2006-03-14 Fpga emulation system Withdrawn EP1859289A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US66242705P 2005-03-16 2005-03-16
PCT/US2006/009117 WO2006101836A2 (en) 2005-03-16 2006-03-14 Fpga emulation system

Publications (2)

Publication Number Publication Date
EP1859289A2 EP1859289A2 (en) 2007-11-28
EP1859289A4 true EP1859289A4 (en) 2011-03-30

Family

ID=37024336

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06738201A Withdrawn EP1859289A4 (en) 2005-03-16 2006-03-14 Fpga emulation system

Country Status (4)

Country Link
US (1) US8000954B2 (en)
EP (1) EP1859289A4 (en)
JP (1) JP4620771B2 (en)
WO (1) WO2006101836A2 (en)

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JP2009009325A (en) * 2007-06-27 2009-01-15 Tokushu Denshi Kairo Kk Ic emulation device and ic emulation method
US9047987B2 (en) * 2008-07-22 2015-06-02 International Microsystems, Inc. Multiple access test architecture for memory storage devices
US9262303B2 (en) * 2008-12-05 2016-02-16 Altera Corporation Automated semiconductor design flaw detection system
US9286423B2 (en) 2012-03-30 2016-03-15 International Business Machines Corporation Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator
US9230046B2 (en) 2012-03-30 2016-01-05 International Business Machines Corporation Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator
US9026688B2 (en) 2012-06-21 2015-05-05 Breakingpoint Systems, Inc. Systems and methods for programming configurable logic devices via USB
US8856600B2 (en) * 2012-06-21 2014-10-07 Breakingpoint Systems, Inc. JTAG-based programming and debug
US9990212B2 (en) * 2013-02-19 2018-06-05 Empire Technology Development Llc Testing and repair of a hardware accelerator image in a programmable logic circuit
US11009550B2 (en) * 2013-02-21 2021-05-18 Advantest Corporation Test architecture with an FPGA based test board to simulate a DUT or end-point
US9754133B2 (en) * 2013-03-14 2017-09-05 Microchip Technology Incorporated Programmable device personalization
US10055327B2 (en) 2014-09-30 2018-08-21 International Business Machines Corporation Evaluating fairness in devices under test
KR101621841B1 (en) 2014-12-18 2016-05-17 한국과학기술원 System and method for mixing circuit simulation based on hla/rti
KR101629725B1 (en) * 2015-01-05 2016-06-13 한국과학기술원 System and method for mixing circuit simulation based on framework
US9268938B1 (en) 2015-05-22 2016-02-23 Power Fingerprinting Inc. Systems, methods, and apparatuses for intrusion detection and analytics using power characteristics such as side-channel information collection
CN105259831A (en) * 2015-10-26 2016-01-20 中国人民解放军军械工程学院 Universal FPGA debugging device
US9898563B2 (en) 2015-11-13 2018-02-20 Mentor Graphics Corporation Modeling memory in emulation based on cache
US9990452B2 (en) * 2015-11-13 2018-06-05 Mentor Graphics Corporation Low power corruption of memory in emulation
US9767237B2 (en) * 2015-11-13 2017-09-19 Mentor Graphics Corporation Target capture and replay in emulation
US9916225B1 (en) * 2016-06-23 2018-03-13 VCE IP Holding Company LLC Computer implemented system and method and computer program product for testing a software component by simulating a computing component using captured network packet information
US10859609B2 (en) 2016-07-06 2020-12-08 Power Fingerprinting Inc. Methods and apparatuses for characteristic management with side-channel signature analysis
CN106445640B (en) * 2016-10-20 2019-06-18 南京南瑞继保电气有限公司 A kind of embedded type virtual device operation method and system
US11467620B1 (en) * 2018-12-12 2022-10-11 Cadence Design Systems, Inc. Architecture and methodology for tuning clock phases to minimize latency in a serial interface
CN109709472B (en) * 2019-01-25 2020-12-22 华北水利水电大学 Test system and test method for CFG (field programmable gate array) of FPGA (field programmable gate array) configuration circuit
CN112255598B (en) * 2020-10-14 2023-09-26 四川九洲空管科技有限责任公司 FPGA remote online debugging method, device and system based on optical fiber communication
US11893284B2 (en) * 2021-07-19 2024-02-06 Changxin Memory Technologies, Inc. Method, device and system for testing memory devices

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US5425036A (en) * 1992-09-18 1995-06-13 Quickturn Design Systems, Inc. Method and apparatus for debugging reconfigurable emulation systems
US6668237B1 (en) * 2002-01-17 2003-12-23 Xilinx, Inc. Run-time reconfigurable testing of programmable logic devices

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US5425036A (en) * 1992-09-18 1995-06-13 Quickturn Design Systems, Inc. Method and apparatus for debugging reconfigurable emulation systems
US6668237B1 (en) * 2002-01-17 2003-12-23 Xilinx, Inc. Run-time reconfigurable testing of programmable logic devices

Also Published As

Publication number Publication date
WO2006101836A3 (en) 2007-12-13
US8000954B2 (en) 2011-08-16
JP2008535046A (en) 2008-08-28
JP4620771B2 (en) 2011-01-26
EP1859289A2 (en) 2007-11-28
US20060253762A1 (en) 2006-11-09
WO2006101836A2 (en) 2006-09-28

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