EP1845508A1 - Système et procédé d'alimentation d'un panneau d'affichage RGBW en tensions de commande - Google Patents

Système et procédé d'alimentation d'un panneau d'affichage RGBW en tensions de commande Download PDF

Info

Publication number
EP1845508A1
EP1845508A1 EP06112633A EP06112633A EP1845508A1 EP 1845508 A1 EP1845508 A1 EP 1845508A1 EP 06112633 A EP06112633 A EP 06112633A EP 06112633 A EP06112633 A EP 06112633A EP 1845508 A1 EP1845508 A1 EP 1845508A1
Authority
EP
European Patent Office
Prior art keywords
component signal
white component
input signals
color input
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP06112633A
Other languages
German (de)
English (en)
Other versions
EP1845508B1 (fr
Inventor
Ching-Wei Lin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Innolux Corp
Original Assignee
Toppoly Optoelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppoly Optoelectronics Corp filed Critical Toppoly Optoelectronics Corp
Priority to EP20060112633 priority Critical patent/EP1845508B1/fr
Publication of EP1845508A1 publication Critical patent/EP1845508A1/fr
Application granted granted Critical
Publication of EP1845508B1 publication Critical patent/EP1845508B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/06—Colour space transformation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers

Definitions

  • the invention relates to panel displays, and more particularly, to systems and methods for providing driving voltages to RGBW display panels.
  • Color image display devices are well known and are based upon a variety of technologies such as cathode ray tubes, liquid crystal modulators and solid-state light emitters such as Organic Light Emitting Diodes (OLEDs).
  • OLEDs Organic Light Emitting Diodes
  • a pixel includes red, green and blue colored subpixels. These light emitting colored subpixels define a color gamut, and by additively combining the illumination from each of these three subpixels, i.e. with the integrative capabilities of the human visual system, a wide variety of colors can be achieved.
  • OLEDs may be used to generate color directly using organic materials to emit energy in desired portions of the electromagnetic spectrum, or alternatively, broadband emitting (apparently white) OLEDs may be attenuated with color filters to achieve red, green and blue output.
  • Images and data displayed on a color display device are typically stored and/or transmitted in three channels, that is, having these signals corresponding to a standard (e.g. RGB). It is also important to recognize that data typically is sampled to assume a particular spatial arrangement of light emitting elements. In an OLED display device, these light emitting elements are typically arranged side by side on a plane. Therefore, if incoming data is sampled for display on a color display device, the data will also be resampled for display on an OLED display having four subpixels per pixel rather than the three subpixels used in a three channel display device.
  • a standard e.g. RGB
  • Fig. 1A shows a conventional OLED subpixel driving circuit structure
  • Fig. 1B shows RGBW subpixel arrangements of a conventional display panel.
  • the subpixel is driven by the current 11 through the driving transistor T1.
  • the driving transistor T1 outputs the current 11 according to the voltage V1.
  • Fig. 1C shows a conventional digital signal processing (DSP) structure for driving RGBW subpixels.
  • DSP digital signal processing
  • RGB digital signals are sampled and held and output to a Gamma linear control unit.
  • the Gamma linear control unit adjusts RGB digital signals for Gamma linearity and outputs to the conversion unit.
  • the conversion unit converts the adjusted RGB digital signals to RGBW digital signals and outputs to a Gamma compensation unit.
  • the Gamma compensation unit executes a Gamma compensation of the RGBW digital signals from the conversion unit for Gamma correction and outputs to a RGBW driver.
  • the RGBW driver converts the RGBW digital signals to RGBW analog signals to drive corresponding RGBW subpixels.
  • Fig. 2A shows the relationship between the luminance of the OLED subpixel and the current I1. As shown, there is a linear relationship between the luminance of the OLED subpixel and the current I1.
  • Fig. 2B shows the relationship between the current I1 of the driving transistor T1 and the voltage V1 to be non-linear.
  • Fig. 2C shows the relationship between luminance of the OLED subpixel and observable brightness (gamma).
  • Fig. 2D shows the relationship between observable brightness and voltage V1 applied to the driving transistor T1.
  • RGB data is converted to RGBW data through digital data processing (DSP).
  • DSP digital data processing
  • Fig. 3 shows a conventional method for converting RGB data to RGBW data.
  • the Min(R,G,B) is assumed to be W data
  • R'G'B' data driving the display device
  • Fig. 4 shows another conventional method for converting RGB data to RGBW data.
  • the Min(R,G,B) is assumed to be W data
  • the W component is converted to W' data in accordance with a characteristic of ⁇ *W, where ⁇ ⁇ 1.
  • the R'G'B' data are obtained by removing the W' component from the RGB components respectively.
  • these two simple methods typically cannot precisely provide gamma correction for each color because of the non-linear relationship between driving voltage and observable brightness.
  • An exemplary embodiment of such a system comprises a data driver with a reference voltage generation circuit providing reference voltages according to a white component signal (W) extracted from three color input signals (R,G,B), and a digital-to-analog (D/A) conversion unit to generate driving voltages according to the reference voltages, the three color input signals and the white component signal.
  • W white component signal
  • D/A digital-to-analog
  • An exemplary embodiment of a method for providing driving voltages of a RGBW display panel comprises generating reference voltages according to a white component signal (W) extracted from three color input signals (R,G,B); and generating driving voltages according to the reference voltages, the three color input signals and the white component signal.
  • W white component signal
  • data driver 100A comprises a white component extraction unit 10, an analog reference voltage generation circuit 20 and N digital-to-analog (D/A) conversion units 30_1A ⁇ 30_NA.
  • D/A digital-to-analog
  • the white component extraction unit 10 extracts a white component signal Wi from three color input signals Ri, Gi and Bi.
  • three color input signals Ri, Gi and Bi can be 6 bit digital data, and the white component extraction unit 10 can be a minimum value detector. If color input signals R1, G1 and B1 are 110111, 010111 and 000111 respectively, the white component signal W1 can be 000111. Alternately, white component extraction unit 10 can output a suppressed white component signal W1 of 000011 according to the color input signal R1, G1 and B1.
  • the white component signal Wi can be obtained by executing an AND logic operation to the three color input signals Ri, Gi and Bi.
  • the white component signal W1 can be 000111.
  • the white component signal Wi can be obtained by executing an AND logic operation to M bits of the three color input signals Ri, Gi, Bi, and 0 ⁇ M ⁇ 6.
  • the analog reference voltage generation circuit 20 generates four sets of reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W for color input signal Ri, Gi and Bi and the white component signal Wi respectively, the reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G and V0 B ⁇ V63 B are generated according to the white component signal Wi.
  • the D/A conversion units 30_1A ⁇ 30_NA receive the reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W from the analog reference voltage generation circuit 20 to generate corresponding driving voltages VA1 R ⁇ VAN R , VA1 G ⁇ VAN G , VA1 B ⁇ VAN B and VA1 W ⁇ VAN W according to the three color input signals Ri, Gi and Bi and the white component signal Wi.
  • the D/A conversion unit 30_1A receives the reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W and generates corresponding driving voltages VA1 R , VA1 G , VA1 B and VA1 W according to the three color input signals R1, G1 and B1 and the white component signal W1 during a first period.
  • the D/A conversion unit 30_2A receives the reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W and generates corresponding driving voltages VA2 R , VA2 G , VA2 B and VA2 W according to the three color input signals R2, G2 and B2 and the white component signal W2 during a second period, and so on.
  • all D/A conversion units 30_1A ⁇ 30_NA employ the same type of analog reference voltage circuit which can generate different reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W according to different white component signals Wi during different periods.
  • the D/A conversion units 30_1A ⁇ 30_NA each comprise four sampling latches S1 R ⁇ S1 W , four holding latches H1 R ⁇ H1 W , four D/A converters DAC_R ⁇ DAC_W and four analog buffers AB_R ⁇ AB_W.
  • the sampling latches S1 R ⁇ S1 W sample the color input signals Ri, Gi and Bi and the white component signal Wi at one time.
  • the holding latches H1 R ⁇ H1 W hold the color input signals Ri, Gi and Bi and the white component signal Wi sampled by the sampling latches S1 R ⁇ S1 W .
  • the D/A converters DAC_R ⁇ DAC_W convert the held color input signals Ri, Gi and Bi and the held white component signal Wi to corresponding analog voltages VA1 R ⁇ VA1 W according to the reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W , and output the corresponding driving voltages VA1 R ⁇ VA1 W through the analog buffers AB_R ⁇ AB_W.
  • Operation and structure of the D/A conversion units 30_2A ⁇ 30_NA are similar to those of the D/A conversion unit 30_1A.
  • the data diver 100A can output four corresponding voltages to drive four data lines at one time.
  • the analog reference voltage generation circuit 20 comprises four voltage generators 22R, 22G, 22B and 22W shown in Figs. 6A ⁇ 6D to generate reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W .
  • the voltage generator 22R generates the reference voltages V0 R ⁇ V63 R to D/A converters DAC_R of the D/A conversion units 30_1A ⁇ 30_NA according to the white component signal Wi.
  • the voltage generator 22R comprises two de-multiplexers 211 and 212 and two series-connected resistor strings 231 and 232.
  • the resistor string 231 comprises resistors R0 R" ⁇ R62 R" connected in series, and the resistor string 232 comprises resistors R0 R ⁇ R64 R for red color grey level gamma correction.
  • the de-multiplexer 211 selectively outputs a first power voltage VerfH to one node of the resistor string 231 according to the white component signals Wi, and the de-multiplexer 212 selectively outputs a second power voltage VrefL to one node of the resistor string 232 according to the white component signals Wi.
  • the first power voltage VrefH exceeds the second power voltage VrefL, the resistors R0 R" and R0 R are the same, the resistors R1 R" and R1 R are the same, the resistors R2 R" and R2 R are the same, and so on.
  • the power voltage VrefL is forced to the node N0 of the resistor string 232, and the power voltage VrefH is forced to the node N3 of the resistor string 231.
  • the white component signal Wi extracted from the three color input signals Ri, Gi and Bi is 000001
  • the power voltage VrefL is forced to the node N1 of the resistor string 232
  • the power voltage VrefH is forced to the node N4 of the resistor string 231. Accordingly, the voltage level of the reference voltage V0 R ⁇ V63 R for the red input signal Ri can be lowered by a first voltage drop.
  • the power voltage VrefL is forced to the node N2 of the resistor string 232, and the power voltage VrefH is forced to the node N5 of the resistor string 231. Accordingly, the voltage level of the reference voltage V0 R ⁇ V63 R for the red input signal Ri can be lowered by a second voltage drop exceeding the first voltage drop. Thus, the voltage level of the reference voltage V0 R ⁇ V63 R for the red input signal Ri can be adjusted based on the white component signal Wi.
  • the voltage generator 22G generates the reference voltages V0 G ⁇ V63 G to D/A converters DAC_G of the D/A conversion units 30_1A ⁇ 30_NA according to the white component signal Wi.
  • the voltage generator 22R comprises two de-multiplexers 213 and 214 and two series-connected resistor strings 233 and 234.
  • the resistor string 233 comprises resistors R0 G" ⁇ R62 G" connected in series, and the resistor string 234 comprises resistors R0 G ⁇ R64 G for green color grey level gamma correction.
  • the de-multiplexer 213 selectively outputs the first power voltage VrefH to one node of the resistor string 233, and the de-multiplexer 214 selectively outputs the second power voltage VrefL to one node of the resistor string 234.
  • the resistors R0 G" and R0 G are the same, the resistors R1 G" and R1 G are the same, the resistors R2 G" and R2 G are the same, and so on.
  • the voltage generator 22B generates the reference voltages V0 B ⁇ V63 B to D/A converters DAC_B of the D/A conversion units 30_1A ⁇ 30_NA according to the white component signal Wi.
  • the voltage generator 22B comprises two de-multiplexers 215 and 216 and two series-connected resistor strings 235 and 236.
  • the resistor string 235 comprises resistors R0 B" ⁇ R62 B" connected in series, and the resistor string 236 comprises resistors R0 B ⁇ R64 B for blue color grey level gamma correction.
  • the de-multiplexer 215 selectively outputs the first power voltage VrefH to one node of the resistor string 235, and the de-multiplexer 216 selectively outputs the second power voltage VrefL to one node of the resistor string 236.
  • the resistors R0 B" and R0 B are the same, the resistors R1 B” and R1 B are the same, the resistors R2 B” and R2 B are the same, and so on. Operation of the voltage generator 22G and 22B is similar to that of the voltage generator 22R., .
  • the resistors R0 R ⁇ R64 R , R0 G ⁇ R64 G and R0 B ⁇ R62 B can be different from others, depending on design.
  • the voltage generator 22W comprises a resistor string 237 comprising a plurality of resistors R0 W ⁇ R63 W connected in series for white color grey level gamma correction.
  • the power voltages VrefH and VrefL are forced to two ends of the resistor string 237, such that the reference voltages V0 W ⁇ V63 W are generated according to difference resistances of the resistors R0 W ⁇ R63 W .
  • the voltage level of the reference voltages V0R ⁇ V63R, V0G ⁇ V63G and V0B ⁇ V63B for three color input signals Ri, Gi and Bi can be adjusted based on the white component signal Wi.
  • the voltage level of the driving voltages VA1 R ⁇ VAN R , VA1 G ⁇ VAN G and VA1 B ⁇ VAN B generated by D/A conversion units 30_1A ⁇ 30_NA can be adjusted according to the extracted white component signal Wi.
  • N-type transistors are used as driving devices of pixels
  • the RGB brightness of the subpixels on a display device is lowered as the driving voltage decreases based on the white component signal Wi.
  • P-type transistors are used as driving devices of pixels
  • the RGB brightness of the pixels on a display device is lowered as the driving voltage increases based on the white component signal Wi.
  • gamma correction for RGBW brightness can be accurately controlled.
  • the de-multiplexers 211, 213 and 215 selectively output the second power voltage VrefL to one node of the resistor string 231, 233 and 235, and the de-multiplexer 212, 214 and 216 selectively output the first power voltage VrefH to one node of the resistor string 232, 234 and 236.
  • Fig. 7 shows another embodiment of a data driver.
  • the data driver 100B is similar to the data driver 100A shown in Fig. 5, with the exception of analog sampling and holding latches ASH_R ⁇ ASH_W coupled between the analog buffers AB_R ⁇ AB_W and the D/A converters DAC_R ⁇ DAC_W in each D/A conversion unit 30_1B ⁇ 30_NB. Description of the same structure shown in Fig. 5 is omitted for simplification.
  • the driving voltages VA1 R ⁇ VAN R , VA1 G ⁇ VAN G , VA1 B ⁇ VAN B and VA1 W ⁇ VAN W generated by the D/A conversion units 30_1B ⁇ 30_NB during different periods can be sampled and held by the analog sampling and holding latches ASH_R ⁇ ASH_W.
  • the data driver 100B can output the corresponding voltages to drive one row of data lines in one time.
  • Figs. 8-1 and 8-2 show another embodiment of a data driver.
  • the data driver 100C is similar to the data driver 100A shown in Fig. 5, with the exception of N analog reference voltage generation circuits 20_1 ⁇ 20_N coupled to the D/A conversion units 30_1C ⁇ 30_NC. Description of the same structure shown in Fig. 7 is omitted for simplification.
  • the N analog reference voltage generation circuits 20_1 ⁇ 20_N each correspond to one of the D/A conversion units 30_1C ⁇ 30_NC.
  • the analog reference voltage generation circuit 20_1 corresponds to the D/A conversion unit 30_1C
  • the analog reference voltage generation circuit 20_2 corresponds to the D/A conversion unit 30_2C, and so on.
  • the color input signals Ri, Gi, Bi and the extracted white component signal Wi are sampled by the sampling latches S1 R ⁇ S1 W and held by the holding latches H1 R ⁇ H1 W in the D/A conversion units 30_1C ⁇ 30_NC during each period.
  • the color input signals R1, G1, B1 and the extracted white component signal W1 are sampled and held in the D/A conversion units 30_1C during a first period
  • the color input signals R2, G2, B2 and the extracted white component signal W2 are sampled and held in the D/A conversion units 30_2C during a second period, and so on.
  • All held color input signals Ri, Gi, Bi and the white component signal Wi can be output to the corresponding D/A converters DAC_R ⁇ DAC_W and the corresponding analog reference voltage circuit at one time.
  • the white component signal W1 is output to analog reference voltage generation circuit 20_1, such that the reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W are output to the D/A converters DAC_R ⁇ DAC_W.
  • the D/A converters DAC_R ⁇ DAC_W receive the reference voltages V0 R ⁇ V63 R , V0 G ⁇ V63 G , V0 B ⁇ V63 B and V0 W ⁇ V63 W and generate the driving voltage VA1 R ⁇ VA1 W according to the three color input signals R1, G1, B1 and W1.
  • the D/A conversion units 30_2C ⁇ 30_NC generate the driving voltages VA2 R ⁇ VAN R , VA2 G ⁇ VAN G and VA2 B ⁇ VAN B at the same time.
  • the data driver 100C can output the corresponding voltages to drive one row of data lines in one time.
  • Fig. 9 is a schematic diagram of another embodiment of a system, in this case a display panel, for providing driving voltages.
  • the display device 300 comprises a data driver such as data drvier100A/100B/100C, a pixel array 200 and a gate driver 210.
  • the pixel array 200 comprises RGBW color pixels arranged in matrix, a plurality of data lines and a plurality of scan lines.
  • the data driver generates analog driving voltages to the pixel array 200
  • the gate driver 210 provides scan signals to the pixel array 200 such that the scan lines are asserted or de-asserted.
  • the pixel array 200 generates color images according to the analog driving voltages from the data driver.
  • the display panel can be an organic light emitting panel, an electroluminescent panel or a liquid crystal display panel for example, various other technologies can be used in other embodiments.
  • Fig. 10 schematically shows an embodiment of yet another system, in this case an electronic device for providing driving voltages.
  • electronic device 600 employs a display panel such as display panel 600 shown in Fig. 9.
  • the electronic device 600 may be a device such as a PDA, notebook computer, digital camera, tablet computer, cellular phone or a display monitor device, for example.
  • the electronic device 600 comprises a housing 500, a display panel 300 and a DC/DC converter 400, although it is to be understood that various other components can be included, such components not shown or described here for ease of illustration and description.
  • the DC/DC converter 400 powers the display panel 300 so that the display panel 300 can display color images.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
EP20060112633 2006-04-13 2006-04-13 Système et procédé d'alimentation d'un panneau d'affichage RGBW en tensions de commande Expired - Fee Related EP1845508B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP20060112633 EP1845508B1 (fr) 2006-04-13 2006-04-13 Système et procédé d'alimentation d'un panneau d'affichage RGBW en tensions de commande

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP20060112633 EP1845508B1 (fr) 2006-04-13 2006-04-13 Système et procédé d'alimentation d'un panneau d'affichage RGBW en tensions de commande

Publications (2)

Publication Number Publication Date
EP1845508A1 true EP1845508A1 (fr) 2007-10-17
EP1845508B1 EP1845508B1 (fr) 2012-04-11

Family

ID=36627634

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20060112633 Expired - Fee Related EP1845508B1 (fr) 2006-04-13 2006-04-13 Système et procédé d'alimentation d'un panneau d'affichage RGBW en tensions de commande

Country Status (1)

Country Link
EP (1) EP1845508B1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120064112A (ko) * 2009-09-17 2012-06-18 글로벌 오엘이디 테크놀러지 엘엘씨 디스플레이 디바이스

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0547603A2 (fr) 1991-12-18 1993-06-23 Texas Instruments Incorporated Système de projection couleur séquentiel de lumière blanche à luminosité améliorée
EP1298637A2 (fr) 2001-09-27 2003-04-02 Samsung Electronics Co., Ltd. Dispositif et méthode d'alimentation d'écran à cristaux liquides (LCD) délivrant des tensions variables pour l'échelle des gris
US6593934B1 (en) 2000-11-16 2003-07-15 Industrial Technology Research Institute Automatic gamma correction system for displays
US20040113875A1 (en) 2002-12-16 2004-06-17 Eastman Kodak Company Color oled display with improved power efficiency

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0547603A2 (fr) 1991-12-18 1993-06-23 Texas Instruments Incorporated Système de projection couleur séquentiel de lumière blanche à luminosité améliorée
US6593934B1 (en) 2000-11-16 2003-07-15 Industrial Technology Research Institute Automatic gamma correction system for displays
EP1298637A2 (fr) 2001-09-27 2003-04-02 Samsung Electronics Co., Ltd. Dispositif et méthode d'alimentation d'écran à cristaux liquides (LCD) délivrant des tensions variables pour l'échelle des gris
US20040113875A1 (en) 2002-12-16 2004-06-17 Eastman Kodak Company Color oled display with improved power efficiency

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Y. MATSUEDA ET AL.: "6-bit AMOLED with RGB Adjustable Gamma Compensation LTPS TFT Circuit", SID 05 DIGEST, pages 1352 - 1355
YOJIRO MATSUEDA ET AL: "38.4: 6-bit AMOLED with RGB Adjustable Gamma Compensation LTPS TFT Circuit", 2005 SID INTERNATIONAL SYMPOSIUM. BOSTON, MA, MAY 24 - 27, 2005, SID INTERNATIONAL SYMPOSIUM, SAN JOSE, CA : SID, US, 24 May 2005 (2005-05-24), pages 1352 - 1355, XP007012301 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120064112A (ko) * 2009-09-17 2012-06-18 글로벌 오엘이디 테크놀러지 엘엘씨 디스플레이 디바이스
EP2478517A1 (fr) * 2009-09-17 2012-07-25 Global OLED Technology LLC Dispositif d'affichage
EP2478517A4 (fr) * 2009-09-17 2013-03-27 Global Oled Technology Llc Dispositif d'affichage
US9799303B2 (en) 2009-09-17 2017-10-24 Seiichi Mizukoshi Display device

Also Published As

Publication number Publication date
EP1845508B1 (fr) 2012-04-11

Similar Documents

Publication Publication Date Title
US7791621B2 (en) Systems and methods for providing driving voltages to RGBW display panels
US7808463B2 (en) Data driver and organic light emitting display having the same
JP4427038B2 (ja) 液晶表示装置の駆動回路及びその駆動方法
US8305325B2 (en) Color display apparatus and active matrix apparatus
KR100798309B1 (ko) 액티브 매트릭스 유기 엘이디 구동회로
US10096274B2 (en) Data driver for reducing data transmission, display device, and data driving method
US8884863B2 (en) Buffer circuit, scanning circuit, display device, and electronic equipment
US8922472B2 (en) Level shifter circuit, scanning circuit, display device and electronic equipment
US10210806B2 (en) Data drive circuit of amoled display device
KR102623092B1 (ko) 디스플레이 패널의 구동 장치, 구동 방법 및 디스플레이 장치
CN105590583B (zh) 灰阶电压产生电路、产生方法、驱动电路和显示装置
US20080068310A1 (en) Organic light-emitting diode display device and method for driving the same
CN113692612A (zh) 显示装置、显示装置的驱动方法以及电子设备
US10964271B2 (en) Sensing circuit of source driver and display device using the same
US10803811B2 (en) Display apparatus, driver for driving display panel and source driving signal generation method
KR102435875B1 (ko) 하이 다이내믹 레인지 영상 신호 처리를 위한 구동 회로 및 그것을 포함하는 표시 장치
EP1845508A1 (fr) Système et procédé d'alimentation d'un panneau d'affichage RGBW en tensions de commande
US7948452B2 (en) Self-emission type display device
JP2007271968A (ja) カラー表示装置及びアクティブマトリクス装置
KR102286726B1 (ko) 디스플레이 장치 및 그 구동 회로
US7696976B2 (en) Data driver and organic light emitting display device having the same
KR101952449B1 (ko) 타이밍 컨트롤러 및 그 구동 방법과 이를 이용한 평판표시장치
KR102113604B1 (ko) 표시장치 및 그 구동방법
KR20230092486A (ko) 표시장치 및 이의 구동방법
US20050024348A1 (en) Driving circuit for solving color dispersion

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL BA HR MK YU

17P Request for examination filed

Effective date: 20080417

AKX Designation fees paid

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

RBV Designated contracting states (corrected)

Designated state(s): DE FR GB IT NL

17Q First examination report despatched

Effective date: 20090512

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: CHIMEI INNOLUX CORPORATION

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB IT NL

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602006028705

Country of ref document: DE

Effective date: 20120614

REG Reference to a national code

Ref country code: NL

Ref legal event code: T3

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20130114

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602006028705

Country of ref document: DE

Effective date: 20130114

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 11

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 12

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 13

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20180329

Year of fee payment: 13

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20180315

Year of fee payment: 13

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 20180412

Year of fee payment: 13

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20180404

Year of fee payment: 13

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20180420

Year of fee payment: 13

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 602006028705

Country of ref document: DE

REG Reference to a national code

Ref country code: NL

Ref legal event code: MM

Effective date: 20190501

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20190413

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190501

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20191101

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190413

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190430

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20190413