EP1665821A2 - Reseaux multi-etages, multidestination, multifractionnes, a temps lineaire, strictement non bloquants - Google Patents

Reseaux multi-etages, multidestination, multifractionnes, a temps lineaire, strictement non bloquants

Info

Publication number
EP1665821A2
EP1665821A2 EP04783318A EP04783318A EP1665821A2 EP 1665821 A2 EP1665821 A2 EP 1665821A2 EP 04783318 A EP04783318 A EP 04783318A EP 04783318 A EP04783318 A EP 04783318A EP 1665821 A2 EP1665821 A2 EP 1665821A2
Authority
EP
European Patent Office
Prior art keywords
switches
network
switch
stage
links
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04783318A
Other languages
German (de)
English (en)
Other versions
EP1665821A4 (fr
Inventor
Venkat Konda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TEAK TECHNOLOGIES Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of EP1665821A2 publication Critical patent/EP1665821A2/fr
Publication of EP1665821A4 publication Critical patent/EP1665821A4/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/20—Support for services
    • H04L49/201—Multicast operation; Broadcast operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254—Centralised controller, i.e. arbitration or scheduling

Definitions

  • a three-stage network is operated in strictly nonblocking manner in accordance with the invention includes an input stage having switches and «, inlet links for each of r, switches, an output stage having r 2 switches and n 2 outlet links for each of r 2 switches.
  • FIG. IB shows a high-level flowchart of a scheduling method 140, in one embodiment executed by the controller of FIG. 1A.
  • a multicast connection request is received in act 141.
  • the connection request is fan-out-split if the fan-out of the connection is > s and ⁇ p, (For the network ⁇
  • MS( 5 * MIN(n ,n 2 )) are connected to each of the input switches through r, first internal links (for example the links FLl l-FLf ! 1 connected to the middle switch MSI from each of the input switch ISl-ISr , and connected to each of the output switches through r 2 second internal links (for example the links SL1 l-SLr 2 l connected from the middle switch MSI to each of the output switch OSl-OSr 2 ).
  • Such a multi-stage switching network is denoted as a V(m, n x ,r x ,n 2 ,r 2 ) network.
  • Method 140 of FIG. IB next sets up a connection I 6 from input switch IS2 to output switches OS3, OS6 and OS9 as follows.
  • act 142 the scheduling method of FIG. IB finds that, since the fan-out of the connection request I 6 is
  • Step 6 marks the already assigned destination switches so that they are not assigned to another fan-out-split connection.
  • Step 8 starts a loop to set up each connection or fan-out-split connections of the connection.
  • Step 9 checks if the corresponding set 0[i] is not NULL then Step 10 starts a loop and steps through all the middle switches.
  • Masson and Jordan (G.M. Masson and B.W. Jordan, "Generalized Multi-stage Connection Networks", Networks, 2: pp. 191-209, 1972 by John Wiley and Sons, Inc.) presented the rearrangeably nonblocking networks and strictly nonblocking networks by following the approach 1, of fanning-out only once in the second stage and arbitrarily fanning out in the first stage.
  • U.S. Patent application Serial No. 09/967,815 that is incorporated by reference above
  • U.S. Patent application Serial No. 09/967,106 that is incorporated by reference above presented the rearrangeably nonblocking networks and strictly nonblocking networks, respectively, by following the approach 3, of anning-out optimally and arbitrarily in both first and second stages.
  • U.S. Patent application, docket No. V-0003 US that is incorporated by reference above presented the strictly nonblocking networks by following the approach 2 of fanning out only once in the first stage and arbitrary fan-out in the second stage.
  • V(m,n x ,r x ,n 2 ,r 2 ) strictly nonblocking networks hereinafter "multi-split linear-time V(m,n x ,r x ,n 2 ,r 2 ) strictly nonblocking networks"
  • multi-split linear-time V(m,n x ,r x ,n 2 ,r 2 ) strictly nonblocking networks by combining the methods of a) Fan-out only once in the first stage and arbitrary fan-out in the second stage, b) Optimal and arbitrary fan-out in both first and second stages.
  • the multi-split linear-time V(m, n x ,r x ,n 2 ,r 2 ) strictly nonblocking networks employ fewer middle stage switches m , but still use linear-time scheduling method for the strictly nonblocking operation.
  • the multi-split linear-time V(m, n x ,r x ,n 2 ,r 2 ) strictly nonblocking networks employ more number of middle stage switches m but they are faster in scheduling time.
  • V(m,n x ,r x ,n 2 ,r 2 ) are considered.
  • Applicant makes a fundamental observation that by arbitrarily splitting the multicast connections in the input switch, when the fan-out of the connection is in a specified range (to be discussed next), the V(m,n,r) network is operable in strictly nonblocking manner for a smaller m than as shown in Table 3. Applicant emphasizes that arbitrary splitting of multicast connections in input switch provides the opportunity to schedule each of the constituent fan-out-spilt connections independent of other and hence scheduling method is linear in time complexity.
  • FIG. IC it shows the maximum number of middle switches needed for V(m, n ,r x ,n 2 ,r 2 ) network to be operable in strictly nonblocking manner when a multicast connection is fanned out only once in the input switch, as presented in U.S. Patent application, Docket No. V-0003 that is incorporated by reference above, requires a maximum of
  • the V(m, n x ,r x ,n 2 ,r 2 ) network is operable in strictly nonblocking manner when m ⁇ 2.3 x MIN(n x , n 2 ) when r 2 e [12,13] , by arbitrarily fan-out-splitting multicast connections twice and fanning out twice from the input switch when the fan-out of multicast connection is / e [3,4] ; and otherwise by fanning out the connection only once in the input switch.
  • V(m, n x ,r x ,n 2 ,r 2 ) network is operable in strictly nonblocking manner when m ⁇ l. ⁇ x MIN(n , n 2 ) when r 2 e [14] , by arbitrarily fan-out-splitting multicast connections twice and fanning out twice from the input switch when the fan-out of multicast connection is / e [3,4] ; and otherwise by fanning out the connection only once in the input switch.
  • Table 3 summarizes the results for V(m, n, r) network when r e [9 - 14] , considered so far, to be operable in nonblocking manner according to the current invention.
  • Applicant notes that when r 2 e [15] , by arbitrarily fan-out-splitting multicast connections twice and fanning out twice from the input switch when the fan-out of multicast connection is / e [3,4] ; and otherwise by fanning out the connection only once in the input switch with m ⁇ lx MIN(n x , n 2 ) does not make V(m, n x ,r ,n 2 ,r 2 ) operable in
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m,n x ,r x ,n 2 ,r 2 ) is operable in strictly nonblocking manner when
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m, n x ,r x ,n 2 ,r 2 ) is operable in strictly nonblocking manner when m ⁇ 3 MIN(n x ,n 2 ).
  • Applicant notes that when r 2 G [49], by arbitrarily fan-out-splitting multicast connections three times and fanning out three times from the input switch when the fan-out of multicast connection is / e [5,18] ; and otherwise by fanning out the connection only once in the input switch with m > 3 MIN(n x , n 2 ) does not make V(m, n x ,r ,n 2 ,r 2 )
  • Table 4 summarizes the results for V(m, n, r) network when e [15- 48] , considered so far, to be operable in nonblocking manner according to the current invention.
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m, n x ,r ,n 2 ,r 2 ) is operable in strictly nonblocking manner when m > 4x N( «,, « 2 ).
  • the multicast connections with fan-out / e [5,24] are arbitrarily fan-out-split into tour so
  • Applicant notes that when r 2 e [100] , by arbitrarily fan-out-splitting multicast connections four times and fanning out four times from the input switch when the fan-out of multicast connection is / e [5,25] ; and otherwise by fanning out the connection only once in the input switch with m ⁇ 4 x MIN(n x , n 2 ) does not make V(m, n x ,r ,n 2 ,r 2 )
  • Table 5 summarizes the results for V(m, n, r) network when r e [49 - 99] , considered so far, to be operable in nonblocking manner according to the current invention.
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m, x ,r x ,n 2 ,r 2 ) is operable in strictly nonblocking manner when m ⁇ 5 x MM(n x ,n 2 ) .
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m,n x ,r x ,n 2 ,r 2 )is operable in strictly nonblocking manner when m ⁇ 5 x MLN(n x , n 2 ) .
  • Applicant notes that when r 2 e [155] , by arbitrarily fan-out-splitting multicast connections five times and fanning out five times from the input switch when the fan-out of multicast connection is / e [7,31]; and otherwise by fanning out the connection only once in the input switch with m ⁇ 5 MIN(n , n 2 ) does not make V(m, n x ,r x ,n 2 ,r 2 )
  • Table 7 summarizes the results for V(m, n, r) network when r e [100 - 154] , considered so far, to be operable in nonblocking manner according to the current invention.
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m, n x ,r ,n 2 ,r 2 ) is operable in strictly nonblocking manner when m ⁇ 6x MIN(n x ,n 2 ) .
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m, n x ,r x ,n 2 ,r 2 ) is operable in strictly nonblocking manner when m ⁇ 6xMIN(n x ,n 2 ) .
  • the multicast connection is fanned out only once in the input switch. Then the three-stage network V(m, n x ,r x ,n 2 ,r 2 ) is operable in strictly nonblocking manner when m > 6x ZN(n,, « 2 ) .
  • Applicant notes that when r 2 e [225] , by arbitrarily fan-out-splitting multicast connections five times and fanning out five times from the input switch when the fan-out of multicast connection is / e [7,32] ; and otherwise by fanning out the connection only once in the input switch with m ⁇ 6 x MIN(n x , n 2 ) does not make V(m, n ,r x ,n 2 ,r 2 )
  • Table 7 summarizes the results for V(m, n, r) network when r e [155 - 224] , considered so far, to be operable in nonblocking manner according to the current invention.
  • Each of middle switches MS1-MS4 is a V (4,1,3) three-stage subnetwork.
  • the three-stage subnetwork MSI comprises input stage of three, two by four switches MIS1-MIS3 with inlet links FL1-FL6, and an output stage of three, four by two switches MOS1-MOS3 with outlet links SL1-SL6.
  • the middle stage of MSI consists of four, three by three switches MMS1-MMS4.
  • middle switches MMS1-MMS4 where p is the number of inlet links for each middle input switch MIS1-MIS3 with q being the number of switches in the input stage (equals to 3 in FIG. 5 A) and p is the number of outlet links for each middle output switch MOS1-MOS3 with q being the number of switches in the output stage (equals to 3 in FIG. 5A).
  • each connection in any of the recursive three-stage networks each connection can fan out in the first stage switch into only one middle stage subnetwork, and in the middle switches and last stage switches it can fan out any arbitrary number of times as required by the connection request.
  • connection Ii fans out in the first stage switch ISl once into middle stage subnetwork MSI.
  • middle stage subnetwork MSI it fans out three times into output switches OSl, OS2, and OS3.
  • output switches OSl and OS3 it fans out twice. Specifically in output switch OSl into outlet links OL1, OL2, and in output switch OS3 into outlet links OL5, OL6.
  • In output switch OS2 it fans out once into outlet link OS4.
  • V(m,n x ,r x ,n 2 ,r 2 ) network embodiments described so far, in the current invention are implemented in space-space-space, also known as SSS configuration.
  • SSS configuration all the input switches, output switches and middle switches are implemented as separate switches, for example in one embodiment as crossbar switches.
  • the three-stage networks V(m,n ,r x ,n 2 ,r 2 ) can also be implemented in a time-space- time, also known as TST configuration.
  • TST configuration in the first stage and the last stage all the input switches and all the output switches are implemented as separate switches.
  • the middle stage uses s number of switches if m ⁇ s * MIN(n x , n 2 ) where
  • the TST configuration implements the switching mechanism, in accordance with the current invention, in MIN(n x ,n 2 ) steps in a circular fashion. So in TST configuration, the middle stage physically implements only s middle switches; and they are shared in time in, MN(n x ,n 2 ) steps, to switch packets or timeslots from input ports to the output ports.
  • connections I x and I 6 are fanned out through middle switches MSI and MS2 to the output switches OSl and OS3 respectively, and so connections 7, and 7 6 are fanned out to destination outlet links OL2, OL3 and OL9 respectively, just exactly the same way they are set up in the network of FIG. 6A in all the three stages.
  • FIG. 6C implements the switching functionality of middle switches MS3 and MS4, and since in the network of FIG.
  • a method of the type described above is modified to set up a multirate multi-stage network as follows.
  • a multirate connection can be specified as a type of multicast connection.
  • an inlet link transmits to multiple outlet links
  • multiple inlet links transmit to a single outlet link when the rate of data transfer of all the paths in use meet the requirements of multirate connection request.
  • a multirate connection can be set up (in a method that works backwards from the output stage to the input stage), with fan-in (instead of fan-out) of not more than s in the output stage and arbitrary fan-in in the input stages and middle stages.
  • a three-stage multirate network is operated in strictly nonblocking manner with the exact same requirements on the number of middle stage switches as described above for certain embodiments.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Structure Of Telephone Exchanges (AREA)

Abstract

L'invention concerne un réseau multi-étagé exploité de manière strictement non bloquante, qui comprend un étage d'entrée présentant des commutateurs r1 et des liaisons d'entrée n1 pour chaque commutateur r1; et un étage de sortie présentant des commutateurs r2 et des liaisons de sortie n2 pour chaque commutateur r2. Le réseau comprend également un étage intermédiaire de commutateurs m, et chaque commutateur intermédiaire présente au moins une lien relié à chaque commutateur d'entrée pour un total d'au moins une première série de liaisons internes r1; et au moins un lien relié à chaque commutateur de sortie pour un total d'au moins une première série de liaisons internes r2, si m = s * MIN(n1, n2), formule dans laquelle s = 2 quand r2 = [9,11], s = 3 quand r2 = [25,48], s = 4 quand r2 = [49,99], s = 5 quand r2 = [1 00,154], s = 6 quand r2 = [155,224], et s = 7 quand r2 = [225,278]. Dans un mode de réalisation, chaque connexion multidestination est établie par le biais dudit réseau à trois étages, par l'utilisation d'au plus une série de commutateurs d'étage intermédiaire s. Lorsque lenombre de commutateurs r1 d'étage d'entrée est égal au nombre de commutateurs r2 d'étage de sortie, et que r1 = r2 = r; mais aussi lorsque le nombre de liaisons d'entrée dans chaque commutateur d'entrée n1 est égal au nombre de liaisons de sortie dans chaque commutateur de sortie n2, et que n1 = n2 = n, un réseau à trois étages est exploité de manière strictement non bloquante, selon l'invention, si m = s * n, formule dans laquelle s = 2 quand r = [9,11]; s = 3 quand r = [25,48]; s = 4 quand r = [49,99]; s = 5 quand r = [100,154]; s = 6 quand r = [155,224]; et s = 7 quand r = [225,278]. Dans un mode de réalisation, chaque connexion multidestination est établie par le biais dudit réseau à trois étages, par l'utilisation d'au plus s commutateurs d'étage intermédiaire.
EP04783318A 2003-09-06 2004-09-05 Reseaux multi-etages, multidestination, multifractionnes, a temps lineaire, strictement non bloquants Withdrawn EP1665821A4 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50078903P 2003-09-06 2003-09-06
PCT/US2004/029027 WO2005027390A2 (fr) 2003-09-06 2004-09-05 Reseaux multi-etages, multidestination, multifractionnes, a temps lineaire, strictement non bloquants

Publications (2)

Publication Number Publication Date
EP1665821A2 true EP1665821A2 (fr) 2006-06-07
EP1665821A4 EP1665821A4 (fr) 2006-11-02

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EP (1) EP1665821A4 (fr)
JP (1) JP2007504772A (fr)
CA (1) CA2537975A1 (fr)
IL (1) IL174113A0 (fr)
WO (1) WO2005027390A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8107468B2 (en) 2006-11-07 2012-01-31 Media Global Links Co., Ltd. Non-blocking multicast switching system and a method for designing thereof
US10326606B2 (en) 2016-02-18 2019-06-18 Media Links Co., Ltd. Multicast switching system

Citations (3)

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Publication number Priority date Publication date Assignee Title
US4696000A (en) * 1985-12-12 1987-09-22 American Telephone And Telegraph Company, At&T Bell Laboratories Nonblocking self-routing packet and circuit switching network
EP0781021A2 (fr) * 1995-12-21 1997-06-25 AT&T Corp. Appareil et procédé de mesure de blocage de réseau
US5945922A (en) * 1996-09-06 1999-08-31 Lucent Technologies Inc. Widesense nonblocking switching networks

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Publication number Priority date Publication date Assignee Title
US5276425A (en) * 1991-11-19 1994-01-04 At&T Bell Laboratories Method for broadcasting in Clos switching networks by limiting the number of point-to-multipoint connections
US5801641A (en) * 1993-10-19 1998-09-01 The Johns Hopkins University Controller for a non-blocking broadcast network

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4696000A (en) * 1985-12-12 1987-09-22 American Telephone And Telegraph Company, At&T Bell Laboratories Nonblocking self-routing packet and circuit switching network
EP0781021A2 (fr) * 1995-12-21 1997-06-25 AT&T Corp. Appareil et procédé de mesure de blocage de réseau
US5945922A (en) * 1996-09-06 1999-08-31 Lucent Technologies Inc. Widesense nonblocking switching networks

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
CLOS C: "A STUDY OF NON-BLOCKING SWITCHING NETWORKS" BELL SYSTEM TECHNICAL JOURNAL, AMERICAN TELEPHONE AND TELEGRAPH CO. NEW YORK, US, vol. 32, 1 March 1953 (1953-03-01), pages 406-424, XP000605046 *
See also references of WO2005027390A2 *

Also Published As

Publication number Publication date
JP2007504772A (ja) 2007-03-01
CA2537975A1 (fr) 2005-03-24
WO2005027390A2 (fr) 2005-03-24
IL174113A0 (en) 2006-08-01
EP1665821A4 (fr) 2006-11-02
WO2005027390A3 (fr) 2006-03-30

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