EP1639642A2 - Economical high-frequency package - Google Patents

Economical high-frequency package

Info

Publication number
EP1639642A2
EP1639642A2 EP04741915A EP04741915A EP1639642A2 EP 1639642 A2 EP1639642 A2 EP 1639642A2 EP 04741915 A EP04741915 A EP 04741915A EP 04741915 A EP04741915 A EP 04741915A EP 1639642 A2 EP1639642 A2 EP 1639642A2
Authority
EP
European Patent Office
Prior art keywords
component
circuit carrier
film
frequency
components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04741915A
Other languages
German (de)
French (fr)
Inventor
Gernot Schimetta
Karl Weidner
Jörg ZAPF
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP1639642A2 publication Critical patent/EP1639642A2/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3164—Partial encapsulation or coating the coating being a foil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Definitions

  • hermetically sealed high-frequency packages for modules mainly consist of milled metal housings, which are gold-plated and then sealed with a soldered-on metal cover.
  • Hermetic single-component ceramic housings, such as those used for OF components, are also expensive and less suitable for components with high power dissipation.
  • Usual HF metal housings as they are often used for modules, if no hermeticity but good shielding is necessary, are very expensive, very large and not hermetically sealed.
  • RF module housings based on the latest LTCC technology are also expensive.
  • the ceramic only serves to guide the cable while the cover is being soldered on.
  • Typical OF filter housings which are based on HTCC technology, are roll seam welded and can be used up to approx. 5 GHz for components without high power dissipation.
  • the cover welding is complex and the housings can only be used for a limited frequency range.
  • DE 100 41 770 A1 discloses a substrate with a first dielectric layer, a high-frequency structure layer, which contains a high-frequency distribution network, and at least one low-frequency structure layer.
  • a module thus formed also includes a cover.
  • From WO 97/45955 AI, WO 99/43084 AI, DE 195 48 048 AI and DE 198 18 824 AI electronic components located on circuit carriers are known, which are covered with covers, in particular in the form of foils. Metal foils used here have proven to be very difficult to handle and often have not proven to be long-term.
  • the object of the invention is to specify an inexpensive method for producing a high-frequency package.
  • a circuit carrier is connected to a component via contacts which space the component from the circuit carrier, so that cavities are formed between the component, the circuit carrier and the contacts.
  • a film is applied to the component and the circuit carrier in such a way that it lies closely against the surface of the circuit carrier on which the component is located and on the sides of the component not facing the circuit carrier. After it has been applied to the component and the circuit carrier, the film is provided with a metallization.
  • the metallization is preferably applied by sputtering or vapor deposition and then galvanically reinforced.
  • a window can be opened in the film on the side of the component facing away from the circuit carrier, through which window the component can be contacted. If the window is opened before the film is metallized, the contact can be made immediately by the metallization.
  • a solder bump is applied to the side of the circuit carrier on which the component is attached. This solder bump projects above the component in that it is higher than the component when viewed from the circuit carrier.
  • the package consisting of circuit carrier, component, foil and metallization of the foil on the side on which the component is arranged on the circuit carrier can be electrically connected to, for example, another circuit carrier via the solder bump.
  • the component is in particular an active component, a high-frequency component and / or a high-frequency component.
  • one or more passive components can also be arranged on the circuit carrier.
  • the passive components are preferably arranged on the side of the circuit carrier opposite the component.
  • FIG. 1 shows a circuit carrier equipped on one side with screen-printed solder bumps on the rear of the circuit carrier
  • Figure 2 shows a double-sided circuit carrier with attached solder balls or solder bumps on the front of the circuit carrier and a surface-mounted passive component on the back of the circuit carrier.
  • Components 1 in the form of chips are bumped and, in the case of printed contacts 2 in the form of solder bumps, these are remelted.
  • a circuit carrier 3 can also be bumped.
  • the components 1 are separated, dipped upside down with the contacts 2 into flux and placed on connection pads of the circuit carrier 3, for example made of ceramic. This creates cavities 4 between the component 1, the contacts 2 and the circuit carrier 3.
  • a film 5 is laminated over the entire surface of the components 1 and removed at contact points and on the module edges (saw marks), for example by means of a laser.
  • the film 5 is provided with a metallization 6, for example by means of Cu sputtering, which is optionally galvanically reinforced.
  • one or more frames 12 run in the form of metallizations on the ceramic on which the film 5 has been removed.
  • the metal shielding stretched over the components 1 in the form of the metallization 6 is connected directly to the circuit carrier 3. This creates a hermetic package.
  • the contacts 2 in the form of bumps in the cavities 4 are surrounded by air, that is to say the dielectric constant between the contacts 2 is approximately 1, use in high-frequency technology is possible.
  • Components with high losses for example GaAs chips, can be ground thin before they are put on.
  • a window 7 cut freely in the photo by means of a laser or the like lie 5 on the side of the component 1 facing away from the circuit carrier 3 enables the copper metallization 6 to be contacted directly on the component surface. The heat dissipation is thus not hindered by the film 5. In the same way, a ground connection of the component substrate back can be realized.
  • a contact element 8 in the form of a solder bump is arranged on the side of the circuit carrier 3 opposite the component 1.
  • a passive component 9 is arranged on the side of the circuit carrier 3 opposite the component 1 and is soldered to solder 10.
  • a contact element 11 in the form of a solder bump is arranged, which rises higher above the surface of the circuit carrier 3 than the component 1 with the contacts 2.
  • the variants shown represent only preferred embodiments.
  • Si or GaAs chips can also be used in mixed assembly.
  • LTCC ceramics have been tested as substrates for the circuit carrier, other ceramics, such as HTCC or Al2O3, or organic substrates, such as FR5, with the lowest possible expansion coefficients are also conceivable.
  • the embodiment according to FIG. 1 can be made pick & place-capable, for example, by a casting compound, which enables inexpensive assembly.
  • chips need to be contacted by wire bonding, they can either be arranged on the back or can also be inserted under the shielding film 5 with a protective cover.
  • Cooling of components is possible, for example by applying heat sinks,

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Wire Bonding (AREA)
  • Microwave Amplifiers (AREA)

Abstract

The invention relates to an economical high-frequency package whereby a component is connected to a circuit carrier by means of contacts which place the component at a distance from the circuit carrier, a film is applied to the component, and the film is coated with metal.

Description

Beschreibungdescription
Kostengünstiges Hochfrequenz-PackageInexpensive high-frequency package
Herkömmliche, hermetisch dichte Hochfrequenz-Packages für Module bestehen vorwiegend aus gefrästen Metallgehäusen, die vergoldet und anschließend mit einem aufgelöteten Metalldeckel verschlossen werden. Hermetische Einzelbauteil-Keramikgehäuse, wie sie beispielsweise für OF -Bauteile verwendet werden, sind ebenfalls kostenintensiv und für Bauteile mit hohen Verlustleistungen weniger geeignet.Conventional, hermetically sealed high-frequency packages for modules mainly consist of milled metal housings, which are gold-plated and then sealed with a soldered-on metal cover. Hermetic single-component ceramic housings, such as those used for OF components, are also expensive and less suitable for components with high power dissipation.
Übliche HF-Metallgehäuse, wie sie oft für Module eingesetzt werden, wenn keine Hermetizität aber eine gute Abschirmung notwendig ist, sind sehr teuer, sehr groß und nicht hermetisch dicht.Usual HF metal housings, as they are often used for modules, if no hermeticity but good shielding is necessary, are very expensive, very large and not hermetically sealed.
Ebenfalls teuer sind auf neuester LTCC-Technologie basierende HF-Modulgehäuse. Hierbei dient die Keramik nur der Leitungs- führung, während der Deckel aufgelötet wird.RF module housings based on the latest LTCC technology are also expensive. In this case, the ceramic only serves to guide the cable while the cover is being soldered on.
Typische OF -Filtergehäuse, die auf HTCC-Technologie basieren, werden Rollnaht-verschweißt und sind bis ca. 5 GHz für Bauteile ohne hohe Verlustleistung verwendbar. Die Deckelver- schweißung ist allerdings aufwändig und die Gehäuse sind nur für einen beschränkten Frequenzbereich einsetzbar.Typical OF filter housings, which are based on HTCC technology, are roll seam welded and can be used up to approx. 5 GHz for components without high power dissipation. However, the cover welding is complex and the housings can only be used for a limited frequency range.
Aktuelle, hermetische CSP-Gehäuse sind wegen der im Hochfrequenzbereich zu verwendenden Au-Sn-aufgelöteten Deckel eben- falls teuer.Current, hermetic CSP housings are also expensive because of the Au-Sn soldered covers to be used in the high frequency range.
Aus DE 100 41 770 AI ist ein Substrat mit einer ersten dielektrischen Lage, einer Hochfrequenzstrukturlage, die ein Hochfrequenz-Verteilernetzwerk beinhaltet, und mindestens ei- ner Niederfrequenzstrukturlage bekannt. Ein damit gebildetes Modul beinhaltet weiterhin einen Deckel. Aus WO 97/45955 AI, WO 99/43084 AI, DE 195 48 048 AI und DE 198 18 824 AI sind auf Schaltungsträgern befindliche elektronische Bauelemente bekannt, die mit Abdeckungen, insbesondere in Form von Folien, überzogen sind. Hierbei verwendete Me- tallfolien haben sich als sehr schwierig zu handhaben und oft nicht langzeitbeständig herausgestellt.DE 100 41 770 A1 discloses a substrate with a first dielectric layer, a high-frequency structure layer, which contains a high-frequency distribution network, and at least one low-frequency structure layer. A module thus formed also includes a cover. From WO 97/45955 AI, WO 99/43084 AI, DE 195 48 048 AI and DE 198 18 824 AI electronic components located on circuit carriers are known, which are covered with covers, in particular in the form of foils. Metal foils used here have proven to be very difficult to handle and often have not proven to be long-term.
Davon ausgehend liegt der Erfindung die Aufgabe zugrunde, ein kostengünstiges Verfahren zur Herstellung eines Hochfrequenz- Packages anzugeben.Proceeding from this, the object of the invention is to specify an inexpensive method for producing a high-frequency package.
Diese Aufgabe wird durch die in den unabhängigen Ansprüchen angegebenen Erfindungen gelöst. Vorteilhafte Ausgestaltungen ergeben sich aus den abhängigen Ansprüchen.This object is achieved by the inventions specified in the independent claims. Advantageous refinements result from the dependent claims.
Dementsprechend wird ein Schaltungsträger mit einem Bauelement über Kontakte verbunden, die das Bauelement gegenüber dem Schaltungsträger beabstanden, so dass zwischen dem Bauelement, dem Schaltungsträger und den Kontakten Hohlräume ge- bildet werden. Auf das Bauelement und den Schaltungsträger wird eine Folie so aufgebracht, dass sie eng an der Oberfläche des Schaltungsträgers, auf der sich das Bauelement befindet, und an den nicht dem Schaltungsträger zugewandten Seiten des Bauelementes anliegt. Nach ihrem Aufbringen auf das Bau- element und den Schaltungsträger wird die Folie mit einer Metallisierung versehen.Accordingly, a circuit carrier is connected to a component via contacts which space the component from the circuit carrier, so that cavities are formed between the component, the circuit carrier and the contacts. A film is applied to the component and the circuit carrier in such a way that it lies closely against the surface of the circuit carrier on which the component is located and on the sides of the component not facing the circuit carrier. After it has been applied to the component and the circuit carrier, the film is provided with a metallization.
Vorzugsweise wird die Metallisierung durch Sputtern oder Bedampfen aufgebracht und anschließend galvanisch verstärkt.The metallization is preferably applied by sputtering or vapor deposition and then galvanically reinforced.
In der Folie kann auf der dem Schaltungsträger abgewandten Seite des Bauelementes ein Fenster geöffnet werden, über das das Bauelement kontaktierbar ist. Erfolgt das Öffnen des Fensters vor dem Metallisieren der Folie, so kann der Kontakt gleich durch die Metallisierung hergestellt werden. In einer besonders ausgeklügelten Weiterbildung der Erfindung wird ein Lotbump auf der Seite des Schaltungsträgers aufgebracht, auf der das Bauelement angebracht ist. Dieser Lotbump überragt das Bauelement, indem er vom Schaltungsträger aus gesehen höher als das Bauelement ist. Dadurch kann das durch Schaltungsträger, Bauelement, Folie und Metallisierung der Folie bestehende Package auf der Seite, auf der das Bauelement am Schaltungsträger angeordnet ist, über den Lotbump mit beispielsweise einem weiteren Schaltungsträger elektrisch verbunden werden.A window can be opened in the film on the side of the component facing away from the circuit carrier, through which window the component can be contacted. If the window is opened before the film is metallized, the contact can be made immediately by the metallization. In a particularly sophisticated development of the invention, a solder bump is applied to the side of the circuit carrier on which the component is attached. This solder bump projects above the component in that it is higher than the component when viewed from the circuit carrier. As a result, the package consisting of circuit carrier, component, foil and metallization of the foil on the side on which the component is arranged on the circuit carrier can be electrically connected to, for example, another circuit carrier via the solder bump.
Das Bauelement ist insbesondere ein aktives Bauelement, ein Hochfrequenz-Bauelement und/oder ein Höchstfrequenz- Bauelement .The component is in particular an active component, a high-frequency component and / or a high-frequency component.
Über das Bauelement hinaus können am Schaltungsträger noch ein oder mehrere passive Bauelemente angeordnet sein. Die passiven Bauelemente sind vorzugsweise auf der dem Bauelement gegenüberliegenden Seite des Schaltungsträgers angeordnet.In addition to the component, one or more passive components can also be arranged on the circuit carrier. The passive components are preferably arranged on the side of the circuit carrier opposite the component.
Weitere Vorteile und Merkmale der Erfindung ergeben sich aus der Beschreibung von Ausführungsbeispielen anhand der Zeichnung. Dabei zeigt:Further advantages and features of the invention result from the description of exemplary embodiments with reference to the drawing. It shows:
Figur 1 einen einseitig bestückten Schaltungsträger mit siebgedruckten Lotbumps auf der Schaltungsträgerrückseite;1 shows a circuit carrier equipped on one side with screen-printed solder bumps on the rear of the circuit carrier;
Figur 2 einen doppelseitig bestückten Schaltungsträger mit aufgesetzten Lotkugeln bzw. Lotbumps auf der Schaltungsträgervorderseite und einem oberflächenmontierten passiven Bauelement auf der Schaltungsträgerrückseite.Figure 2 shows a double-sided circuit carrier with attached solder balls or solder bumps on the front of the circuit carrier and a surface-mounted passive component on the back of the circuit carrier.
Die Prozessierung von Packages erfolgt im Nutzen und kann beispielsweise wie im Folgenden ausgeführt erfolgen. Entspre- chend der Universalität der Erfindung sind zahlreiche Änderungen in der Prozesskette möglich.The processing of packages takes place in the benefit and can for example be carried out as follows. correspond According to the universality of the invention, numerous changes in the process chain are possible.
Bauelemente 1 in Form von Chips werden gebumpt und bei ge- druckten Kontakten 2 in Form von Lotbumps werden diese umgeschmolzen. Alternativ kann auch ein Schaltungsträger 3 gebumpt werden.Components 1 in the form of chips are bumped and, in the case of printed contacts 2 in the form of solder bumps, these are remelted. Alternatively, a circuit carrier 3 can also be bumped.
Die Bauelemente 1 werden vereinzelt, umgedreht mit den Kon- takten 2 in Flussmittel gedippt und auf Anschlusspads des beispielsweise in Keramik ausgeführten Schaltungsträgers 3 platziert. Dabei entstehen zwischen dem Bauelement 1, den Kontakten 2 und dem Schaltungsträger 3 Hohlräume 4.The components 1 are separated, dipped upside down with the contacts 2 into flux and placed on connection pads of the circuit carrier 3, for example made of ceramic. This creates cavities 4 between the component 1, the contacts 2 and the circuit carrier 3.
Anschließend wird eine Folie 5 ganzflächig über die Bauelemente 1 laminiert und an Kontaktierstellen sowie an den Modulrändern (Sägespuren) beispielsweise mittels Laser abgetragen.Then a film 5 is laminated over the entire surface of the components 1 and removed at contact points and on the module edges (saw marks), for example by means of a laser.
Die Folie 5 wird durch ganzflächiges Beschichten beispielsweise mittels Cu-Sputterns mit einer Metallisierung 6 versehen, die gegebenenfalls galvanisch verstärkt wird.The film 5 is provided with a metallization 6, for example by means of Cu sputtering, which is optionally galvanically reinforced.
Vorzugsweise laufen auf dem Schaltungsträger 3 ein oder meh- rere Rahmen 12 in Form von Metallisierungen auf der Keramik um, bei denen die Folie 5 abgetragen wurde. Hier ist die über die Bauelemente 1 gespannte Metallabschirmung in Form der Metallisierung 6 direkt mit dem Schaltungsträger 3 verbunden. Dadurch wird ein hermetisches Package gebildet.Preferably, one or more frames 12 run in the form of metallizations on the ceramic on which the film 5 has been removed. Here, the metal shielding stretched over the components 1 in the form of the metallization 6 is connected directly to the circuit carrier 3. This creates a hermetic package.
Da die Kontakte 2 in Form von Bumps in den Hohlräumen 4 mit Luft umgeben sind, also die Dielektrizitätskonstante zwischen den Kontakten 2 in etwa 1 beträgt, ist eine Verwendung bis in die Hochstfrequenztechnik möglich. Bauelemente mit hohen Ver- lustleistungen, beispielsweise GaAs-Chips, können dünngeschliffen werden, bevor sie aufgesetzt werden. Ein mittels Laser oder ähnlichem frei geschnittenes Fenster 7 in der Fo- lie 5 auf der dem Schaltungsträger 3 abgewandten Seite des Bauelementes 1 ermöglicht, dass die Kupfer-Metallisierung 6 direkt auf der Bauelementeoberfläche kontaktiert wird. Die Wärmeabfuhr wird somit nicht durch die Folie 5 behindert. In gleicher Weise kann eine Masseanbindung der Bauelementsub- stratrückseite realisiert werden.Since the contacts 2 in the form of bumps in the cavities 4 are surrounded by air, that is to say the dielectric constant between the contacts 2 is approximately 1, use in high-frequency technology is possible. Components with high losses, for example GaAs chips, can be ground thin before they are put on. A window 7 cut freely in the photo by means of a laser or the like lie 5 on the side of the component 1 facing away from the circuit carrier 3 enables the copper metallization 6 to be contacted directly on the component surface. The heat dissipation is thus not hindered by the film 5. In the same way, a ground connection of the component substrate back can be realized.
In der Ausführungsform nach Figur 1 ist auf der dem Bauelement 1 gegenüberliegenden Seite des Schaltungsträgers 3 ein Kontaktelement 8 in Form eines Lotbumps angeordnet.In the embodiment according to FIG. 1, a contact element 8 in the form of a solder bump is arranged on the side of the circuit carrier 3 opposite the component 1.
In der A sführungsform nach Figur 2 ist auf der dem Bauelement 1 gegenüberliegenden Seite des Schaltungsträgers 3 ein passives Bauelement 9 angeordnet und mit Lot 10 verlötet.In the embodiment according to FIG. 2, a passive component 9 is arranged on the side of the circuit carrier 3 opposite the component 1 and is soldered to solder 10.
Weiterhin ist auf der Seite des Schaltungsträgers 3, auf der sich das Bauelement 1 befindet, ein Kontaktelement 11 in Form eines Lotbumps angeordnet, das höher über der Oberfläche des Schaltungsträgers 3 aufragt als das Bauelement 1 mit den Kon- takten 2.Furthermore, on the side of the circuit carrier 3 on which the component 1 is located, a contact element 11 in the form of a solder bump is arranged, which rises higher above the surface of the circuit carrier 3 than the component 1 with the contacts 2.
Die dargestellten Varianten stellen nur bevorzugte Ausfüh- rungsformen dar. Als Bauelemente kommen beispielsweise Si- oder GaAs-Chips auch in gemischter Bestückung in Frage. Als Substrate für den Schaltungsträger sind LTCC-Keramiken erprobt, andere Keramiken, wie etwa HTCC oder AI2O3, oder organische Substrate, wie etwa FR5, mit möglichst geringen Ausdehnungskoeffizienten sind ebenso denkbar. Die Ausführungsform nach Figur 1 kann beispielsweise durch eine Vergussmasse pick&place-fähig gemacht werden, was eine kostengünstige Bestückung ermöglicht.The variants shown represent only preferred embodiments. As components, for example, Si or GaAs chips can also be used in mixed assembly. LTCC ceramics have been tested as substrates for the circuit carrier, other ceramics, such as HTCC or Al2O3, or organic substrates, such as FR5, with the lowest possible expansion coefficients are also conceivable. The embodiment according to FIG. 1 can be made pick & place-capable, for example, by a casting compound, which enables inexpensive assembly.
Müssen Chips durch Drahtbonden kontaktiert werden, so können diese entweder rückseitig angeordnet oder auch mit einem Schutzdeckel unter die Schirmungsfolie 5 eingebracht werden. Allen Ausführungsformen der Erfindung sind folgende Vorteile zu eigen:If chips need to be contacted by wire bonding, they can either be arranged on the back or can also be inserted under the shielding film 5 with a protective cover. The following advantages are inherent in all embodiments of the invention:
- Höchstfrequenztauglichkeit {> 20 GHz) , da kein Underfill (ε = 1 zwischen den Bumps), kurze, konstant lange Signallaufzeiten (Flip-Chip statt Wire Bonds) ,- Maximum frequency suitability {> 20 GHz), since there is no underfill (ε = 1 between the bumps), short, constantly long signal delays (flip chip instead of wire bonds),
- hermetische Dichtigkeit und ESD-Abschirmung bei sehr geringen Kosten durch Fertigung im Nutzen,- hermetic tightness and ESD shielding at very low cost due to manufacturing in the panel,
- Entwärmung von Bauelementen möglich, beispielsweise durch Applizieren von Kühlkörpern,Cooling of components is possible, for example by applying heat sinks,
- Universalität: verschiedene Bauelemente- und Schaltungsträgersubstrate kombinierbar mit HTCC- und LTCC-Technik, SMD- Bauteile können beispielsweise auf der Schaltungsträgerrückseite montiert werden, - leicht an verschiedene Packagetypen anpassbar. - Universality: different component and circuit carrier substrates can be combined with HTCC and LTCC technology, SMD components can be mounted on the back of the circuit carrier, for example - easily adaptable to different package types.

Claims

Patentansprüche claims
1. Verfahren, bei dem1. Procedure in which
- ein Schaltungsträger (3) mit einem Bauelement (1) über Kontakte (2) verbunden wird, die das Bauelement (1) gegenüber dem Schaltungsträger (3) beabstanden,a circuit carrier (3) is connected to a component (1) via contacts (2) which space the component (1) from the circuit carrier (3),
- eine Folie (5) auf das Bauelement (1) und den Schaltungsträger (3) aufgebracht wird,a film (5) is applied to the component (1) and the circuit carrier (3),
- die Folie (5) metallisiert wird.- The film (5) is metallized.
2. Verfahren nach Anspruch 1, bei dem die Metallisierung (6) der Folie (5) galvanisch verstärkt wird.2. The method according to claim 1, wherein the metallization (6) of the film (5) is galvanically reinforced.
3. Verfahren nach einem der vorhergehenden Ansprüche, bei dem in der Folie (5) auf der dem Schaltungsträger (3) abgewandten Seite des Bauelements (1) ein Fenster (7) geöffnet wird.3. The method according to any one of the preceding claims, in which a window (7) is opened in the film (5) on the side of the component (1) facing away from the circuit carrier (3).
4. Verfahren nach einem der vorhergehenden Ansprüche, bei dem auf dem Schaltungsträger (3) ein Kontaktelement (8, 11) , insbesondere ein Lotbump, aufgebracht wird.4. The method according to any one of the preceding claims, in which a contact element (8, 11), in particular a solder bump, is applied to the circuit carrier (3).
5. Verfahren nach Anspruch 4, bei dem das Kontaktelement (11) auf der Seite des Schaltungsträgers (3) aufgebracht wird, auf der das Bauelement (1) angeordnet ist, und das Bauelement (1) überragt.5. The method according to claim 4, wherein the contact element (11) is applied to the side of the circuit carrier (3) on which the component (1) is arranged, and projects above the component (1).
6. Verfahren nach einem der vorhergehenden Ansprüche, bei dem das Bauelement (1) ein Hochfrequenzbauelement ist, insbesondere ein Höchstfrequenzbauelement .6. The method according to any one of the preceding claims, wherein the component (1) is a high-frequency component, in particular a high-frequency component.
7. Verfahren nach einem der vorhergehenden Ansprüche, bei dem am Schaltungsträger (3) ein passives Bauelement (9) angeordnet wird.7. The method according to any one of the preceding claims, in which a passive component (9) is arranged on the circuit carrier (3).
8. Verf hren nach Anspruch 7 , bei dem das passive Bauelement (9) auf der dem Bauelement (1) gegenüberliegenden Seite des Schaltungsträgers (3) angeordnet wird.8. The method according to claim 7, in which the passive component (9) is arranged on the side of the circuit carrier (3) opposite the component (1).
9. Hochfrequenz-Package, das nach einem Verfahren nach einem der Ansprüche 1 bis 8 hergestellt ist. 9. High-frequency package, which is produced by a method according to any one of claims 1 to 8.
EP04741915A 2003-06-30 2004-06-29 Economical high-frequency package Withdrawn EP1639642A2 (en)

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DE10329329A DE10329329B4 (en) 2003-06-30 2003-06-30 High frequency housing and method for its manufacture
PCT/EP2004/051282 WO2005001934A2 (en) 2003-06-30 2004-06-29 High-frequency package

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Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100691160B1 (en) * 2005-05-06 2007-03-09 삼성전기주식회사 A Stack Type Surface Acoustic Wave Package and Fabrication Method Thereof
KR100703090B1 (en) * 2005-08-30 2007-04-06 삼성전기주식회사 A Back Side Ground Type Flip Chip Semiconductor Package
DE102006025162B3 (en) * 2006-05-30 2008-01-31 Epcos Ag Flip-chip device and method of manufacture
DE102010054782A1 (en) 2010-12-16 2012-06-21 Epcos Ag Housing electrical component
JP5799541B2 (en) 2011-03-25 2015-10-28 株式会社ソシオネクスト Semiconductor device and manufacturing method thereof
FR2984882A1 (en) 2011-12-23 2013-06-28 Saint Gobain Ct Recherches PROCESS FOR PRODUCING A MESOPOROUS PRODUCT
KR101356791B1 (en) 2012-01-20 2014-01-27 한국과학기술원 film-type supercapacitors and method for fabricating the same
CN105702664A (en) * 2012-11-16 2016-06-22 日月光半导体制造股份有限公司 Semiconductor package structure and manufacturing method thereof
US9484313B2 (en) * 2013-02-27 2016-11-01 Advanced Semiconductor Engineering, Inc. Semiconductor packages with thermal-enhanced conformal shielding and related methods
DE112015002947A5 (en) 2014-06-23 2017-03-16 Epcos Ag Housing for an electrical component and method for producing a housing for an electrical component
CN106816420A (en) * 2015-11-30 2017-06-09 讯芯电子科技（中山）有限公司 A kind of acoustic elecment encapsulating structure and its manufacture method
US10741501B1 (en) * 2018-10-22 2020-08-11 Keysight Technologies, Inc. Systems and methods for sheathing electronic components

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4967262A (en) * 1989-11-06 1990-10-30 Micron Technology, Inc. Gull-wing zig-zag inline lead package having end-of-package anchoring pins
US6274391B1 (en) * 1992-10-26 2001-08-14 Texas Instruments Incorporated HDI land grid array packaged device having electrical and optical interconnects
US5477082A (en) * 1994-01-11 1995-12-19 Exponential Technology, Inc. Bi-planar multi-chip module
US5639989A (en) * 1994-04-19 1997-06-17 Motorola Inc. Shielded electronic component assembly and method for making the same
FR2728392A1 (en) * 1994-12-16 1996-06-21 Bull Sa METHOD AND SUPPORT FOR CONNECTING AN INTEGRATED CIRCUIT TO ANOTHER SUPPORT THROUGH BALLS
DE69621983T2 (en) * 1995-04-07 2002-11-21 Shinko Electric Ind Co Structure and method of assembling a semiconductor chip
DE19548048C2 (en) * 1995-12-21 1998-01-15 Siemens Matsushita Components Electronic component, in particular component working with surface acoustic waves (SAW component)
JPH11510666A (en) * 1996-05-24 1999-09-14 シーメンス マツシタ コンポーネンツ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング ウント コンパニコマンデイート ゲゼルシヤフト Electronic devices, especially devices operated by surface acoustic waves-SAW devices
US5899705A (en) * 1997-11-20 1999-05-04 Akram; Salman Stacked leads-over chip multi-chip module
DE19806818C1 (en) * 1998-02-18 1999-11-04 Siemens Matsushita Components Method for producing an electronic component, in particular an SAW component working with acoustic surface waves
DE19818824B4 (en) * 1998-04-27 2008-07-31 Epcos Ag Electronic component and method for its production
FR2799883B1 (en) * 1999-10-15 2003-05-30 Thomson Csf METHOD OF ENCAPSULATING ELECTRONIC COMPONENTS
DE10002852A1 (en) * 2000-01-24 2001-08-02 Infineon Technologies Ag Shielding device and electrical component with a shielding device
DE10016867A1 (en) * 2000-04-05 2001-10-18 Epcos Ag Component with labeling
TW445612B (en) * 2000-08-03 2001-07-11 Siliconware Precision Industries Co Ltd Solder ball array structure to control the degree of collapsing
DE10136743B4 (en) * 2001-07-27 2013-02-14 Epcos Ag Method for the hermetic encapsulation of a component
DE10142542A1 (en) * 2001-08-30 2003-03-27 Infineon Technologies Ag Arrangement of semiconductor chip in chip carrier housing has conductive coating applied to semiconductor chip on opposite side to chip carrier
DE10164502B4 (en) * 2001-12-28 2013-07-04 Epcos Ag Method for the hermetic encapsulation of a component
TW517368B (en) * 2002-01-22 2003-01-11 Via Tech Inc Manufacturing method of the passivation metal on the surface of integrated circuit
DE10256945A1 (en) * 2002-12-05 2004-06-17 Epcos Ag Multi-chip electronic device and method of manufacture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2005001934A2 *

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KR100697434B1 (en) 2007-03-20
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CN100382306C (en) 2008-04-16
JP2006510235A (en) 2006-03-23
WO2005001934A2 (en) 2005-01-06
DE10329329A1 (en) 2005-02-17
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US20060162157A1 (en) 2006-07-27
WO2005001934A3 (en) 2005-05-12

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