EP1638074A3 - Image display circuitry and mobile electronic device - Google Patents

Image display circuitry and mobile electronic device Download PDF

Info

Publication number
EP1638074A3
EP1638074A3 EP05026755A EP05026755A EP1638074A3 EP 1638074 A3 EP1638074 A3 EP 1638074A3 EP 05026755 A EP05026755 A EP 05026755A EP 05026755 A EP05026755 A EP 05026755A EP 1638074 A3 EP1638074 A3 EP 1638074A3
Authority
EP
European Patent Office
Prior art keywords
frame
image data
data
dtrw
image display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05026755A
Other languages
German (de)
French (fr)
Other versions
EP1638074A2 (en
Inventor
Hiroaki Shibayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of EP1638074A2 publication Critical patent/EP1638074A2/en
Publication of EP1638074A3 publication Critical patent/EP1638074A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G09G5/397—Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/12—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels
    • G09G2340/125—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels wherein one of the images is motion video
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/127—Updating a frame memory using a transfer of data from a source area to a destination area
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/391—Resolution modifying circuits, e.g. variable screen formats

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Studio Circuits (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

An image display circuitry comprises frame buffers 32 - 34 for storing image data DTAW, DTRW and logical combining data DTCW respectively, and a combining circuit 46. Data buses and address buses of the frame buffers 32 and 34 are time-sharingly controllable from an MPU independently of those of the frame buffer 33. Each frame of the image data DTRW is synchronized with a vertical synchronizing signal, and stored to the frame buffer 33. Each frame of the image data DTAW and the logical combining data DTCW is separately and independently stored to the frame buffers 32 and 34 by the MPU within a storage period of a corresponding frame of the image data DTRW. The combining circuit 46 combines image data DTAR and DTBR pixel by pixel on the basis of logical combining data DTCR within a specified period during a vertical retrace period.
EP05026755A 2002-02-13 2003-02-12 Image display circuitry and mobile electronic device Withdrawn EP1638074A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002035136A JP2003233366A (en) 2002-02-13 2002-02-13 Display composing circuit and portable electronic equipment
EP03003067A EP1339037A1 (en) 2002-02-13 2003-02-12 Image display circuitry and mobile electronic device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
EP03003067A Division EP1339037A1 (en) 2002-02-13 2003-02-12 Image display circuitry and mobile electronic device

Publications (2)

Publication Number Publication Date
EP1638074A2 EP1638074A2 (en) 2006-03-22
EP1638074A3 true EP1638074A3 (en) 2008-03-12

Family

ID=27654961

Family Applications (2)

Application Number Title Priority Date Filing Date
EP03003067A Withdrawn EP1339037A1 (en) 2002-02-13 2003-02-12 Image display circuitry and mobile electronic device
EP05026755A Withdrawn EP1638074A3 (en) 2002-02-13 2003-02-12 Image display circuitry and mobile electronic device

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP03003067A Withdrawn EP1339037A1 (en) 2002-02-13 2003-02-12 Image display circuitry and mobile electronic device

Country Status (5)

Country Link
US (1) US20030174138A1 (en)
EP (2) EP1339037A1 (en)
JP (1) JP2003233366A (en)
CN (1) CN1238785C (en)
HK (1) HK1058569A1 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005115896A (en) * 2003-10-10 2005-04-28 Nec Corp Communication apparatus and method
US20070038939A1 (en) * 2005-07-11 2007-02-15 Challen Richard F Display servers and systems and methods of graphical display
US7847793B2 (en) * 2005-12-08 2010-12-07 Semiconductor Energy Laboratory Co., Ltd. Control circuit of display device, and display device and electronic appliance incorporating the same
KR100852615B1 (en) * 2006-04-27 2008-08-18 팅크웨어(주) System and method for expressing map according to change season and topography
US8412269B1 (en) * 2007-03-26 2013-04-02 Celio Technology Corporation Systems and methods for providing additional functionality to a device for increased usability
JP5255397B2 (en) * 2008-10-15 2013-08-07 パナソニック株式会社 Image display method and display
JP5634128B2 (en) * 2010-05-24 2014-12-03 三菱電機株式会社 Video display method
CN104737512B (en) * 2012-10-11 2019-04-19 三星电子株式会社 Device and method for being transmitted in hybrid network and receiving multi-medium data
US10339544B2 (en) * 2014-07-02 2019-07-02 WaitTime, LLC Techniques for automatic real-time calculation of user wait times
US10782765B2 (en) * 2016-01-13 2020-09-22 Samsung Electronics Co., Ltd Method and electronic device for outputting image

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5610630A (en) * 1991-11-28 1997-03-11 Fujitsu Limited Graphic display control system
US6157396A (en) * 1999-02-16 2000-12-05 Pixonics Llc System and method for using bitstream information to process images for use in digital display systems
US20020012398A1 (en) * 1999-12-20 2002-01-31 Minhua Zhou Digital still camera system and method

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12398A (en) * 1855-02-13 Improvement in plows
US13161A (en) * 1855-07-03 Mill-step
JPS63178294A (en) * 1987-01-20 1988-07-22 日本電気株式会社 Graphic display device
US4907086A (en) * 1987-09-04 1990-03-06 Texas Instruments Incorporated Method and apparatus for overlaying a displayable image with a second image
US5289577A (en) * 1992-06-04 1994-02-22 International Business Machines Incorporated Process-pipeline architecture for image/video processing
JPH06266844A (en) * 1992-08-20 1994-09-22 Internatl Business Mach Corp <Ibm> Method and equipment for discriminating raster data picture and vector data picture
US5946646A (en) * 1994-03-23 1999-08-31 Digital Broadband Applications Corp. Interactive advertising system and device
US5544306A (en) * 1994-05-03 1996-08-06 Sun Microsystems, Inc. Flexible dram access in a frame buffer memory and system
US5982390A (en) * 1996-03-25 1999-11-09 Stan Stoneking Controlling personality manifestations by objects in a computer-assisted animation environment
JP3419645B2 (en) * 1997-03-14 2003-06-23 株式会社日立国際電気 Moving image editing method
JP3681528B2 (en) * 1997-12-22 2005-08-10 株式会社ルネサステクノロジ Graphic processor and data processing system
US6888577B2 (en) * 2000-01-24 2005-05-03 Matsushita Electric Industrial Co., Ltd. Image compositing device, recording medium, and program
WO2001055969A1 (en) * 2000-01-28 2001-08-02 Namco Ltd. Game system and image creating method
US6731952B2 (en) * 2000-07-27 2004-05-04 Eastman Kodak Company Mobile telephone system having a detachable camera / battery module
US6791553B1 (en) * 2000-11-17 2004-09-14 Hewlett-Packard Development Company, L.P. System and method for efficiently rendering a jitter enhanced graphical image

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5610630A (en) * 1991-11-28 1997-03-11 Fujitsu Limited Graphic display control system
US6157396A (en) * 1999-02-16 2000-12-05 Pixonics Llc System and method for using bitstream information to process images for use in digital display systems
US20020012398A1 (en) * 1999-12-20 2002-01-31 Minhua Zhou Digital still camera system and method

Also Published As

Publication number Publication date
HK1058569A1 (en) 2004-05-21
JP2003233366A (en) 2003-08-22
EP1638074A2 (en) 2006-03-22
EP1339037A1 (en) 2003-08-27
US20030174138A1 (en) 2003-09-18
CN1438571A (en) 2003-08-27
CN1238785C (en) 2006-01-25

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