EP1588266A1 - Defragmentation de memoire concernant en particulier un support de donnees portable - Google Patents

Defragmentation de memoire concernant en particulier un support de donnees portable

Info

Publication number
EP1588266A1
EP1588266A1 EP04703171A EP04703171A EP1588266A1 EP 1588266 A1 EP1588266 A1 EP 1588266A1 EP 04703171 A EP04703171 A EP 04703171A EP 04703171 A EP04703171 A EP 04703171A EP 1588266 A1 EP1588266 A1 EP 1588266A1
Authority
EP
European Patent Office
Prior art keywords
area
data
memory
block
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04703171A
Other languages
German (de)
English (en)
Inventor
Frank Schmalz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giesecke and Devrient GmbH
Original Assignee
Giesecke and Devrient GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giesecke and Devrient GmbH filed Critical Giesecke and Devrient GmbH
Publication of EP1588266A1 publication Critical patent/EP1588266A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management

Definitions

  • the invention relates to the technical field of memory management and more particularly to the field of memory defragmentation.
  • the invention is particularly suitable for use with portable data carriers.
  • portable data carriers can be, for example, smart cards in different designs or chip modules.
  • the invention can also be used to defragment a non-volatile writable semiconductor memory in other resource-limited systems.
  • portable data carriers have a microcontroller with a processor core and several different memory fields.
  • at least one of these memory fields is designed as a non-volatile writable semiconductor memory, for example as an EEPROM or as a flash memory.
  • This storage field can be used, for example, to hold a file system in accordance with the ISO / IEC 7816-4 standard or to store objects and data fields (arrays) in a Java Card TM runtime environment.
  • EP 1 046 996 AI shows a method for memory defragmentation in chip cards, in which data in packets (chunks) of a predetermined size are transferred from a source area into an uninterruptible intermediate buffer and copied from there to a target area.
  • the packet size corresponds to the page size of an EEPROM of the chip card and can be, for example, 32 bytes or 64 bytes.
  • the buffer is used to ensure data integrity in the event of unexpected process interruptions, in conjunction with two alternate management records. In practice, however, this method is relatively slow because, firstly, the use of the intermediate buffer located in the EEPROM requires additional write operations, and secondly, because a lot of other administrative data must be written into the EEPROM.
  • the object of the invention is accordingly to solve all or part of the problems mentioned.
  • the invention is intended to provide a technology for memory defragmentation for portable data carriers and other resource-limited systems which, on the one hand, ensures data integrity even in the event of unforeseen interruptions and, on the other hand, has high performance, at least under typical application conditions.
  • this object is achieved in whole or in part by a method for memory defragmentation having the features of claim 1, a computer program product according to claim 10 and a portable data carrier according to claim 11.
  • the dependent claims define preferred embodiments of the invention.
  • the enumeration order of the process steps in the claims should not be interpreted as a restriction of the scope; Rather, embodiments of the invention are provided in which these method steps are carried out in whole or in part in a different order or in whole or in part in parallel or in whole or in part interleaved.
  • One consideration on which the invention is based is to make the block size with which the data are moved from the source area into the target area variable.
  • the block size is at most as large as the offset between the source region and the target region - and preferably exactly as large as this offset. In this way, even in the case of overlapping source and target areas, it can be reliably avoided that data in the source area which may still be required after a sudden process interruption is overwritten by a data block written into the target area.
  • the invention thus creates the technical foundations to make an uninterruptible intermediate buffer and the resulting time-consuming write operations superfluous.
  • the copying method according to the invention is extremely efficient under typical operating conditions, since usually a considerable block size can be selected and therefore only a few write operations in the administrative data area are required. This effect is exacerbated if several "holes" coincide in the course of the defragmentation process and the offset between the source and target areas continues to increase. If, on the other hand, the offset between the source and the target area - ie the size of the "hole" to be closed - is very small, the efficiency of the method proposed here suffers. However, this case rarely occurs in practice. Furthermore, especially with large block sizes, a relatively large amount of additional copying work can occur during a restart process after a voltage interruption. However, this theoretically conceivable case does not represent a significant disadvantage in practice.
  • the invention is suitable for the management of a non-volatile writable memory of portable data carriers and other resource-limited systems (eg so-called embedded systems), in particular when high demands are placed on operational security and data integrity even under unfavorable conditions of use.
  • the invention is particularly suitable for defragmenting a file system, for example a file system according to ISO / IEC 7816-4, or other data structures in the non-volatile writable memory.
  • the data structures can be, in particular, dynamically managed objects and data fields (arrays) which are defragmented as part of a garbage collection process.
  • Such a garbage collection is optionally provided, for example, according to version 2.2 of the Java Card TM specification.
  • the successful transfer of each data block from the source area to the target area is noted in an administrative data area in an interrupt-free manner.
  • This can be done, for example, in that the management data area has two block counters which are switched on after the successful transmission of each data block.
  • the term "step on" is understood to mean either an increment or a decrement.
  • the management data area is preferably created in the non-volatile writable memory.
  • further data important for the defragmentation process are stored in the administration data area, for example data about the size and position of the source area and / or the target area.
  • each data block is moved directly from the source area to the target area, at least without an interruption-protected intermediate buffer copy.
  • the data integrity after a process interruption caused, for example, by a power failure is preferably ensured by the fact that after the following restart, the data transfer from the source area to the target area is continued with the first data block in the processing sequence, the successful transfer of which has not yet been noted in the management data area.
  • the memory defragmentation can be triggered automatically or by explicitly calling up a corresponding operating system function.
  • the memory defragmentation can have a single or a plurality of shifting processes, in which a “memory hole” is preferably closed in each case.
  • the non-volatile writable memory is preferably a semiconductor memory which can be configured as EEPROM (elect (cally erasable programmable read only memory) or as FLASH memory or as FRAM (ferroelectric random access memory) or in another technology.
  • EEPROM electrically erasable programmable read only memory
  • FLASH memory FLASH memory
  • FRAM ferrroelectric random access memory
  • the duration of a write access to this memory is generally significantly longer than the duration of a read access and / or the duration of a write access to a volatile semiconductor memory of the data carrier.
  • the computer program product according to the invention has program instructions in order to implement the method according to the invention.
  • a computer program product can be a physical medium, for example a semiconductor memory or a floppy disk or a CD-ROM, on which a program for executing a method according to the invention is stored.
  • the computer program product can also be a non-physical medium, for example a signal transmitted over a computer network.
  • the computer program product can in particular which are intended for use in connection with the production and / or initialization and / or personalization of chip cards or other data carriers or other resource-limited systems.
  • the computer program product and / or the portable data carrier are further developed with features that correspond to the features described here and / or the features mentioned in the dependent method claims.
  • FIG. 1 is a schematic representation of a data carrier in an embodiment of the invention
  • FIG. 2 shows a representation of several areas of the non-volatile writable memory in the data carrier from FIG. 1, and
  • 3A and 3B show an exemplary flow diagram of a defragmentation method carried out by the data carrier of FIG. 1.
  • the data carrier 10 shown in FIG. 1 has a processor core 12 on a single semiconductor chip, a plurality of memory fields configured in different technologies and an interface circuit 14 for contactless or contact-based communication.
  • a writable RAM 16 is a memory field mask-programmed ROM 18 and an electrically erasable and programmable EEPROM 20 are provided.
  • Write accesses to the EEPROM 20 are relatively complex and require, for example, thirty times as long as a read access to the EEPROM 20 or a write access to the RAM 16.
  • an operating system 22 is included, which provides a variety of functions and services.
  • the operating system 22 manages a file system 24, which in the present example is designed in accordance with the ISO / IEC 7816-4 standard.
  • the files of the file system 24 are stored in a dynamically managed file area 26 created in the EEPROM 20.
  • a directory data area 28 also located in the EEPROM 20 contains directory information relating to the content of the file area 26.
  • an administration data area 30 is provided in the EEPROM 20, the function of which will be discussed in more detail below.
  • FIG. 2 shows an example allocation of the file area 26 with three occupied memory areas UM1, UM2, UM3, each of which corresponds to a file in the file system 24 (FIG. 1). There are free memory areas FM1, FM2 between the occupied memory areas UM1, UM2, UM3, which have arisen, for example, from the deletion of files.
  • the directory data area 28 has, for each occupied memory area UM1, UM2, UM3, a directory data record MM1, MM2, MM3 which contains at least the start address of the memory area UM1, UM2, UM3. Further information about the respective memory area UM1, UM2, UM3 - for example its size and organization and the file name - can be contained in different embodiments in the directory data record MM1, MM2, MM3 and / or in the memory area UM1, UM2, UM3 his.
  • the number column shown to the left of the file area 26 in FIG. 2 symbolically represents memory addresses - expressed, for example, in bytes or memory pages - relative to the beginning of the file area 26.
  • the operating system 22 offers a powerful memory management system that has functions for creating and deleting files.
  • An essential aspect of the memory management system in the present exemplary embodiment is that the memory space released by deleting files is again made available for new files without restriction. In the exemplary memory allocation according to FIG. 2, this is not guaranteed immediately because a file to be newly created, which requires a contiguous section in the file area 26, could at most become as large as the largest single free memory area - here FM1 - although there is more free memory overall is available.
  • the operating system 22 is therefore set up to perform a defragmentation of the file area 26 in the course of dynamic memory management.
  • FM2 FM2, ..., which are scattered over the file area 26, and thus increase the size of the contiguous free memory in the file area 26, which is required for creating new files.
  • the defragmentation process can be triggered in different design variants by different mechanisms. For example, a defragmentation process can always be carried out in connection with the deletion of a file. It can also be provided that the defragmentation only in response to the occurrence of a predetermined one Starting situation, for example when a predetermined degree of fragmentation is exceeded or when processing a request to create a new file for which there is no longer a sufficiently large contiguous memory area available. Finally, provision can also be made to start the defragmentation process only in response to a call to a corresponding operating system service.
  • the latter embodiment has the advantage that the execution time of the relatively time-consuming defragmentation can be suitably determined by the programmer.
  • 3A and 3B show the defragmentation method used in the present exemplary embodiment.
  • the following explanation is based on the exemplary memory allocation according to FIG. 2, in which the second occupied memory area UM2 is to be moved in direct connection to the first occupied memory area UM1. This increases the original second free memory area FM2 by the size of the original first free memory area FM1.
  • the second occupied memory area UM2 forms a source area 32 at its initial position at addresses 9-16, and the desired end position at addresses 6-13 forms a destination area 34.
  • the first four steps 50-56 of the defragmentation method according to FIG. 3A relate to the initialization of entries in the administrative data area 30 shown in FIGS. 1 and 2.
  • an identifier value F is entered in the administrative data area 30, which shows the ongoing defragmentation process.
  • the data carrier 10 is restarted - for example as a result of a sudden power failure - the identifier value F is checked in the administrative data area 30. If there is a not yet completed defragmentation noted, this must be in the Properly continue with the restart to ensure data integrity of file space 26.
  • step 52 some defragmentation parameters, namely a target pointer DP, a block size BS, a source pointer SP and an overall length LEN, are entered in the administration data area 30.
  • the destination pointer DP is the start address of the destination area 34, that is to say, in the exemplary memory assignment from FIG. 2, the start address of the first free memory area FM1.
  • the first data are written to the address indicated by the destination pointer DP during the subsequent shifting process.
  • the source pointer SP is the start address of the source area 32, in this case the first address of the occupied memory area UM2 following the "memory hole".
  • the block size BS determines the maximum amount of data that is moved in a partial step of the defragmentation.
  • the block size BS is equal to the offset between the source area 32 and the target area 34, that is to say the difference between the source pointer SP and the target pointer DP.
  • 2 shows the position of a first, second and third data block 36, 38, 40 in the source area 32. The data transmission carried out in the course of the defragmentation takes place block by block; the three blocks 36, 38, 40 are thus copied individually from the source area 32 into the target area 34.
  • the total length LEN indicates the size of the source and target area 32, 34 and thus the amount of the total data to be transmitted, usually in several individual blocks 36, 38, 40.
  • the previously mentioned entries in the administrative data area 30 are secured by an error detection code EDC. As soon as the error detection code EDC has been successfully written, the shifting process specified by the defragmentation parameters is carried out completely, even if there is an interruption due to a power failure and a subsequent restart.
  • step 56 two block number counters BN1 and BN2 in the administration data area 30 are initialized to an initial value.
  • the block number counters BN1, BN2 indicate the number of data blocks 36, 38, 40 that have already been completely and successfully transferred from the source area 32 to the target area 34.
  • the value "0" is therefore entered in both block number counters BN1, BN2.
  • Method steps 58-66 define a program loop. In each loop pass exactly one block 36, 38, 40 is transferred from the source area 32 to the corresponding position in the target area 34. First, in step 58, a source address and a destination address of the first byte of the current block 36, 38, 0 in the respective loop pass are calculated. In the first block 36 to be transmitted, these addresses correspond to the information about the source pointer SP stored in the administrative data area 30 and target pointer DP. During the further loops, the source address and destination address then result from the formulas depending on the number of data blocks that have already been successfully copied and stored in BN1 and BN2, which will be referred to as block number BN below:
  • Source address - source pointer SP + (block number BN * block size BS) target address target pointer DP + (block number BN * block size BS)
  • the source and destination addresses determined in this way can be kept in the volatile RAM 16 or in a register of the processor core 12, because they would be determined anew after a power failure due to the data in the administrative data area 30.
  • step 60 a block 36, 38, 40 starting at the source address that has just been calculated is moved to the memory area beginning with the destination address.
  • the number of bytes to be copied is limited on the one hand by the maximum block size BS and on the other hand by the end of the source area 32.
  • the number of bytes defined by the block size BS is therefore copied in the first two loop passes - corresponding to the first two blocks 36, 38.
  • the third loop pass - that is to say the copying operation relating to the third block 40 - the product of the block size BS and the number BN + 1 of the currently copied block 40 is greater than the total length LEN of the source region 32. In this case, only those remaining up to the total length LEN become Copied bytes; their number is:
  • Step 60 can be implemented by a program loop that copies one byte from the source to the destination address on each pass and then increments the source and destination addresses. This program loop is run through once for each byte to be copied in the current block 34, 36, 38.
  • the program loop can also have two termination conditions, namely firstly that the block size BS has been exceeded and secondly that the end of the source area 32 has been reached.
  • the copying process from the source area 32 to the target area 34 takes place directly, that is to say without intermediate storage or at best with intermediate storage in RAM 16 or in a register of processor core 12 that is not secured against interruptions.
  • the block size BS is set equal to the offset between the source area 32 and the target area 34. This corresponds to the maximum amount of data that can be copied from the source area 32 to the target area 34 during a loop pass in step 60 without the data written into the target area 34 overlapping with the original data block 36, 38, 40 of the source area 32. This ensures that the transfer of a data block 36, 38, 40 from the source area 32 to the target area 34 leaves the original data block 36, 38, 40 in the source area 32 unchanged. The original data block 36, 38, 40 is therefore available unchanged for a further copy attempt even after a possible interruption of the copying process in step 60.
  • the successful completion of the copying step 60 is now noted in the administrative data area 30 by first increasing the first block number counter BN1 in step 62 and then increasing the second block number counter BN2 in step 64.
  • the two block number counters BN1 and BN2 each set to the value "1".
  • the original data block 36, 38, 40 in the source area 32 is no longer required; rather, it can be overwritten the next time the loop is run.
  • Such a further loop pass occurs when it is determined in query 66 that a data block 36, 38, 40 is still to be copied. This is the case as long as the product of the block size BS and the incremented block number is smaller than the total length LEN of the source area 32.
  • step 68 of updating the directory data area 28 shown in FIG. 3B.
  • the new start address of this memory area - here the value of the destination pointer DP - is entered in the directory data record MM2 of the shifted memory area UM2.
  • the end of the defragmentation can now be noted in the identification value F in step 70. If a voltage interruption occurs from this point in time, when the identifier value F is checked in connection with the following restart, it is determined that it is not necessary to continue an ongoing defragmentation process.
  • the original second occupied memory area UM2 was shifted from the addresses 9-16 to the addresses 6-13 as a result of the procedure described so far. This created a contiguous free memory area at addresses 14-18. If this space is sufficient, the defragmentation process is ended in step 72. Otherwise, the original third occupied memory area UM3 can be changed by a repeated shifting process, which begins again at step 50 addresses 19 - 20 to addresses 14 - 15. This would result in an even larger contiguous free memory area starting at address 16. In an alternative embodiment, it can also be provided that the defragmentation process is always carried out for the second and all subsequent occupied memory areas UM2, UM3, ... in the file area 26.
  • the identifier value F is evaluated each time the data carrier 10 is restarted. If a de-fragmentation process that has not yet been completed is ascertained, this is continued with the first data block 36, 38, 40, the successful transmission of which from the source area 32 to the target area 34 has not yet been noted in the block number counters BN1, BN2.
  • the method shown in FIGS. 3A and 3B is continued in step 58. In this connection, data of a data block 36, 38, 40 that have already been partially copied from the source area 32 to the target area 34 may be retransmitted.
  • the additional work amounts to copying a full data block 36, 38, 40.
  • the block size BS it is generally desirable to choose the block size BS as large as possible, since this means fewer write operations into the block number counters BN1, BN2 during regular defragmentation of the administrative data area 30.
  • the method described here can be used not only for defragmenting file systems, but generally for defragmenting all types of dynamically managed memory areas. This includes, in particular, storage areas for objects and data fields (arrays) in data carriers and other resource-limited systems which have a Java Card TM runtime environment.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

La présente invention concerne un procédé de défragmentation de mémoire concernant notamment un support de données portable, le contenu d'une zone source (32) d'une mémoire non volatile inscriptible étant déplacé vers une zone cible (34). Dans ce contexte, les données contenues dans la zone source (32) sont transmises par blocs dans la zone cible (34), la bonne transmission de chaque bloc de données (36, 38, 40) de la zone source (32) à la zone cible (34) est mentionnée sans interruption dans une zone de données de gestion (30), et la taille des blocs de données transmis (36, 38, 40) est établie en fonction du décalage entre la zone source (32) et la zone cible (34) de sorte que la taille des blocs vaut au plus celle de ce décalage. L'invention a également pour objet un produit de programme informatique et un support de données portable qui ont les mêmes caractéristiques. L'invention concerne aussi une technique de défragmentation de mémoire qui d'une part garantit l'intégrité des données même en cas d'interruptions imprévues, et d'autre part a une efficacité élevée dans des conditions d'application pratiques.
EP04703171A 2003-01-20 2004-01-19 Defragmentation de memoire concernant en particulier un support de donnees portable Withdrawn EP1588266A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE2003101969 DE10301969A1 (de) 2003-01-20 2003-01-20 Speicherdefragmentierung, insbesondere bei einem tragbaren Datenträger
DE10301969 2003-01-20
PCT/EP2004/000356 WO2004066153A1 (fr) 2003-01-20 2004-01-19 Defragmentation de memoire concernant en particulier un support de donnees portable

Publications (1)

Publication Number Publication Date
EP1588266A1 true EP1588266A1 (fr) 2005-10-26

Family

ID=32667676

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04703171A Withdrawn EP1588266A1 (fr) 2003-01-20 2004-01-19 Defragmentation de memoire concernant en particulier un support de donnees portable

Country Status (3)

Country Link
EP (1) EP1588266A1 (fr)
DE (1) DE10301969A1 (fr)
WO (1) WO2004066153A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200705177A (en) 2005-07-19 2007-02-01 Benq Corp Methods, systems and computer-readable storage medium for storage space management
EP2038751A1 (fr) 2006-06-08 2009-03-25 Nxp B.V. Dispositif de défragmentation à distance de dispositif embarqué
US8321481B2 (en) * 2010-05-13 2012-11-27 Assa Abloy Ab Method for incremental anti-tear garbage collection
DE102014112496A1 (de) 2014-08-29 2016-03-03 Bundesdruckerei Gmbh Speicherverwaltung für eine Chipkarte

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1025534B1 (fr) * 1997-08-20 2011-03-16 Powerquest Corporation Manipulation de partitions de memoire pendant la migration
US6038636A (en) 1998-04-27 2000-03-14 Lexmark International, Inc. Method and apparatus for reclaiming and defragmenting a flash memory device
EP1046996B1 (fr) * 1999-03-23 2005-04-13 International Business Machines Corporation Défragmentation de mémoire d'une carte à puce
DE10040241A1 (de) * 1999-08-18 2001-03-22 Giesecke & Devrient Gmbh Speicheranordnung für einen Datenträger und Verfahren zur Speicherverwaltung
DE10127179A1 (de) * 2001-06-05 2002-12-19 Infineon Technologies Ag Verfahren zur Verwaltung eines Speichers einer Chipkarte

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2004066153A1 *

Also Published As

Publication number Publication date
DE10301969A1 (de) 2004-08-05
WO2004066153A1 (fr) 2004-08-05

Similar Documents

Publication Publication Date Title
DE102009046444A1 (de) An die Software angepasste Abnutzungsausgleichung
EP1183690B1 (fr) Ensemble memoire avec hachage des adresses
DE112004001255T5 (de) Speichervorrichtung und Speichersystem
EP1352318B1 (fr) Circuit integre a microprocesseur pour support de donnees portatif
DE60019364T2 (de) Speicherdefragmentierung in Chipkarten
EP1588266A1 (fr) Defragmentation de memoire concernant en particulier un support de donnees portable
EP1628223B1 (fr) Ecriture de données dans une mémoire non-volatile d'un support de données portable
DE10040241A1 (de) Speicheranordnung für einen Datenträger und Verfahren zur Speicherverwaltung
EP1999731B1 (fr) Gestion de mémoire de cartes à puce
EP1308842B1 (fr) Procédé et dispositif pour la gestion d'une mémoire
WO2004105042A1 (fr) Dispositif et procede pour traiter un etat d'une memoire
DE69903496T2 (de) Flexibles Löschen von Objekten in einer Umgebung mit beschränkten Resourcen
EP1923787A2 (fr) Traitement d'objets de données dans une mémoire de stockage
DE102006035039A1 (de) Datenverarbeitungssystem und Verfahren zum Betreiben eines Datenverarbeitungssystems
EP1675008B1 (fr) Traitement d'objets de données dans une mémoire réinscriptible non-volatile
DE10339053B4 (de) Speicherverwaltung bei einem tragbaren Datenträger
WO2002099650A2 (fr) Procede destine a gerer la memoire d'une carte a puce
EP2177990A1 (fr) Gestion de mémoire dans un support de données portable
DE10323033A1 (de) Laden eines ausführbaren Programms in einen tragbaren Datenträger
EP2177995B1 (fr) Gestion de mémoire dans un support de données portable
EP2312444A2 (fr) Procédé d'écriture d'ensembles de données dans une mémoire non volatile
EP2002342A2 (fr) Procédé et unité de calcul pour faire fonctionner un dispositif de mémoire
DE10249597A1 (de) Steuern eines Speicherbereinigungsvorgangs
DE10339203A1 (de) Organisation eines Dateibaums bei einem tragbaren Datenträger
DE102006013760A1 (de) Verfahren und Recheneinheit zum Betreiben einer Speichereinrichtung

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20050822

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL LT LV MK

DAX Request for extension of the european patent (deleted)
RIN1 Information on inventor provided before grant (corrected)

Inventor name: SCHMALZ, FRANK

17Q First examination report despatched

Effective date: 20101230

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20160802