EP1565990A1

EP1565990A1 - Frequency generator

Info

Publication number: EP1565990A1
Application number: EP02781335A
Authority: EP
Inventors: Niels Christoffers; Bedrich Hosticka; Rainer Kokozinski; Peter Jung
Original assignee: Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Current assignee: Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority date: 2002-11-28
Filing date: 2002-11-28
Publication date: 2005-08-24
Also published as: CA2507098A1; WO2004049574A1; AU2002349049A1; US20050277397A1; JP2006508572A

Abstract

The invention relates to a frequency generator which comprises a controlled oscillator (16) having a control input and an oscillator output. Said controlled oscillator (16) is adapted to output on the oscillator output an oscillator signal (Sout) having an oscillator frequency that depends on a control signal (SLOC) on the control input. The generator further comprises a scanning device (12) for scanning, by means of a reference frequency, the oscillator signal (Sout) or a signal of the controlled oscillator (16) that is derived from the same in order to obtain a scanned signal (Sd). A low-pass filter (14) is used to low-pass filter the scanned signal (Sd) or a signal derived from the same in order to obtain the control signal (SLOC) or a signal (STP) which is based on the control signal (SLOC). Due to its less complex design, especially the absence of a frequency divider, and the faster adjustability of the actually generated frequency, the inventive frequency generator allows to generate frequencies in an energy-saving manner.

Description

frequency generator

description

The present invention relates to frequency generators, such as those used for transceivers for UMTS, GSM or Bluetooth.

A central task within transceivers used for wireless data transmission is the generation of local, periodic signals that are used for frequency conversion of signals received or to be transmitted. Depending on the transmission standard, the local periodic signal generated must have different frequencies in different operating states, e.g. depending on whether there is a transmission or reception process. The function of generating the local periodic signals is performed by a controllable oscillator, which is usually a voltage-controlled oscillator (VCO; VCO = VCO = voltage-controlled oscillator).

Since, according to the current state of the art, high-resolution analog / digital and digital / analog converters are available as embedded integrated circuits, the circuit structure shown in FIG. 6, consisting of a ROM memory 900, a digital / analog, would be desirable for frequency generation Converter 902 and a voltage-controlled oscillator 904. Depending on the desired transmission channel, which is to be used for data conversion or transmission for frequency conversion, a digitized control value is taken from the ROM 900. This is converted into an analog value by the digital / analog converter 902 and input into a control input of the VCO 904. The latter would then output the local periodic signal at the desired frequency by appropriately setting the digital control values stored in the EEPROM 900 in advance. 6 would be particularly desirable because the specified would change frequency almost immediately after a new channel was selected, so that only a short settling time would have to be waited before data could be transmitted or received by the transceiver containing the circuitry of FIG.

6 cannot be used, however, because of the high demands on the accuracy with which the frequency of the signal generated by the VCO 904 should match the frequency required by the channel selection. The control voltage-frequency characteristic of the VCOs 904 must be known with sufficient accuracy so that the output frequencies match the frequencies required by the channel selection with the desired accuracy. However, this is generally dependent on fluctuations in production, temperature and age and should therefore be determined at regular, short successive times. Up to now, however, a one-time, precise determination of the characteristic immediately after production was considered to be uneconomical, since this requires highly precise measuring devices. 6 cannot be used in today's transceivers because of the high demands on accuracy.

Possible frequency generators, such as can be used in transceivers, are constructed as shown in FIG. 1 and include a phase and frequency detector 910, a loop filter 912, a VCO 914 and a frequency divider 916. A highly accurate one, of a quartz (not shown) generated reference signal S _ref (t) is applied to a first input of the phase and frequency detector 910. The loop filter 912 then generates a control signal S _L oc (t) from the output signal S _d (t) of the latter and outputs the same to the VCO 914. The VCO 914 generates an output signal S _out (t) with a frequency dependent on the control signal S _L oc (t), which represents the output signal of the frequency generator. The output signal S _out (t) of the VCO 914 is converted via the frequency divider 916 into a two- feedback of the PFD 910. The frequency divider 916 generates a signal with an N times lower frequency from the signal S _out (t). The PFD 916 compares the frequency divided signal from the frequency divider 916 with the highly accurate reference signal S _ref (t) and outputs as the signal S _d a signal corresponding to the phase and frequency difference, whereby a control loop through the PFD 910, the loop filter 912, the VCO 914 and the frequency divider 916 with a feedback loop from the frequency divider 916, the PFD 910 and the loop filter 912 is formed. The frequency generator of FIG. 7 consequently enables, by providing the frequency divider 916 as a variation to a phase locked loop (PLL = PLL = phase locked loop) for the output frequency S _ou t (t) to be N times the reference frequency with high accuracy, whereby N is the division ratio of the frequency divider 916.

A disadvantage of the frequency divider of FIG. 7 is that the frequency divider 916 is very difficult and expensive to implement. Since it has to be dimensioned for a very high input signal bandwidth, it consumes a great deal of current. Another disadvantage of the frequency generator of Fig. 7 is its high inertia. After a change in the frequency ratio N at the frequency divider 916, a long settling time elapses until the output frequency S _out matches the desired one with sufficient accuracy.

The object of the present invention is therefore to provide a frequency generation scheme which enables less complex, more accurate and / or less sluggish frequency generation.

This object is achieved by a frequency generator according to claim 1, a method for frequency generation according to claim 15 and a method and a device for determining the control signal-oscillator frequency characteristic of a controllable oscillator according to claims 16 and 17. A frequency generator according to the invention comprises a controllable oscillator which has a control input and an oscillator output, the controllable oscillator being designed to output an oscillator signal at the oscillator output with an oscillator frequency which depends on a control signal at the control input, a sampling device for sampling the oscillator signal or one of the same derived signal from the controllable oscillator at a reference frequency to obtain a sampling signal and a low-pass filter for low-pass filtering the sampling signal or a signal derived therefrom to obtain the control signal or a signal underlying the control signal.

A method according to the invention for frequency generation by means of a controllable oscillator which has a control input and an oscillator output, the controllable oscillator being designed to output an oscillator signal at the oscillator output with an oscillator frequency which depends on a control signal at the control input, comprises sampling the oscillator signal or a signal of the controllable oscillator derived therefrom with a reference frequency to obtain a sampling signal, and low-pass filtering the sampling signal or a signal derived therefrom to obtain the control signal or a signal underlying the control signal.

According to a further aspect of the present invention, a determination of the control signal-oscillator frequency characteristic of a controllable oscillator having a control input and an oscillator output is provided, the controllable oscillator being designed to output an oscillator signal with an oscillator frequency at the oscillator output depends on a control signal from the control input. A sampling device samples the oscillator signal or a signal of the controllable oscillator derived therefrom with a reference frequency to get a scanning signal. A low-pass filter low-pass filters the sampling signal or a signal derived therefrom to obtain an underlying signal. Means are provided to selectively prevent or enable the oscillator signal to pass through the scanner and the low pass filter to the control input. An adder which is designed to add a predetermined constant control value to the signal on which the control signal is based in order to obtain the control signal is also provided. A detector detects the value of the control signal. Control means for determining the predetermined constant control value is configured to cause the selectively prevent or enable means to prevent the oscillator signal from passing through the scanner and low pass filter to the control input, and then the adder to use a trial value for addition. In addition, the control device ensures that the device for preventing or enabling subsequently enables the oscillator signal to pass through the scanning device and the low-pass filter continuously to the control input, and then the detector detects the value of the control signal which adjusts itself to enable one to obtain a control value assigned to a predetermined multiple of the reference frequency via the control signal oscillator frequency characteristic. The control device also causes these processes to be repeated for different test values.

The present invention thus creates a completely new principle for frequency generation, which differs fundamentally from the PLL-based principle described in the introduction to the description. There is no frequency divider and phase detector. The adjustability of the steady frequency is quickly possible, since by interrupting a feedback path comprising the scanning device and the low-pass filter between the oscillator output and the control input, rough adjustments of the control signal the transient process can be started with a roughly preset value based on a stored control value and a new closing of the feedback path. Long settling processes of a frequency divider are avoided. Due to the less complex structure, in particular the lack of a frequency divider, and the quicker adjustability of the currently generated frequency, frequency-saving frequency generation can be obtained according to the invention.

Preferred exemplary embodiments of the present invention are explained in more detail below with reference to the accompanying drawings. Show it:

1 shows a schematic block diagram of a frequency generator according to a simplified exemplary embodiment of the present invention;

FIG. 2 shows a spectral distribution of the sampling signal obtained by sampling from the oscillator signal of the controllable oscillator of the frequency generator of FIG. 1;

3a and 3b show exemplary waveforms of the oscillator signal, the scanning signal and the control signal in the frequency generator of FIG. 1 for two different steady-state or stationary states, namely for a divider ratio between the reference frequency and the oscillator frequency of two in the case of FIG 3a and one in the case of Figure 3b;

4 shows a schematic block diagram of a frequency generator according to a further exemplary embodiment;

5 shows an exemplary control signal-oscillator frequency characteristic of a controllable oscillator; 6 shows a desired, ideal circuit structure for a frequency generator for generating signals with different frequencies; and

7 is a block circuit diagram of a conventional PLL-based frequency generator.

Before various exemplary embodiments of the present invention are explained in more detail below with reference to the drawings, it is pointed out that identical or functionally identical elements in the figures are provided with the same or similar reference symbols or designations, and that a repeated explanation of these elements is omitted.

FIG. 1 shows a simplified embodiment of a frequency generator according to the present invention, the frequency generator being generally indicated at 10 in FIG. 1. The frequency generator 10 comprises a scanner 12, a low-pass filter 14 and a voltage-controlled oscillator (VCO) 16. The voltage-controlled oscillator 16 comprises a control input and an oscillator output and outputs an output signal S _out (t) with an oscillator frequency f _ou t or at its oscillator output. an angular frequency ω _ou t, which in turn depends on the control signal, which the VCO 16 receives at the control input. The output of the VCO 16 simultaneously corresponds to the output 18 of the frequency generator 10. Accordingly, the output signal S _{out of} the VCO 16 is also the signal output by the frequency generator 10.

The oscillator output of the VCO 16 is also connected to an input of the scanner 12. The sampler 12 samples the output signal S _out from the VCO 16 at a frequency f _ref and outputs a sampling signal S _d (t) at its output, which is connected to an input of the low-pass filter 14. The sampling signal S _d (t) has individual pulses, their strength, at the times of sampling t = n / f _re f (ne | N) corresponds to the value of the output signal S _out at the time of the respective sampling and whose pulse duration is fixed to a fixed value. For scanning, the scanner 12 receives a highly accurate reference signal with the reference frequency f _ref from an oscillator 20, such as a quartz oscillator, at a frequency input. The scanner 12 includes, for example, a switch, such as an FET.

The low-pass filter 14 is connected at its output to the control input of the VCO 16, and outputs the scanning signal S _d thereon in a low-pass filtered form as the control signal S _L0C (t). Sampler 12, low-pass filter 14 and VCO 16 together form a control loop which, as will be explained in the following, regulates the output signal S _out (t) to a frequency which is in an integer ratio to the reference frequency. In other words, the feedback path comprising the scanner 12 and the low-pass filter 14 between the oscillator output and the control input of the VCO 16 ensures that the control signal received by the VCO is regulated to a value which is in accordance with the control signal-oscillator frequency characteristic of the VCOs 16 corresponds to an oscillator frequency which is an integer ratio to the reference frequency.

After the structure of the frequency generator 10 and briefly the mode of operation of its individual components have been described in the foregoing, the overall mode of operation thereof is described below by the interaction of all components. As already mentioned, the VCO 16 always produces an essentially monofequent signal at its output with a frequency which depends on the level of the control signal S _L oc. The high-frequency output signal S _{out of} the VCO 16 can thus be represented in the frequency domain as two Dirac impulses at the frequencies or angular frequencies +/- ω _ou t (in the following, ω should represent the angular frequency, which with the frequency f by f = 2π / ω is related, where both ω and f are referred to below as frequency for the sake of simplicity).

The sampling of the output signal S _ou t of the VCO 16 by the scanner 12 with the frequency f _ref at times t _n = n / f _ref corresponds in the time domain to a multiplication of the signal S _ou () by a comb signal comb _ι (t) with Dirac- Bumps at fref the sampling times, so that S _d (t) = comb _ι (t) "S _ou t (t) ^f ref applies. In the frequency domain, this corresponds to a convolution of the Fourier transform of the output signal S _oul (ω) with the

Fourier transforms of the scanning comb function, which in turn is a comb function with Dirac collisions at the frequencies n-ω _re f (ne | N), namely comb, -. (ω) r so that for the

Fourier transform of the scanning signal S _d (ω) = S _out (ω) * comb _ω (ω) applies. The function S _d (ω) is shown in FIG. 2, in which the frequency ω is plotted along the x-axis and the intensity is plotted in arbitrary units along the y-axis. As can be seen, the sampling signal S in the frequency domain comprises a series of Dirac surges at the frequencies +/- ω _out + n-ω _ref , where n is a natural number and co _{ref is} the angular or angular frequency of the reference signal from the Oscillator 20 is. The numbers above each Dirac shock in Fig. 2 each indicate the value of n which corresponds to the respective Dirac shock.

The scanning signal S _d , the spectral representation S _d in

Fig. 2 is shown, the low-pass filter 14 is low-pass filtered. The cut-off frequency of the low-pass filter 14 is set in such a way _that only the two lowest-frequency ones of the frequency are among the Dirac surges of the scanning signal S _d

+/- (ω _ou t - N-ω _ref ) (here N = 2) are filtered out to obtain the signal S _LO c (t). For this purpose, the low-pass filter 14, as shown by way of example in FIG. 2 with a dashed line, has, for example, a rectangular pass function. The cut-off frequency of the low-pass filter 14 is preferably ω _ref / 2. S _{corresponds to 0C} (ω) thus S _H (ω) 'rect 7w _{2 m} ^UJ ref (ω), where rect / i / 2, ^ω -ref (ω) is a function that is between -ω _ref / 2 and ω _ref / 2 one and otherwise zero is. The resulting signal S _L oc (t) is entered in the VCO 16 for control purposes or used to control the same.

Theoretical considerations show that the frequency generator 10 controls the control signal Soc (t) in such a way that a static state occurs in which the output frequency ω _{out of} the output signal S _out (t) is Nω _ref , where N is an integer. In order to illustrate the control principle, two stable or static states of the frequency generator 10 of FIG. 1 are shown as examples in FIGS. 3a and 3b, namely in FIG. 3a for the case N = 2 and in FIG. 3b for the case N = 1. Both figures merely show examples of the time profiles of the signals S _{out /} S _LO c and S _d in two mutually aligned graphs in which the time t along the x-axis and the voltage along the y-axis are arbitrary Units is applied. In the upper graph, the temporal profiles of the output signal S are each _0ut (solid line) and in the lower graph, the temporal ^"patterns of the sampling signal S (solid line) and the control signal S _L oc (dashed line) ones shown, provides.

As can be seen, in the static state the samplings by the sampler 12 always take place with a constant phase difference φi or φ ₂ with respect to the output signal S _out to be sampled. In other words, the scanning by the scanner 12 always takes place at corresponding points on the, in the present case, falling edge of the sinusoidal output signal S _{out of} the oscillator 16, namely every N-th period, the period T is. This fact can be explained if one considers that in the static state, since the output signal S _{0ut has} a constant frequency of Nω _{re £} , the Control signal S _L oc must be constant and must have a value that corresponds to the frequency ω _out according to the control signal oscillator frequency characteristic of the VCO 16. As can be seen in FIGS. 3a and 3b, the control signal S _L oc must now have the value U ₂ constant for the state ω _ou t = 2 ω _ref , while the same in the static state with N = 1 constant Ui must be.

Due to the fact that the scanning by the scanner 12 takes place at a fixed frequency f _re f, and the pulses which the scanner 12 generates, with regard to the magnitude or strength, always in a predetermined ratio to the value of the output signal S to be scanned _out at the time of sampling and are set to a value almost constant with regard to the pulse duration and the sampling signal is otherwise zero, the sampling pulses of the sampling signal S _{d must have} a certain voltage level U _ab - _t ast in the static state. This voltage level U _a btast is determined from the fact that, in the static state, through the low-pass filtering through the low-pass filter 14, it must lead to a control signal S _d (presently exaggeratedly constant) with a constant “effective value”, which is Ui or U ₂ On the basis of this fact, it can be explained that the sampling times which result in the static states are those points of the output signal S _out at which the signal S _{out has} the value U sample.

As can be seen, the sampling in the static case N = 2 takes place only in every second period, whereas in the static case N = 1 it takes place in every period. In addition, the value that the output signal S _{out of} the VCO 16 to be sampled has at the sampling times, ie U sampling? in the case of N = 2 larger than in the case N = 1, since the effective value U ₂ resulting from the filtering must also be larger in the case of the higher output frequency w _out at N = 2 than in the case N = 1, ie the case of the lower output frequency. 3a and 3b, it can now be explained how a small deviation of the output signal S _out from the static state is corrected by the feedback. For example, imagine that in the case of Fig. 3a, between the sampling times Ti and T _2, the output signal S ₀ u _{t has become} a little faster. In this case, the signal S _out assumes the value Uabt _ast earlier than at the sampling time t ₂ . At time t ₂ , the value of S _{out is} slightly lower. Accordingly, the value of the low-pass filtered control signal S _L oc also decreases in order to become a little lower than U ₂ , as a result of which the VCO 16, which has become too fast, is “braked” again due to the decreasing control signal. In the other case, that is, between the At times ti and t _{2 of} the VCO has become slower, the sampled value at time t _{2 is} greater than U _ab t _a s _t? So that the effective value of the control signal S _LO c resulting from the low-pass filtering also increases, as a result of which the slower VCO 16 is "accelerated" with a higher control signal.

With reference to FIGS. 1, 2, 3a and 3b, it is pointed out that the preceding description referred only to an exemplary embodiment, and that various changes can be made to the frequency generator 10 from FIG. 1 or its control loop. For example, an inverter could be connected in the feedback path. In the case of an inverter in the feedback path behind the scanner 12, the scanning in the static state would always take place, for example, on the rising edges of the sinusoidal output signal S _out . An offset could also be imposed on the control signal S _L oc which is output by the low-pass filter 14 on the way to the control input of the VCO 16, as will be the case in the exemplary embodiment in FIG. 4. In this case, the sampling times in the static state regulate themselves only to a different phase value or to different sampling times compared to the example of FIGS. 3a and 3b, at which the output signal S _out has such a value that by filtering through the low-pass filter 14 results in an effective value that only corresponds to the deviation of the offset from the setpoint U _x or U _{2 of} the control signal for the VCO 16. Furthermore, an amplifier could be provided in the feedback path. The signal generated by the low-pass filter 14 thus represents a control signal for the VCO, which, depending on the application, can still be subjected to constant manipulations, ie addition and multiplication, before it is input into the VCO. The oscillator signal sampled by the sampling device and the sampling signal filtered by the low-pass filter can also have been manipulated beforehand, ie provided with an offset or an amplification.

It should be pointed out that for the sake of clarity, the problem of the different stable or static states of the frequency generator 10 of FIG. 1, ie the frequency ratio between the reference and oscillator frequencies, has not been dealt with above. A simple possibility would be, as briefly mentioned as an alternative above, to bias the control input of the VCO with a constant offset, so that when the frequency generator is started up, the output frequency S _ou t always settles to the nearest frequency, which is an exact multiple of the integer Reference frequency is. In this way, a frequency generator could be obtained that always generates a precisely defined frequency, namely a predetermined integer multiple of the reference frequency.

An exemplary embodiment of a frequency generator according to the present invention is described below with reference to FIG. 4, which is suitable for generating a selected one of predetermined oscillator frequencies, all of which have an integer division ratio to the reference frequency. The frequency generator of FIG. 4 is indicated generally at 30. In addition to the components of the frequency generator of Fig. 1, namely the sampler 12, the low pass filter 14, the voltage controlled oscillator 16, the output 18 and the reference signal generator 20, it includes one in the feedback branch between the oscillator output of the VCO 16 and the input of the scanner 12 switched switch 32 to interrupt the feedback branch or the control loop, an adder 34, one input of which is connected to the output of the low-pass filter 14 and the output of which is connected to the control input of the VCO 16, a digital / analog converter 36, the output of which is connected to a further input of the adder 34 is connected, an EEPROM memory 38, the output of which is connected to an input of the D / A converter 36 for outputting read-out data, an analog-digital converter 40, the input of which is connected to the output of the low-pass filter 14 and a control device 42 which is connected to an input of the EEPROM memory 38 for channel selection and Control signal oscillator frequency characteristic curve calibration or measurement, is connected to an output of the A / D converter 40 for detecting a digitized value of the output signal of the low-pass filter 14 and to a control input of the switch 32.

After the structure of the frequency generator 30 of FIG. 4 has been described above, its operation will be described below. For ease of understanding, it is assumed that the frequency generator is integrated in a transmission / reception circuit which uses different frequencies per channel for transmission during transmission and reception. The control device 42 can also be part of the transmission / reception circuit (not shown).

A different frequency is assigned to each channel of the transceiver, which is an integral multiple of the reference frequency ω _ref , ie N-ω _ref (Ne | N). A channel assignment table is stored in the EEPROM 38, which assigns a digital value to each channel which is approximately that Corresponds to the desired value of the control signal which, according to the control signal-oscillator frequency characteristic curve, corresponds approximately to the frequency assigned to the respective channel. 5 shows an example of a control signal-oscillator frequency characteristic of the VCO 16 in a graph in which the control signal is plotted in arbitrary voltage units along the x-axis and the frequency ω in arbitrary Hertz units along the y-axis. The characteristic curve, as shown, intersects the ordinate frequency values ω _ref , 2 ω _ref and 3 ω _re f on the abscissa voltage values Ui, U ₂ and U ₃ . In this exemplary case, three digital values would be stored in the EEPROM 38, namely the digitized values of Ui, U ₂ or U ₃ , in each case in association with the channels with the frequencies ω _ref , 2 ω _ref and 3 ω _re f -

In the event that the control device 42 selects a new channel, the control device 42 accesses the EEPROM 38 with the selected channel as an index, whereupon the EEPROM 38 outputs the corresponding digital value to the D / A converter 36. The digital value remains unchanged or constant until the next channel change. The D / A converter 36 converts the digital value into the analog voltage value S _DAC and outputs the same to the second input of the adder 34. As already described above with reference to the exemplary embodiment of FIGS. 1-3b, this produces a constant offset in the feedback branch of the control loop from components 12, 14 and 16, which only leads to the control loop being in a steady state adjusts at which the samples by the scanner 12 take place at places of the periodic signal S _{out of} the VCO 16 at which the signal S _{out is} lower, namely so low that the effective value generated by the filter 14 the coarse bias of the control input of the VCO 16 only corrected by the voltage _value S _DÄC . In operation, the control device 42 controls the sequence of the frequency generator 30 as follows: the switch 32 initially remains open in order to interrupt the feedback loop and the control loop. The controller 42 selects a channel and accesses the EEPROM 38 with the selected channel as an index. The digital value assigned to the selected channel corresponds, for example, to the value U ₂ . The D / A converter 36 uses this to generate the analog offset signal S _DA C and applies the same to the second input of the adder 34. There is still no signal at the first input of the adder because the switch 32 has interrupted the feedback branch. Therefore, only the signal S _DA c is present at the control input of the VCO 16. The VCO 16 therefore outputs at its output an oscillator signal S _ou t with a frequency ω _out which corresponds with an accuracy to the frequency 2 ω _ref , which, as has been described in the introduction to the description, by fluctuations in temperature or age is not precise enough for a transmitting or receiving operation. After this rough pre-setting, the control device 42 closes the switch 32 and thus also the feedback path or the control loop. As described with reference to _FIGS . _1-3b , the control loop regulates the oscillator frequency ω _out to the nearest frequency, which has an integer ratio to the reference frequency ω _rβf . In the present case, by presetting the control signal S _{LOc of} the VCO 16 before closing the switch 32, it is clear with sufficient certainty that the control loop will adjust itself to the desired frequency, namely 2 ω _ref , since this is the closest frequency at the start of the control process after the switch 32 is closed. In other words, since the output frequency of the VCO 16 after the control signal has been advanced before the switch 32 is closed is known “inaccurately”, the output frequency after the settling after the switch 32 is closed is also known. The process is repeated when the channel is changed. The control device 42 first opens the switch 32, selects a new channel, and closes the switch 32 again. By presetting or presetting the control signal S _d , the settling time to the new frequency is shorter than in the case of a control circuit comprising a frequency divider, as was described with reference to FIG. 7.

As already described in the introduction to the description of the present invention, the control signal oscillator characteristic of the VCO 16 is subject to changes which could lead to the fact that the formerly digitized values, such as U ₃ -U ₃ , differ from the target control values according to the control signal oscillator. VCO 16 characteristic curve deviate. If the control signal of the VCO 16 is preset in the manner described above, these stored, digitized values deviating from the setpoints could, in their function as a starting value for the control process, result in the control loop adjusting itself to an undesired neighboring frequency which is another integer multiple is the reference frequency. In FIG. 5, for example, a dashed line 43 shows an example of a modified characteristic curve of the VCO 16, such as has arisen after a temperature change. As can be seen, the next time the control device 42 selects the channel which is assigned to the frequency 2 ω _ref , after opening the switch 32 the VCO 16 is preset with the value U ₂ , which leads to a frequency which leads to an exact lies between the frequencies 2 ω _ref and ω _ref . After the switch 32 is closed, it is consequently not ensured that the control loop adjusts itself to the desired frequency value 2 ω _re f and not to the adjacent value ω _re f.

In order to prevent this, the frequency generator 30 of FIG. 4 comprises a further functionality, namely the measurement or determination of the control signal-oscillator frequency characteristic of the VCO 16, which process is described in the following. will be written, and which is repeated repeatedly during the operation of the frequency generator 30, for example intermittently at fixed time intervals which are sufficient to be able to follow the changes in time of the characteristic of the VCO.

In the event that the control device 42 determines that a renewed measurement of the control signal-oscillator frequency characteristic of the oscillator 16 is necessary, the control device 42 takes the following steps to obtain a new, for each channel or for each frequency a multiple of the reference frequency to obtain the corrected digitized value: the control device 42 opens the switch 32, selects a first of the channels to preset the VCO 16, closes the switch 32 again, waits for a certain settling time of the control loop until a static state has arisen, and then reads, using the A / D converter 40 as a detection device, a digitized value of the signal S _TP , which is the deviation or the difference between the true setpoint S _L oc (t) of the VCO 16 at the control input thereof and the analog control value of the DAC 36, S _DAC , which has resulted from the above-mentioned characteristic fluctuation. The control device 42 then corrects the value stored in the EEPROM 38 with the newly detected value, namely S _L oc (t), by adding the detected value S _TP to the previously stored value of S _DAC . The control device 42 repeats these steps for each channel or each frequency N-ω _re f. In this way, all the values stored in the EEPROM 38 are again adapted to the characteristic curve which may have changed. The process is also not so time-consuming, since the old stored digitized values lead to fast settling times due to their use as control start values for the control value of the VCO.

In the event that the channel generator 30 is not operated for a long time, or in the event that the frequency generator 30 the first time it is used, there are no suitable sufficiently precisely predetermined digital values in the EEPROM for the characteristic curve determination, so that the control device 42 must scan the characteristic curve of the VCO 16 by an algorithm other than that described above. In this case, the control device 42 must find, by finely varying the value output by the DAC 36, the one at which the difference between the control signal of the VCO 16 and the output voltage of the DAC 36 becomes zero, in order to digitize the latter and into the assignment table in the Filing EEPROM 38. By successively opening the switch 32, then varying the control voltage in large steps, closing the switch 32 again and digitizing the control voltage S _TP , all points on the control voltage-frequency characteristic curve can be found for which the output frequency is an integral multiple of the reference frequency. In this way, a very simple and inexpensive measurement of the characteristic of the VCO 16 is possible, so that the frequency f _out output by the frequency generator 30 can be varied very quickly by roughly presetting the control voltage of the VCO 16, as described above.

An example of a procedure for determining the characteristic curve of the VCO 16 without using the value stored in the EEPROM 38 is described below. The control device 42 opens the switch 32, sets the VCO 16 in advance with a first test value S _DAC , closes the switch 32 and detects the value of S _TP after the required settling time. The first trial value is, for example, a voltage value, wherein the control signal oscillator frequency characteristic of the VCO is the slightest changes subjected to due to ambient fluctuations ^*, and will thus lead to a predetermined, known Einregelfrequenz despite environmental variations with high probability. In the example of FIG. 5, this would be a value close to Ui. The control device 42 stores the value of S _TP + S _DAC in, for example EEPROM 38 or other suitable memory. Thereafter, the control device 42 repeats this process for further test values which increase or decrease from test value to test value by, for example, a constant value. The algorithm can of course also effect the variation of the test value differently, for example by changing the test value by a higher amount after a test process in which the control loop has adjusted itself to a next control value. Each time the value of S _TP + S _DA c rises or falls, or the detected value S _{TP changes} sign from one to the next trial, controller 42 stores the value S _TP + S _DAC as the next digital value for the next channel. In this way, the control _device 42 receives a complete scan of the characteristic of the VCO 16 at the ordinate positions N ω _rβf . After the controller 42 determines all digital values for all channels, it stores them in the EEPROM 38.

In order to apply the test values to the input of the adder 34, the control device 42 can either be connected directly to the second input of the adder 34 via the DAC 36 or another DAC, or the control device 42 stores a digitized test value before each test or sampling process in a memory location specially provided for this purpose in the EEPROM 38 and then accesses the same. In other words, a specially provided entry may be provided in the channel assignment table of the EEPROM 38 which does not correspond to any of the channels used by the transmission / reception circuit. In this case, it would be possible for the control device 42 to store the successively found or determined digital values directly in the EEPROM 38 for each channel.

It is pointed out that the switch 32 can also be switched in the feedback path at a different location than between the oscillator output and the scanner. As well the A / D converter 40 could also be provided in order to have its input connected to the output of the adder 34. It would also be possible to prefer the adder between the scanner and the filter. Furthermore, it would be possible to call up the digitized rough preset values previously described as stored values differently than from a memory, such as analytical calculation of a parameter function, which can be adapted to the changing characteristic of the VCO by changing parameters. The control device can be implemented in software or hardware or a combination thereof. Instead of a voltage-controlled oscillator, a current-controlled oscillator could also be used.

In addition, it would be possible for the ADC 40 shown in FIG. 4 at the output of the low pass 14 to be replaced in an alternative exemplary embodiment by only one comparator, which determines whether S _L oc (t) -S _D A _C (t) = 0 is. The exact error of S _L oc (t) could then be found with a closed control loop by varying S _DAC (t). Depending on the sign of S _L oc (t) -S _DAC (t), S _DAC (t) would be decremented or incremented. In principle, S _L oc (t) -S _DAC (t) is digitized in this way, in that the DAC 36 forms, together with the comparator, an ADC that functions in a similar way to a sigma-delta modulator.

Claims

Patent claims

1. Frequency generator with

a controllable oscillator (16), which has a control input and an oscillator output, the controllable oscillator (16) being designed to output an oscillator signal (S _ou t) with an oscillator frequency at the oscillator output, which is determined by a control signal (S _L oc ) depends on the control input;

a sampling device (12) for sampling the oscillator signal (S _out ) or a signal derived therefrom of the controllable oscillator (16) with a reference frequency in order to obtain a sampling signal (S _d ); and

a low-pass filter (14) for low-pass filtering the sampling signal (S ) or a signal derived therefrom in order to obtain the control signal (S _L oc) or a signal (S _TP ) underlying the control signal.

2. Frequency generator according to claim 1, in which the controllable oscillator (16), the scanning device (12) and the low-pass filter (14) are part of a control loop which regulates the oscillator signal (S _out ) to an oscillator frequency whose ratio to the reference frequency is is an integer.

3. Frequency generator according to claim 2, further comprising the following feature:

a device (32, 34, 36, 38, 42) for presetting the control signal (S _L oc) _ι which is designed to

a) to preset the control signal (S _L oc) to a predetermined control value (S _DAC ), and b) then close the control loop.

4. Frequency generator according to claim 2 or 3, which further has the following feature:

means (32, 34, 36, 38, 40, 42) for determining the predetermined control value, which is designed to

a) to preset the control signal (S _LO c) to a test value (S _DAC ),

b) then close the control loop,

c) to detect the value (S _LO c) of the control signal or the control signal (S _TP ) on which the control signal is based, which adjusts upon closing the control loop, in order to obtain a value indicating the predetermined control value.

5. Frequency generator according to one of claims 2 to 4, which further has the following feature:

means (38) for storing a plurality of predetermined control values, each of which is associated with a different oscillator frequency to which the oscillator signal is controlled by the control loop.

6. Frequency generator according to one of claims 2 to 5, which further has the following feature:

a device (32, 34, 36, 38, 42) for adjusting the oscillator frequency, which is designed to

a) to interrupt the control loop, b) preset the control signal to a predetermined control value,

c) then close the control loop.

7. Frequency generator according to one of claims 1 to 6, which further has the following feature:

a device (34) for manipulating the signal (S _TP ) on which the control signal is based in order to obtain a predetermined additive constant control value (S _DAC ) in order to obtain the control signal (S _L oc) for the controllable oscillator (16).

8. Frequency generator according to one of claims 1 to 7, which further has the following feature:

an adder (34) which is connected between the low-pass filter and the controllable oscillator (16).

9. Frequency generator according to one of claims 1 to 8, which further has the following feature:

a device (32) for selectively preventing or enabling the oscillator signal (S _out ) to pass through the sampling device (12) and the low-pass filter (14) to the control input.

10. Frequency generator according to claim 9, wherein the means for selectively preventing or enabling is a switch between the sampling device (12) and the oscillator output of the controllable oscillator (16).

11. Frequency generator according to claim 9 or 10, which further has the following features: an adder (34) which is designed to add a predetermined constant control value to the signal underlying the control signal in order to obtain the control signal;

a control device (42) for adjusting the oscillator frequency, which is designed to cause

a) the means (32) for selectively preventing or enabling the oscillator signal from passing through the sampling device (12) and the low-pass filter (14) to the control input;

b) the adder (34) then uses a different predetermined constant control value for addition; and

c) then the device (32) for selectively preventing and enabling the oscillator signal to pass through the scanning device (12) and the low-pass filter (14) to the control input.

12. Frequency generator according to claim 11, further comprising the following feature:

a memory (38) in which digital values are stored and which is designed to output a selected digital value in response to a selection from among the digital values;

a digital/analog converter (36) for converting the output digital value into an analog control value and outputting the same to the adder (34) as the predetermined constant control value, wherein the control device (42) is designed to access the memory (38) when adjusting the oscillator frequency in order to make a selection among the digital values which corresponds to the different predetermined constant control value in order to cause the adder (34) uses a different constant control value for addition.

13. Frequency generator according to claim 11 or 12, which further has the following features:

a detector (40) for detecting the value of the control signal; and

a control device (42) for determining the predetermined constant control value, which is designed to cause

b) the adder (34) then uses a test value for addition;

c) then the means (32) for selectively preventing and enabling the oscillator signal to pass through the sampling device (12) and the low-pass filter (14) and reach the control input;

d) the detector (40) then detects the value of the control signal resulting from the enabling in order to obtain the predetermined constant control value.

4. Frequency generator according to claim 12, which further has the following features:

an A/D converter for detecting the value of the control signal to obtain a digital detection value; and

a control device for redetermining a digital value in the device (38) for storing, which is designed to cause

a) the device (32) for selectively preventing or enabling the oscillator signal from passing through the scanning device (12) and the low-pass filter (14) to reach the control input;

b) the memory (38) outputs the current digital value to cause the adder (34) to use the corresponding analog control value as the predetermined constant control value;

c) then the means (32) for selectively preventing and enabling the oscillator signal to pass through the sampling means (12) and the low-pass filter

(14) continuously reaches the control input;

d) thereafter the detector (40) detects the resulting value of the control signal in response to the enabling to obtain a value indicative of the predetermined constant control value as a new digital value; and

e) in the memory (38) the current digital value is replaced by the new digital value.

15. Method for generating frequency by means of a controllable oscillator which has a control input and an oscillator output, the controllable oscillator being designed to output an oscillator signal at the oscillator output with an oscillator frequency which depends on a control signal at the control input, the method having the following steps:

sampling the oscillator signal or a controllable oscillator signal derived therefrom at a reference frequency to obtain a sampling signal; and

Low-pass filtering the sampling signal or a signal derived therefrom in order to obtain the control signal or a signal underlying the control signal.

16. Device for determining the control signal-oscillator frequency characteristic of a controllable oscillator, which has a control input and an oscillator output, the controllable oscillator being designed to output an oscillator signal at the oscillator output with an oscillator frequency which depends on a control signal from the control input, wherein the device has the following features:

a sampling device for sampling the oscillator signal or a signal of the controllable oscillator derived therefrom with a reference frequency in order to obtain a sampling signal,

a low-pass filter for low-pass filtering the sample signal or a signal derived therefrom to obtain a signal underlying the same; means for selectively preventing or allowing the oscillator signal to pass through the sampler and the low pass filter to the control input;

an adder which is designed to add a predetermined constant control value to the signal underlying the control signal in order to obtain the control signal;

a detector for detecting the value of the control signal; and

a control device for determining the predetermined constant control value, which is designed to cause

the means for selectively preventing or enabling the oscillator signal from passing through the sampler and the low pass filter to the control input;

then the adder uses a trial value for addition;

then the means for preventing or enabling the oscillator signal to pass through the sampling means and the low pass filter to the control input;

The detector then detects the value of the control signal that adjusts to enable this to be assigned to a predetermined multiple of the reference frequency via the control signal oscillator frequency characteristic

to obtain tax value; and these processes are repeated for different test values.

17. Method for determining the control signal-oscillator frequency characteristic of a controllable oscillator which has a control input and an oscillator output, the controllable oscillator being designed to output an oscillator signal at the oscillator output with an oscillator frequency which depends on a control signal from the control input, the Device has the following features:

sampling the oscillator signal of the controllable oscillator or a signal derived therefrom with a reference frequency to obtain a sampling signal,

low-pass filtering the sample signal or a signal derived therefrom to obtain a signal underlying the same;

Preventing the oscillator signal from passing through the sampler and the low pass filter to the control input;

adding a test value to the signal underlying the control signal to obtain the control signal;

allowing the oscillator signal to pass through the sampler and the low pass filter to the control input;

Detecting the value of the control signal that adjusts in response to the enabling, in order to obtain a control value assigned to an integer multiple of the reference frequency via the control signal oscillator frequency characteristic; and Repeat the steps for different experimental values.