EP1532629A1

EP1532629A1 - Electronic device for processing data in a burst-wise manner

Info

Publication number: EP1532629A1
Application number: EP03787950A
Authority: EP
Inventors: Cornelis Hermanus Van Berkel
Original assignee: Koninklijke Philips Electronics NV
Current assignee: Koninklijke Philips NV
Priority date: 2002-08-14
Filing date: 2003-08-05
Publication date: 2005-05-25
Also published as: JP2005535997A; WO2004017320A1; CN1675706A; KR20050040919A; AU2003251105A1

Abstract

The invention relates to an electronic device comprising a first and a second circuit (1st CIR, 2nd CIR) designed for processing data in a burst-wise manner. The first circuit processes a data packet during a burst and supplies the second circuit with processed data. In order to reduce the peak power due to the power consumptions of the first and the second circuit, the electronic device comprises a delay line (320) between the first and the second circuit.

Description

Electronic device for processing data in a burst-wise manner.

FIELD OF THE INVENTION

The present invention relates to an electronic device comprising a first and a second circuit designed for processing data in a burst-wise manner, the first circuit being designed for processing a data packet during a burst and supplying the second circuit with processed data. The present invention also relates to an information reading system for reading data in a burst-wise manner.

The present invention also relates to an information recording system for recording data in a burst-wise manner.

The present invention is particularly relevant for an optical disc apparatus for reading and/or recording data from and/or to an optical disc, e.g. a CD or DVD player and/or recorder.

BACKGROUND OF THE INVENTION

An electronic device designed for processing data in a burst-wise manner is known from Applicant's EP 0 429 139. This patent describes an information recording and read system comprising a recording and a read device. In such a system, a digital signal to be processed often has a lower bit rate than that for which the recording or the read device has been designed originally.

For example, the read device comprises a light beam, which might be designed for reading data from a disc at a bit rate of 36 megabits per second, while the bit rate of the read system for audio data is typically 128 kilobits per second, i.e. the data should exit the read system at a bit rate of 128 kilobits per second. In order to cope with such bit rates, data are read from the disc and processed in a burst-wise manner at high bit rate. In other words, a data packet is read by the reading device at high bit rate, during a burst. A burst corresponds to a period of time during which a data packet is read at high bit rate.

When data are read, an analogue signal corresponding to these data is detected, and this analogue signal is converted into a digital signal. In this system, such a reading, detection and conversion occur during a burst. The reading and detection correspond to a processing of a data packet and require a first circuit comprising powering means for powering the light beam and detecting means for detecting a signal corresponding to the data packet read from the disc. The conversion requires a second circuit comprising an analogue to digital converter.

After a burst, in which a data packet is read, a signal is detected and converted, a resulting data packet is obtained and stored in a buffer, eventually after further processing at high bit rate.

During the bursts and in between bursts, data can be read from the buffer at a low bit rate. In between bursts, the powering means, the detecting means and the analogue to digital converter can thus be switched off. As the powering means and the analogue to digital converter are highly power consuming, this invention leads to a reduction of the average power consumed by the recording and read system.

However, the fact that the first and second circuits are powered during a burst leads to a high peak power during a burst. Such a high peak power is a drawback, especially in battery-powered applications, because it requires complicated and bulky power distribution units and complicates power management.

SUMMARY OF THE INVENTION

It is an object of the invention to provide an electronic device for processing data in a burst-wise manner, in which the peak power during a burst is reduced.

To this end, an electronic device according to the invention, as described in the opening paragraph, is characterised in that it comprises a delay line between the first and the second circuit.

According to the invention, only the first circuit is powered between the beginning of a burst and the delay introduced by the delay line. Actually, there is no need to power the second circuit until it is supplied with data, and the first processed data coming from the first circuit reaches the second circuit after the delay. As a consequence, the first and second circuits are powered together during a time shorter than the duration of a burst. The duration of a high peak power is therefore reduced.

In a preferred embodiment, the delay line introduces a delay longer than the duration of a burst. According to this preferred embodiment, the peak power is split into two parts, corresponding to respectively the first and the second circuit. Therefore, instead of a high peak power, two peak powers are obtained having a substantially identical amplitude if the power consumptions of the first and second circuits are substantially identical. In such a case, this preferred embodiment allows to reduce the amplitude of the peak power by about 2. In an advantageous embodiment, the delay line is a surface acoustic wave delay line. This embodiment is particularly advantageous when the data coming from the first circuit are analogue data. Actually, a surface acoustic wave delay line is able to deal with analogue data. Furthermore, a surface acoustic wave delay line is a passive component. Introducing a surface acoustic wave delay line between the first and second circuits will therefore not increase the average power consumption, or only very slightly.

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will now be described in more detail, by way of example, with reference to the accompanying drawings, in which: - Fig. 1 is a block diagram showing an electronic device according to the invention, with first and second circuits and a delay line;

Figs. 2a to 2e show the power consumption of the first and second circuits of Fig.l, with and without a delay line;

Fig. 3 illustrates an information reading system according to the invention;

Fig. 4 illustrates an information recording system according to the invention.

DETAILED DESCRIPTION OF THE INVENTION An electronic device according to the invention is depicted in Fig. l. Such an electronic device comprises a first circuit 101, a second circuit 102 and a delay line 103. The first and the second circuit 101 and 102 are designed for processing data in a burst wise-manner. This means that the first and second circuit 101 and 102 are designed for processing a data packet during a short period of time, called a processing period, which period is shorter than the time between two processing periods. In between two processing periods, the first and second circuits 101 and 102 do not process data, and can therefore be switched off. This allows reducing the average power consumption of the electronic device.

The first circuit 101 is designed for applying a first processing to a data packet during a burst, and supplying the second circuit 102 with processed data. The second circuit 102 is designed for applying a second processing to these processed data. This second processing occurs during the burst, or at least begins during the burst. This means that the first and second circuit 101 and 102 have to be powered together during a certain time, as will be explained in more detail in Fig.2. During the time where the first and second circuits 101 and 102 are powered together, there is a large peak power due to the power consumptions of the first and second circuits 101 and 102. The delay line 103 allows reducing this large peak power. Actually, after having been processed by the first circuit 101, the processed data reach the second circuit 102 after a certain delay determined by the characteristics of the delay line. Suppose the processing period is a burst, which means that the second processing occurs during a burst, and suppose the delay is equal to the duration of the burst, Then the data packet is processed by the first circuit 101 during a burst, and the first processed data reach the second circuit 102 at the end of the burst. Therefore, the second circuit 102 can be switched of during the burst, and the first circuit 101 can be switched off at the end of the burst. The peak power during the burst thus is only due to the power consumption of the first circuit 101 and the peak power after the burst is only due to the power consumption of the second circuit 102. In such a case, the duration of the processing period is equal to the duration of two bursts, as will be explained in more detail in Fig.2.

The delay line 103 can be a surface acoustic wave delay line. A surface acoustic wave delay line comprises an input interdigital transducer and an output interdigital transducer, which are used as input and output electrodes mounted on a piezoelectric substrate. When an analogue signal is applied at the input electrode, stress is created between the electrodes by the piezoelectric effect. This stress causes the substrate to shrink and expand, forming a surface acoustic wave which propagates along the substrate to the output electrode. At the output electrode, the wave causes a potential difference, which is then seen as a voltage.

The signal applied at the input of the surface acoustic wave delay line is thus recopied at the output, after a certain delay, which depends inter alia on the characteristics of the interdigital transducer and the length of the piezoelectric substrate. There is a large range of delays available, typically from 0.1 microsecond to 100 microseconds. Depending on the duration of a burst, a suitable delay is chosen in order to reduce the peak power. As will be explained in detail in Fig.2, a delay which is slightly superior to the duration of the burst leads to a good peak power reduction.

Using a surface acoustic wave delay line is particularly advantageous when the data at the output of the first circuit 101 are analogue data. Actually, a surface acoustic wave delay line can receive analogue data at its input and deliver analogue data at its output. In an electronic device where the data processed by the first circuit 101 have to be converted to digital data by an analogue to digital converter, this analogue to digital converter can be placed after the delay line. For example, the analogue to digital converter can be the second circuit 102. As an analogue to digital converter often consumes a high power and therefore contributes to the large peak power in the absence of a delay line, this large peak power is reduced by using the surface acoustic wave delay line, as will be explained in more detail in Fig.2.

Moreover, the surface acoustic wave delay line is a passive component. Therefore, coupling data into the surface acoustic wave delay line and reading out requires little power. As a consequence, introducing a surface acoustic wave delay line between the first and second circuits 101 and 102 does not increase the average power consumption, or only very slightly.

The delay line 103 can also be a charge-coupled device. A charge-coupled device comprises MOS capacitors. When electric charges are applied at an input of a charge-coupled device, these electric charges can be displaced from one capacitor to the next by applying a certain voltage to the capacitors. Such a charge-coupled device can thus play the role of a delay line, with a delay depending on the number of capacitors. A charge-coupled device can be used when the data processed at the output of the first circuit 101 are analogue data.

The delay line 103 can also be a memory, like a static random access memory SRAM. Using a SRAM memory is particularly advantageous when the data at the output of the first circuit 101 are digital data. These data are stored in the memory, and a microprocessor sends the data stored in the memory to the second circuit 102 after a predetermined delay.

Figs. 2a to 2e represent the power consumptions as a function of time of the first and second circuits without and with a delay line, depending on the characteristics of the delay line. In Fig. 2a, there is no delay line between the first and second circuits. The first circuit applies a first processing to a data packet during a burst, which has a duration B, and the second processing applies a second processing to the data processed by the first circuit. This second processing occurs during the burst, which means that data processed by the first circuit are immediately processed by the second circuit. In other words, the processing period PP is a burst. The first and the second circuit are therefore powered together during the time B, which leads to a large peak power during this time.

Another data packet is then processed by the first and the second circuit after a time ΔB, which is larger than the time B. For example, the time ΔB can be 10 or 100 times larger than the time B. Such a processing is done in a burst-wise manner, because the data are processed during bursts B, and the time ΔB between bursts is larger than the duration of a burst.

In Fig. 2b, there is no delay line between the first and the second circuit, but the second processing does not occur exactly during a burst, because the transfer of data from the first circuit to the second circuit requires a time Δt. This corresponds to a real situation, while Fig. 2a corresponds to an ideal situation. In practice, the time Δt is much smaller than the time B, so that the real situation can be compared to the ideal situation. In the following, only the ideal situation is therefore considered, in which a large peak power occurs during a burst when no delay line is used. In Fig. 2c, a delay line is used, with a delay D slightly larger than the time B. The first circuit processes a data packet during the time B, and is then switched off. A first peak power thus occurs during a time B, with an amplitude equal to the power consumption of the first circuit. The first data processed by the first circuit reach the second circuit after the delay D. The second circuit can therefore be switched off during the time D, and then powered in order to process data. A second peak power thus occurs after the delay D, with an amplitude equal to the power consumption of the second circuit. The duration of this second peak power is B, because the last data processed by the first circuit reach the second circuit after a time D+B.

It is important to notice that the sum of the amplitudes of the first and the second peak power is equal to the amplitude of the large peak power of Fig. 2a. The average power consumption thus remains the same with or without a delay line, or increases only very slightly with a delay line, but the use of a delay line allows reducing the amplitude of the peak powers.

It is also important to notice that in this case the duration of the processing period PP is increased. Actually, the duration of the processing period PP is equal to B+D. This is not a constraint, because the data are processed in a burst-wise manner, and the time between two bursts is often much larger than the duration of a burst.

In Fig. 2d, a delay line is used, with a delay D equal to the time B. As a consequence, the duration of the processing period PP is two times the time B. The average power still remains the same, and the amplitude of the peak powers is reduced.

In Fig. 2e, a delay line is used, with a delay D slightly smaller than the time B. As a consequence, the first and the second circuit are powered together during a time equal to B-D, because the first data processed by the first circuit reach the second circuit before the end of the burst. A large peak power thus occurs during this time B-D. Using such a delay line is advantageous if one only wants to reduce the duration of the large peak power. If one wants to suppress the large peak power, the delay lines of Fig. 2c and 2d are more appropriate.

Fig. 3 illustrates an information reading system according to the invention.

Such a reading system comprises an optical pickup 300, comprising powering means 301 for powering a light beam 302 and detecting means 304 for detecting a reflected light beam 303, an amplifier 310, a delay line 320, an analogue to digital converter 330, a digital processor 340 and a buffer 350.

This information reading system is designed for reading information recorded on an optical disc 360. However, it is important to notice that the invention might be carried out with any reading system comprising powering means for powering a reading device designed for reading a track on a recording medium. For example, the invention might be applied to a magneto-optical reading system.

The powering means 301, the detecting means 304 and the amplifier 310 form a first circuit. The analogue to digital converter forms a second circuit. The disc 360 has a spiral track and is rotated by a motor. The optical pickup

300 is arranged opposite to the disc 360 in order to scan a track on the disc 360 with the light beam 302. The system might further comprise a tracking device to ensure that the centre of the light beam 302 coincides with the middle of a given track, a focus control for keeping the light beam 302 in focus on the disc 360, and a radial positioning device, e.g. an actuator, to move the optical pickup 300 in a radial direction relative to the disc 360. The reading of information recorded on the disc 360 is described hereinafter.

The light beam 302 is powered during a burst for reading a data packet located in a given portion of the disc 360 at a high reading bit rate. The duration of a burst might be, for example, a few microseconds. The reading bit rate might be, for example, 36 megabits per second. The light beam 303 reflected from the disc 360 is detected by the detecting means 304, which might be a photodiode. The light beam 302 and the detecting means 304 form a reading device.

A signal is thus detected, which signal corresponds to the data packet read on the disc 360. This signal is then amplified by the amplifier 310, and the resulting signal is sent to the input of the delay line 320. This resulting signal corresponds to read information. At the output of the delay line 320, the read information is converted into a digital signal by the analogue to digital converter 330. Such a conversion corresponds to a processing by the second circuit. The digital signal is then processed by the digital processor 340, which might eventually form a part of the second circuit. The digital signal processor 340 performs a bit detection, an equalization, a demodulation, a channel decoding and an error correction. The resulting signal is then stored in the buffer 350.

The digital signal is then read from the buffer 350 at a bit rate lower than the high reading rate. This bit rate might be, for example, 128 kilobits per second. Data can be read from the buffer 350 until it is empty, or until a degree of filing of the buffer 350 is under a specific limit. The buffer 350 might be of the First-In-First-Out type. When the degree of filing of the buffer 350 is under this specific limit, the light beam 302 is powered during another burst and positioned at the end of the portion of the disc scanned during the preceding burst, in order to read another data packet recorded on the disc 360. Such a positioning is described in EP 0 429 139.

Fig. 4 illustrates an information recording system according to the invention. Such a recording system comprises a buffer 400, a digital processor 410, a digital to analogue converter 420, a delay line 430, a control circuit 440 and an optical pickup 450 comprising powering means 451 for powering a light beam 452. The digital to analogue converter forms a first circuit. The powering means 451 and the control circuit 440 form a second circuit.

This information recording system is designed for recording information on an optical disc 460, which is rotated by a motor. Like the reading system of Fig.3, this recording system might further comprise a tracking device, a focus control and a radial positioning device. The recording of information on the disc 360 is described hereinafter.

Digital information to be recorded on the disc 460 is loaded in the buffer 400 at a low bit rate. This buffer 400 might be of the First-In-First-Out type. A data packet is fetched from the buffer 400 during a burst, at a higher bit rate. During this burst, this data packet is eventually pre-processed by the digital processor 410, and is converted into analogue information by the digital to analogue converter 420. Such a conversion corresponds to a processing applied by the first circuit. It is important to notice that the digital processor 410 might form part of the first circuit. In such a case, the processing applied by the first circuit comprises the pre-processing by the digital processor 410 and the conversion by the digital to analogue converter 420.

The analogue information is sent to the input of the delay line 430. At the output of the delay line 430, the control circuit 440 controls the placement of the optical pickup 450 and the light beam 452 is powered by the powering means 451 in order to write the information to be recorded on a given portion of the disc 460. The duration of a burst can, for example, be determined by a degree of filing of the buffer 400. For example, when the degree of filing of the buffer 400 exceeds a specific upper limit, data are fetched from the buffer 400 until the degree of filing of the buffer 400 is under a specific lower limit. When a data packet has been fetched from the buffer 400 during a burst, the next data packet is fetched from the buffer 400 when the degree of filing of this buffer 400 again reaches the specific upper limit. The control circuits then places the optical pickup in order to write data at the end of the portion where data have been written during the preceding burst.

Any reference sign in the following claims should not be construed as limiting the claim. It will be obvious that the use of the verb "to comprise" and its conjugations does not exclude the presence of any other elements besides those defined in any claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.

Claims

1. An electronic device comprising a first and a second circuit (101, 102) designed for processing data in a burst-wise manner, the first circuit being designed for processing a data packet during a burst and supplying the second circuit with processed data, the electronic device being further characterized in that it comprises a delay line (103) between the first and the second circuit.

2. An electronic device as claimed in claim 1, wherein the delay line introduces a delay longer than the duration of a burst.

3. An electronic device as claimed in claim 1, the delay line being a surface acoustic wave delay line.

4. An information reading system comprising an electronic device as claimed in claim 1, the first circuit comprising powering means (301) for powering a reading device (302, 304) designed for reading from a recording medium (360) and providing read information, the second circuit comprising processing means (330) for processing the read information.

5. An information recording system comprising an electronic device as claimed in claim 1 , the first circuit comprising processing means (420) for processing information to be recorded, the second circuit comprising powering means (451) for powering a recording device (452) designed for recording information on a recording medium (460).

6. An optical disc apparatus comprising an information reading system as claimed in claim 4 and/or an information recording system as claimed in claim 5.