EP1509069A3 - Double-sided wiring circuit board and process for producing the same - Google Patents
Double-sided wiring circuit board and process for producing the same Download PDFInfo
- Publication number
- EP1509069A3 EP1509069A3 EP04019719A EP04019719A EP1509069A3 EP 1509069 A3 EP1509069 A3 EP 1509069A3 EP 04019719 A EP04019719 A EP 04019719A EP 04019719 A EP04019719 A EP 04019719A EP 1509069 A3 EP1509069 A3 EP 1509069A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- hole
- insulating layer
- double
- circuit board
- wiring circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/421—Blind plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09827—Tapered, e.g. tapered hole, via or groove
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003298283A JP2005072168A (en) | 2003-08-22 | 2003-08-22 | Double-sided wiring circuit substrate and its manufacturing method |
JP2003298283 | 2003-08-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1509069A2 EP1509069A2 (en) | 2005-02-23 |
EP1509069A3 true EP1509069A3 (en) | 2006-12-06 |
Family
ID=34056258
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP04019719A Withdrawn EP1509069A3 (en) | 2003-08-22 | 2004-08-19 | Double-sided wiring circuit board and process for producing the same |
Country Status (6)
Country | Link |
---|---|
US (1) | US20050062160A1 (en) |
EP (1) | EP1509069A3 (en) |
JP (1) | JP2005072168A (en) |
KR (1) | KR20050020699A (en) |
CN (1) | CN1585594A (en) |
TW (1) | TW200517023A (en) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI246384B (en) * | 2004-11-22 | 2005-12-21 | Benq Corp | Multi-layer printed circuit board layout and manufacturing method thereof |
KR100588770B1 (en) | 2004-12-14 | 2006-06-12 | 디케이 유아이엘 주식회사 | Double side flexible printed circuit board and manufacturing method thereof |
JP5021216B2 (en) * | 2006-02-22 | 2012-09-05 | イビデン株式会社 | Printed wiring board and manufacturing method thereof |
CN101945533B (en) * | 2006-05-17 | 2013-04-03 | 三菱制纸株式会社 | Circuit substrate |
TWI468093B (en) * | 2008-10-31 | 2015-01-01 | Princo Corp | Via structure in multi-layer substrate and manufacturing method thereof |
KR100958023B1 (en) * | 2008-11-04 | 2010-05-17 | 삼성모바일디스플레이주식회사 | Organic Light emitting Display device |
JP5561591B2 (en) * | 2010-03-17 | 2014-07-30 | 大日本印刷株式会社 | Wiring circuit board and method for manufacturing wiring circuit board |
CN102413639B (en) * | 2011-07-27 | 2015-04-15 | 深南电路有限公司 | Manufacturing method of circuit board |
TWI437137B (en) * | 2012-06-29 | 2014-05-11 | Viking Tech Corp | Metal plating deposition method |
JP6027819B2 (en) * | 2012-08-20 | 2016-11-16 | 日東電工株式会社 | Printed circuit board |
FR3006549B1 (en) * | 2013-06-03 | 2016-10-14 | Linxens Holding | METHOD FOR PRODUCING AN ELECTRICAL CIRCUIT AND ELECTRIC CIRCUIT CARRIED OUT BY THIS METHOD |
CN104425229A (en) * | 2013-09-10 | 2015-03-18 | 中国科学院微电子研究所 | Fin manufacturing method |
CN103987198B (en) * | 2014-05-27 | 2017-02-01 | 中国科学院微电子研究所 | Manufacturing method for coreless substrate without auxiliary structure |
CN109788661B (en) * | 2017-11-10 | 2021-08-24 | 宏启胜精密电子(秦皇岛)有限公司 | Flexible circuit board and preparation method thereof |
CN111508926B (en) | 2019-01-31 | 2022-08-30 | 奥特斯(中国)有限公司 | Component carrier and method for producing a component carrier |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4714516A (en) * | 1986-09-26 | 1987-12-22 | General Electric Company | Method to produce via holes in polymer dielectrics for multiple electronic circuit chip packaging |
US4940881A (en) * | 1989-09-28 | 1990-07-10 | Tamarack Scientific Co., Inc. | Method and apparatus for effecting selective ablation of a coating from a substrate, and controlling the wall angle of coating edge portions |
US5066357A (en) * | 1990-01-11 | 1991-11-19 | Hewlett-Packard Company | Method for making flexible circuit card with laser-contoured vias and machined capacitors |
US6127633A (en) * | 1995-04-28 | 2000-10-03 | Victor Company Of Japan, Ltd. | Multilayer print circuit board having a blind hole in an insulation layer with a roughened surface formed by application of an oxidizing agent and method of production |
US20010002625A1 (en) * | 1999-06-24 | 2001-06-07 | Nec Corporation | Wiring substrate, multi-layered wiring substrate and method of fabricating those |
US20020056192A1 (en) * | 2000-09-27 | 2002-05-16 | Tokihito Suwa | Method of producing multilayer printed wiring board and multilayer printed wiring board |
US20030039106A1 (en) * | 2000-04-14 | 2003-02-27 | Tatsunori Koyanagi | Double-sided wiring board and its manufacture method |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6858937B2 (en) * | 2000-03-02 | 2005-02-22 | Micron Technology, Inc. | Backend metallization method and device obtained therefrom |
JP2002043456A (en) * | 2000-07-24 | 2002-02-08 | Victor Co Of Japan Ltd | Multi-layer printed wiring board |
JP2002176259A (en) * | 2000-09-27 | 2002-06-21 | Hitachi Ltd | Multilayer printed wiring board and method of manufacturing the same |
JP2002353160A (en) * | 2001-05-28 | 2002-12-06 | Murata Mfg Co Ltd | Circuit substrate and manufacturing method therefor |
US6413815B1 (en) * | 2001-07-17 | 2002-07-02 | Macronix International Co., Ltd. | Method of forming a MIM capacitor |
US6828639B2 (en) * | 2002-07-17 | 2004-12-07 | Micron Technology, Inc. | Process flow for building MRAM structures |
JP2004247391A (en) * | 2003-02-12 | 2004-09-02 | Toray Ind Inc | Method for manufacturing circuit board |
-
2003
- 2003-08-22 JP JP2003298283A patent/JP2005072168A/en active Pending
-
2004
- 2004-08-18 US US10/920,317 patent/US20050062160A1/en not_active Abandoned
- 2004-08-19 EP EP04019719A patent/EP1509069A3/en not_active Withdrawn
- 2004-08-20 KR KR1020040065812A patent/KR20050020699A/en not_active Application Discontinuation
- 2004-08-20 TW TW093125135A patent/TW200517023A/en unknown
- 2004-08-23 CN CNA2004100576652A patent/CN1585594A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4714516A (en) * | 1986-09-26 | 1987-12-22 | General Electric Company | Method to produce via holes in polymer dielectrics for multiple electronic circuit chip packaging |
US4940881A (en) * | 1989-09-28 | 1990-07-10 | Tamarack Scientific Co., Inc. | Method and apparatus for effecting selective ablation of a coating from a substrate, and controlling the wall angle of coating edge portions |
US5066357A (en) * | 1990-01-11 | 1991-11-19 | Hewlett-Packard Company | Method for making flexible circuit card with laser-contoured vias and machined capacitors |
US6127633A (en) * | 1995-04-28 | 2000-10-03 | Victor Company Of Japan, Ltd. | Multilayer print circuit board having a blind hole in an insulation layer with a roughened surface formed by application of an oxidizing agent and method of production |
US20010002625A1 (en) * | 1999-06-24 | 2001-06-07 | Nec Corporation | Wiring substrate, multi-layered wiring substrate and method of fabricating those |
US20030039106A1 (en) * | 2000-04-14 | 2003-02-27 | Tatsunori Koyanagi | Double-sided wiring board and its manufacture method |
US20020056192A1 (en) * | 2000-09-27 | 2002-05-16 | Tokihito Suwa | Method of producing multilayer printed wiring board and multilayer printed wiring board |
Also Published As
Publication number | Publication date |
---|---|
JP2005072168A (en) | 2005-03-17 |
EP1509069A2 (en) | 2005-02-23 |
KR20050020699A (en) | 2005-03-04 |
TW200517023A (en) | 2005-05-16 |
CN1585594A (en) | 2005-02-23 |
US20050062160A1 (en) | 2005-03-24 |
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17P | Request for examination filed |
Effective date: 20070206 |
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AKX | Designation fees paid |
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
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18D | Application deemed to be withdrawn |
Effective date: 20080301 |