EP1488531A1

EP1488531A1 - Method for decoding a data sequence that has been encoded with the help of a binary convolution code

Info

Publication number: EP1488531A1
Application number: EP03744712A
Authority: EP
Inventors: Lutz Finn; Sabine RÖSSEL; Gerhard Steib
Original assignee: Siemens AG; Nokia Siemens Networks GmbH and Co KG
Current assignee: Nokia Solutions and Networks GmbH and Co KG
Priority date: 2002-03-27
Filing date: 2003-03-20
Publication date: 2004-12-22
Also published as: US20050166128A1; KR20040099360A; US7143334B2; KR100973097B1; WO2003081786A1; CN1643798A; AU2003215670A1

Abstract

The invention relates to a method for decoding a data sequence consisting of K information bits that has been encoded with the help of a binary convolution code, using a MaxLogMAP algorithm. In a first calculation operation, metric values are calculated accurately in a forwards and backwards direction in a trellis diagram and only some of said values are stored in a memory as interpolation points for an additional calculation operation. Said interpolation points are used in an additional calculation operation to accurately calculate the metric values that lie between the interpolation points of the first calculation operation. Soft output values are formed for decoding, said values being determined accurately after n operations.

Description

description

A method for decoding a using a binary Fal ^¬ tung codes encrypted data sequence

The present invention relates to a process for Decodie ^¬ tion of an encrypted using a binary convolutional code data sequence from K information bits using a Max LogMAP algorithm.

In the case of voice channels and data channels of a radio communication system, which is designed, for example, according to the GSM / EDGE mobile radio standard, binary convolutional codes are used for data coding or data decoding. A preferred algorithm for a so-called “soft input / soft output decoding * is the well-known“ symbol-by-symbol log-likelihood maximum aposteriori probability * algorithm (LogMAP algorithm), which is generally based on a Maximum approximation (MaxLogMAP algorithm) is realized.

The basic MAP algorithm is described, for example, in the publication "Optimal Decoding of Linear Codes for Minimizing Symbol Error Rate, L.R. Bahl et al. , IEEE Transactions on Information Theory, pp. 284-287, March 1974, the MaxLogMAP algorithm can be described in the document “Iterative Decoding of Binary Block and Convolutional Codes *, J. Hagenauer et al. , IEEE Transactions on Information Theory, vol. 42, no. 2, pp. 429-445, March 1996.

An indow MaxLogMAP algorithm carried out with the help of a so-called “sliding window * (decoding window) is described in the publication“ An Intuitive Justification and a Simplified fied Implementation of the MAP Decoder for Convolutional Codes *, AJ Viterbi, IEEE Journal on Selected Areas in Communications, vo. 16, no.2, pp. 260-264, Feb. 1998.

The binary trellis diagram serves as the basis for decoding a data sequence encrypted with the aid of a binary convolutional code. A segment of the trellis diagram belonging to an information bit of the data sequence captures all possible combinations of m (memory length of the convolutional code) preceding information bits as 2 ^m initial states. Furthermore, all resulting “conversions * (encodings) of the information ^{bit are recorded} as 2 ^{lm + 1)} state transitions and resulting 2 ^m target states as initial states for the next subsequent information bit. An information bit sequence corresponds to a specific path within the trellis diagram, with the MaxLogMAP algorithm being used to determine a sequence of the most likely information bits in the trellis diagram.

When implementing the MaxLogMAP algorithm, a distinction must be made between a systolic implementation on the one hand and a processor-oriented implementation on the other. In the systolic implementation, the greatest possible parallelism of decoding steps in the entire trellis diagram is sought. This implementation is used for extremely high data throughput requirements of up to 50 Gbit / s. The processor-oriented implementation is suitable for moderate data throughput requirements of a few Mbit / s with little hardware expenditure. In both implementations, it is assumed that for large data sequences transmitted in blocks, decoding can only be sensibly implemented with the aid of a decoding window.

For reasons of data throughput and hardware expenditure, the Window MaxLogMAP algorithm is generally used for decoding.

Decoding results (soft output values), which are obtained in comparison with a MaxLogMAP algorithm without a decoding window, are more accurate, but this requires a great deal of hardware and memory.

An alternative to the MaxLogMAP algorithm is based on a block error rate for a given signal-to-noise

Distance formed by the “soft output viterbi algorithm * (SOVA) described in DE 39 10 739 C3 or DE 42 24 214 C2. Compared to the MaxLogMAP algorithm, however, the SOVA algorithm has a lower correlation between decoding errors and the soft output values formed.

The object of the present invention is to carry out a decoding of a data sequence encrypted with the aid of a binary convolutional code by means of the MaxLogMAP algorithm in such a way that with low hardware expenditure, precise

Soft output values are formed as decoding results.

The object of the invention is solved by the features of claim 1. Advantageous further developments are specified in the subclaims.

The method according to the invention is one of the processor-oriented implementations of the MaxLogMAP algorithm. The inventive Speicherkaskadierung one hand, and by the use of support points for Metrikberech ^¬ voltage on the other hand, the MaxLogMAP algorithm is efficient on exactly one user-specific module (ASIC) can be integrated.

By not using a decoding window, there is no need to compromise on the accuracy of the decoding results.

According to the invention, the metric values are calculated productively in a first calculation run and reproductively in further calculation runs based on the stored reference points.

An optimal data throughput is realized by the storage cascading according to the invention.

The method according to the invention saves storage space and thus area on an ASIC module. The space saved is thus available for further signal processing algorithms, which means that additional algorithms can be implemented in the ASIC module.

An exemplary embodiment of the invention is explained in more detail below with reference to a drawing. It shows:

1 shows a basic representation of a MaxLogMAP algorithm for the exact calculation of soft output

State-of-the-art values, 2 shows a basic illustration of a window MaxLogMAP algorithm for calculating soft output values according to the prior art,

3 shows a basic illustration of a MaxLogMAP algorithm according to the invention for the exact calculation of soft output values, and

4 shows an example of the metric value calculation and storage according to the invention.

1 shows a basic representation of a MaxLogMAP algorithm for the exact calculation of soft output values according to the prior art.

The MaxLogMAP algorithm is used to decode a data sequence encoded using a binary convolutional code from K information bits.

In a trellis diagram TREL, alfa metric values Mα-calc-store for each individual trellis segment TSN starting with a trellis segment T1 are calculated and stored as logarithmic transition probabilities. At the same time, beta metric values Mß-calc-store for each individual trellis segment TSN are calculated and stored starting at a trellis segment T2.

The two calculations take place on a trellis segment TSM, from which point on a decision process for calculating a soft output value is carried out, ie the decoding of an information bit of the data sequence takes place. In the case of a “forward decision process * FDP carried out in the forward direction, after passing the trellis segment TSM, currently calculated alfa metric values are obtained Mα-calc with the previously calculated and stored beta metric values Mß-calc-store used to calculate the soft output value.

This process takes place at the same time in a backward decision process * BDP, in which the currently calculated beta metric values Mß-calc are used with the previously calculated and stored Alfa metric values Mα-calc-store to calculate the soft output value.

The following applies: K information bit number, s state of a convolutional code decoding, code memory length, T required number of trellis segments, with T = K + m, and π length of a transient phase, with π> 5 * m

With a word width w of a metric memory and assuming that the respective metric values are normalized, there are two for this implementation of the MaxLogMAP algorithm

Metric processors and a total of 2 -K / 2 - w - 2 ^m memory spaces required. A data throughput of: 1

[Mbit / s; t segment - 10

The above-mentioned parameter t _segmen t is dependent on the module technology (ASIC) used to implement the algorithm, on the memory architecture and on the clock rate used in the ASIC module. In the case of terminated codes, the respective calculation of the metric values begins with the assumption of an uneven probability distribution in a trellis segment with a start state value (“initial state”), which has a probability of 100%, while all further “states * have a probability of Have 0%.

With the so-called “tailbiting codes *”, no start state is known from the outset, which is why a settling phase of length π must be introduced for both directions. Associated metric values of the transient phase are designated with Mα-pre or with Mß-pre.

2 shows a basic illustration of a window MaxLogMAP algorithm for calculating soft output values according to the prior art.

The Window-MaxLogMAP algorithm, which is implemented with the help of a sliding decoding window, is used for long data sequences. A particular advantage of the Window MaxLogMAP algorithm is its efficient implementation.

In comparison with FIG. 1, alpha metric values Mα-calc are calculated exactly starting in the forward direction with a trellis segment Tl. In contrast, beta metric values Mß-calc-1 of a first decoding window DPI or beta metric values Mß-calc-2 of a second decoding window DP2 are estimated.

If the two decoding windows DPI and DP2 reach the right edge of the trellis diagram TREL, all termination information is available. It will be the beta metric values Mß-calc-1 or Mß-calc-2 calculated exactly and the corresponding ^¬ the soft output values formed.

Metric values Mα-pre, Mß-pre-1 and Mß-pre-2 are in turn assigned to a settling phase.

The Window-MaxLogMAP algorithm is described in more detail in the above-mentioned publication “An Intuitive Justification and a Simplified Implementation of the MAP Decoder for Convolutional Codes *.

In this implementation, with a data throughput comparable to FIG. 1, a total of | w / ζ- + l metric processors and \ + θ) - ψ - w - 2 ^m memory locations are required.

Here is: ψ the number of trellis segments, for each 2 ^m

Metrics are stored, w the size of the decoding window in trellis segments, and θ e {θ, l} a parameter that depends on the chip technology (ASIC) used to implement the algorithm, on the memory architecture and on the ASIC Block rate used is.

Especially at code rates close to one (generated with the help of puncturing) of high-rate channels, however, performance degradations that are no longer tolerable are caused by using the decoding window. 3 shows a basic illustration of a MaxLogMAP algorithm according to the invention for the exact calculation of soft output values.

In comparison with FIG. 1, again Alfa metric values in a forward direction and beta metric values in a backward direction of each trellis segment TSN are calculated. However, according to the invention, only metric values of a selected number of trellis segments that serve as support points are now selected and stored.

In a preferred embodiment, the storage takes place within a memory cascaded in levels.

The following applies: m code memory length, sm “memory length shift * of a feed forward

Terminated cödes (for a recursive terminated code and for a tail biting code sm = 0),

K number of information bits, T required number of trellis segments, T = K + m; π Length of the settling phase with π> 5 * m. δ (l) storage depth of a first storage level SP (1) for support points of a first metric value calculation, δ (nl) storage depth of an n-1 th storage level SP (nl) for support points of an n-1 th metric value calculation, and δ (n ) Storage depth of an n-th storage level SP (n) for nodes of an n-1 th metric value calculation. Be at the trellis diagram TREL in a first pass on a trellis segment Tl starting Alfa-metric values Mα-calc (l) in a forward direction FDP and at a Trel ^¬ lis segment T2 starting beta metric values MSS calc (l) in a reverse direction BDP for each of the trellis segments TSN as logarithmic transition probabilities.

According to the invention, however, the calculated metric values Mα-calc (l) or Mß-calc (l) of the first pass for a selection of K / δ (l) trellis segments which serve as support points are now metric values Mα-calc -sel (1) or Mß-calc- sel (l) of the first pass are each stored in a first storage level SP (1) with a storage depth of δ (l).

In a second run, based on two neighboring support points of the first run, metric values Mα-calc (2) or Mß-calc (2) of those trellis segments TSN which are arranged between the respective support points of the first run are again calculated are.

As in the first run, the calculated metric values Mα-calc (2) and Mß-calc (2) of the second run for a selection of K / δ (l) / δ (2) trellis segments, which in turn serve as support columns , the corresponding metric values

Mα-calc-sel (2) or Mß-calc-sel (2) of the second pass are stored in a second storage level SP (2) with a storage depth of δ (2).

This metric value calculation based on the support points of a previous run is accordingly both continued in the forward and backward directions. Corresponding soft output values are formed after passing through the TSM trellis segment, with memory levels that are freed up being used accordingly.

The decision process for determining the soft output values takes place as described in FIG. 1. The individual storage levels are cascaded.

After n passes, all soft output values are determined, the nth memory level having a memory depth of δ (n) with stored metric values of K / δ (1) / δ (2) / .... / δ (n) trellis segments or Has support points.

In comparison with the data throughput indicated in FIGS. 1 and 2, a total of 2 - n metric processors and

«W - 2 ^{m of} storage space required.

The following applies: = K, θ _x e {θ, l}, depending on how many le ASIC clock cycles are required for a trellis segment and how many ports are available in the memories.

Using existing implementations of the MaxLogMAPWindow algorithm, parameters can be derived and used for a comparison between the conventional implementations known from FIG. 1 or FIG. 2 and the implementation according to the invention. The results are shown in the table below:

With the same data throughput and without sacrificing the accuracy of the MaxLogMAP algorithm, made possible by avoiding a decoding window, the hardware outlay in the memory-cascaded implementation according to the invention is reduced by more than 80% compared to the conventional implementation described in FIG.

The following was assumed for this comparison:

- an overhead through soft input and soft output buffers at a system interface with (R ^-1 + l) - w _soft - k - a _memory where usually k = K, but k = W + ((n _p - 1) * δ ) can be implemented with a decoding window; with R as code

Rate, w _SO t as the word width of the software and a memory as the unit of area per memory bit,

- An overhead through control and interface: A _oVerhead .

- a metric processor including scaling of the register bits: t rH M '/ parallel + ^ ^{→ ■} W ^■ ü _{fll ≠ op} where A _V iterbi represent the Viterbi arithmetic for a given word width w and a _flip-flop the register area unit per bit, f _parallel is the number of butterfly calculations carried out in an A _S I _C cycle and can take the following values: {1,2, ..., 2 ^{(~ 1)} }, a metric word width w = 16,

- a software word length w _soft = 8,

a memory _bit area a _memσr y = 2,

a register bit area at _P fχ ₀ p = 10 units,

- a Viterbi arithmetic / butterfly equivalent = 12500 units,

- an overhead A _over head = 50,000 units.

The units correspond to a gate equivalent of 0.18 μm ASIC technology at a clock frequency of around 150 MHz.

In the following, data of a GSM / EDGE standard relevant parameter set are compared:

- Code rate R = 1/6

- Memory length m = 6 - Block size K = 1000

- Decoder throughput greater than 2 Mbit / s

- parallelism fparaiiei = 1

With UMTS (W-CDMA) and with UTRAN TDD convolutional codes the following parameters have to be used for the convolution decoding:

- Code rate R = 1/3

- Memory length m = 8

- Maximum block size K = 300

- Decoder throughput greater than 2 Mbit / s

- parallelism fparallel = 8

With UMTS (W-CDMA) and UTRAN TDD Turbo Codes, a MaxLogMAP decoder with minor extensions can be considered as part of the turbo decoding. Here, too, the memory cascaded implementation can be compared with the direct and the window implementation:

Code rate R = 1/3 memory length m = 3 Maximum block size K = 5200 Decoder throughput greater than 2 Mbit / s parallelism f arallel = 1/4

In a first run D1, alpha metric values or beta metric values are calculated. From every sixth trellis segment TSN = 1, 7, 13, ..., 73 as support point because 2 calculated alpha metric values are stored in a storage level SP (αl) and 2 ^m calculated beta metric values in each case in a storage level SP (ßl).

In a second pass D2, these metric values are read out from the memory levels SP (αl) or SP (β1) and the associated alpha metric values or beta metric values are calculated exactly from the trellis segments arranged between the support points. Again, a corresponding selection of trellis segments is made as support points and the associated metric values are stored. Two memory levels SP (α2) and SP (α2 ') or SP (ß2) and SP (ß2') are given here as examples.

In a third pass D3, the trellis segment TSM is reached from both sides and 2 ^m beta metric values currently calculated for the “backward decision process *” with stored 2 ^m Alfa metric values are stored in the memory SP (α2). are used to determine soft output values. Likewise, 2 ^m alpha metric values currently calculated for the “forward decision process *” with stored 2 ^m beta metric values, which are stored in the memory SP (β2), are used to determine soft output values.

After a total of n = 3 passes Dn, all decision values Mdecisions were formed.

Claims

claims

1. Method for decoding a data sequence from K information bits encrypted with the aid of a binary convolutional code,

- In the case of a trellis diagram with trellis segments, in a first pass for a forward direction and for a reverse direction, metric values of all trellis segments are calculated exactly using a MaxLogMAP algorithm,

- in which a number of trellis segments are selected as support points of the first pass and associated metric values are stored in a first storage level, - in which with l <i≤n in an i th pass for both

Directions are calculated metric values of trellis segments that are arranged between the support points of an i-1 th pass, stored metric values of support points of the i-1 th pass being used to calculate the metric values of the i-th pass,

in which a number of trellis segments are selected as support points of the i th passage and associated metric values are stored in an i th memory level,

- in which the metric value calculation and storage based on the support points takes place n times until the metric value calculation of the forward direction and the reverse direction meet in a trellis segment and a decision process for calculating soft output values for decoding is subsequently carried out.

2. The method as claimed in claim 1, in which a storage depth of δl is assigned for each direction of the first storage level, the respective metric values of each K / δl-th trellis segment being stored in the first storage level.

3. The method according to claim 1 or 2, in which a storage depth of δi is assigned for each direction of the i-th storage level, the respective metric values of each K / δl /.../ in the i-th storage level δi th trellis segment can be saved.

4. The method according to any one of the preceding claims, in which a delayed decision phase is used in the case of terminated codes for calculating the soft output values.

5. The method according to any one of the preceding claims, wherein the decoding is carried out on exactly one user-specific component.