EP1376530A1

EP1376530A1 - Control method for a liquid crystal display solving the problem of ESD-induced latch-up

Info

Publication number: EP1376530A1
Application number: EP03253765A
Authority: EP
Inventors: Barry Wynne; Andrew Thomson
Original assignee: Delphi Technologies Inc
Current assignee: Delphi Technologies Inc
Priority date: 2002-06-28
Filing date: 2003-06-13
Publication date: 2004-01-02
Anticipated expiration: 2023-06-13
Also published as: DE60300353T2; GB0215125D0; EP1376530B1; DE60300353D1; ATE290247T1

Abstract

A method of controlling a liquid crystal display device (8) is described. The liquid crystal display device (8) has a data storage means (32,36) for storing data to be displayed by said device (8), and display means for displaying said data. The method comprises the steps of: (a) generating (130) first data to be displayed by said device (8); (b) applying (132) said first data to said data storage means (32,36); (c) applying (134) said first data in said data storage device (32,36) to said display means for displaying thereby, and (d) at a predetermined time, generating and applying (128) reset command data to said data storage means (32,36). By applying reset command data, the liquid crystal display device (8) becomes unlatched and then continues to function normally, so that the problem of latch up induced by electrostatic discharge is overcome.

Description

Technical Field

The invention relates to a method of controlling a liquid crystal display of the type suitable for use in a vehicle to display a warning or other status signal to the driver of the vehicle.

Background Art

A liquid crystal display (LCD) typically includes two glass plates which are separated by between 5 to 10 µm and which define therebetween a cell which is filled with a liquid crystal material. Two polarisers are arranged, one on each side of the cell, with their polarisation axes oriented at 90 degrees to one another. The inner surfaces of the glass plates may be coated with transparent electrodes, typically formed from indium tin oxide, which define the characters, symbols or other patterns to be displayed. Between the glass plates and the liquid crystal material, alignment or orientation layers of polymeric material are treated to induce the adjacent liquid crystal molecules to maintain a defined orientation angle. If the alignment or orientation layers are arranged at 90 degrees to one another, the molecules of the liquid crystal material introduced between the plates will be caused to twist through a 90 degree helix and the polarised light passing through the cell will be guided by the molecules through the 90 degree helix so that the polarisation axis is rotated by 90 degrees.
By applying an electric field across the cell, the polarisation properties of the cell can be varied as the liquid crystal molecules are caused to align with the electric field, and the 90 degree twist in the optic axis is distorted. By varying the electric field applied across the cell, incident polarised light will therefore either have its polarisation axis aligned with that of the exit polariser (an ON state), in which case light is transmitted through the device, or will have its polarisation axis orthogonal to the exit polariser (an OFF state) in which case light is not transmitted through the device.
In a multiplexed liquid crystal device, multiplex drive electrodes are arranged in a matrix on the glass plates. Selective addressing of the electrode matrix provides a means of varying the characters, graphics or others symbols to be displayed, as molecules in only selected segments of the cell are caused to align with the applied electric field. A driver chip is used to apply drive signals to the electrode matrix to display the demanded image.
LCDs for use on board vehicles typically take the form of double super twisted nematic (DSTN) type devices having an active cell to which drive signals are applied, in use, to display a demanded image. Such displays are used to display information to the driver regarding the status of the vehicle and/or the engine. For example, a warning signal may be displayed if one of the doors is open, if the boot is not closed or if the driver's seat belt is not fastened.
Such LCDs are susceptible to Electro Static Discharge (ESD) and it has been observed that this frequently causes the display to become corrupted. This condition, known as "latch-up", can prevent the displayed information from changing correctly. Thus, an existing warning signal may be continuously displayed even though the problem to which it relates has been corrected or, alternatively, new warning signals may be prevented from being displayed correctly.
Such a latch-up condition is clearly undesirable, particularly if the liquid crystal display device is used to display critical safety warning signals, for which there may be potentially damaging or dangerous consequences if ignored. Furthermore, such displays are frequently located in positions which are easily accessible, such as on automobile dashboards, and are thus highly susceptible to ESD.
It is known to provide mechanical solutions to the problem of ESD of liquid crystal displays. One solution is to provide the LCD with a protective lens. However, this solution is expensive and frequently the lens is large and so adversely affects the aesthetics of the LCD device.
Another solution is the provision of a conductive film on the LCD itself. Again, this option is costly and the film exhibits an increased light attenuation of up to around 65%. In addition, the location of the film during manufacture of the LCD is time-consuming and the electrical connection of the film is difficult.
Yet a further solution is the provision of an Indium Tin Oxide layer on the front of the LCD cell. Again, this is prohibitively costly, difficult to manufacture and exhibits around a 30% increase in light attenuation.
US Patent No. 6,317,172 (Valeo Electronique) describes a liquid crystal display module which is protected against electrostatic discharges. The liquid crystal display module comprises a multiplicity of parallel inputs connected via a multiplicity of control lines to a multiplicity of outputs of a control module supplied by an electrical power supply. The output of the display module and the electrical power supply are connected to an electrical ground. A branch line has an input connected to the electrical power supply and an output connected directly to the output of the display module. Thus protection against electrostatic discharge is provided by a low impedance shunt to dissipate the electrostatic discharge away from the sensitive parts of the electrostatic display.
It would be advantageous to provide an improved solution to the problem of ESD-induced latch-up of LCD devices which does not suffer the drawbacks associated with existing solutions. Another aim of the invention is to provide a software-based solution which provides recovery from an electrostatic discharge.

Summary of Invention

According to one aspect of the present invention, therefore, there is provided a method of controlling a liquid crystal display device having data storage means for storing data to be displayed by said device and display means for displaying said data, the method comprising the steps of: (a) generating first data to be displayed by said device; (b) applying said first data to said data storage means; (c) applying said first data in said data storage device to said display means for displaying thereby; and (d) at a predetermined time, generating and applying reset command data to said data storage means.
Preferably, the step (d) may include the step of automatically generating and applying reset command data at a predetermined reset frequency, for example under the control of an associated control unit (ECU). Alternatively, the step (d) may include the step of a user providing a manual input to generate and apply the reset command data at the predetermined time, as determined by the user.
The data storage means may include a first data storage device and a second data storage device. Thus step (b) may include the step of:
(b) applying said first data to said first data storage device, and step (c) may include the steps of:
(c)-(i) applying said first data from said first data storage device to said second data storage device; and
(c)-(ii) applying said first data from said second data storage device to said display means for displaying thereby.

(c)-(ii)-(I) applying said first data from said second data storage device to said driver means; and
(c)-(ii)-(II) applying said first data from said driver means to said display means for displaying thereby.

The method preferably includes the step of:
(e) performing a frame refresh operation by repeating steps (c)-(i) to (c)-(ii)-(II) at a frame refresh frequency..
At step (d), the reset command data is preferably applied to the second data storage device. The reset command data is preferably not applied to the first data storage device.
The first data storage device may comprise a Random Access Memory (RAM) or the like. The second data storage device may comprise a buffer, latch circuit or the like.
By applying reset command data to the second data storage device and/or to the driver means, the liquid crystal display device becomes unlatched and then continues to function normally so that the problem of latch up induced by electrostatic discharge is overcome.
In a further preferred embodiment, the method includes the step of applying said first data to a driver chip, for example an SED157A chip, whereby said driver chip applies said first data to said display means.
In one embodiment, the method includes the step of applying said first data to the display means at a reset frequency in synchronisation with the frame refresh frequency, or alternatively following a predetermined number of frame refresh operations.
It will be appreciated that, in the previous description, the sequence of method steps may, but need not, be carried out in the order in which they are recited.
The method is particularly suitable for use in STN or DSTN type devices, but is equally applicable to LCD devices comprising other materials.

Brief Description of Drawings

The present invention will now be described, by way of example only, with reference to the accompanying drawings in which:
Figure 1 is a schematic side view of a double STN (DSTN) liquid crystal display;
Figure 2 is a perspective view of the double STN (DSTN) liquid crystal display shown in Figure 1;
Figure 3 is a schematic block diagram of a liquid crystal display driver chip suitable for use with the method of the invention;
Figure 4 is a flow diagram to illustrate the method steps of a main control loop for displaying an image on the liquid crystal display of Figures 1 and 2; and
Figure 5 is a flow diagram to illustrate the method steps of a modified control loop according to the invention for displaying an image on the liquid crystal display of Figures 1 and 2.

Detailed Description of the Preferred Embodiments

Referring to Figures 1 and 2, there is shown a liquid crystal display device 8 of the type comprising a first, active cell 10 and a second, passive cell 12. The active cell 10 includes front and rear glass plates (only the rear one 19 of which is shown in Figure 2), between which a liquid crystal material is provided such as, for example, a super twisted nematic material. The passive cell 12 is of similar construction and the two cells 10, 12 are bonded together by means of a bonding layer 13 in a conventional manner to form a double-cell arrangement, commonly referred to as a double super twisted nematic (DSTN) device.
A heating element 14 formed from a layer of indium tin oxide (ITO) extends through the passive cell 12, in contact with the liquid crystal material. Front and rear device polarisers 18, 20 are arranged on the front face of the active cell 10 and the rear face of the passive cell 12 respectively, and are oriented such that their polarisation axes are orthogonal to one another. A temperature sensor (not shown) may be provided on the device to continuously monitor the temperature of the liquid crystal material within the active cell 10.
The DSTN device shown in Figures 1 and 2 is of the type suitable for use in a vehicle to display information to the driver regarding the status of the vehicle and/or the engine. Typically, the display 8 may be used to provide a warning signal if one of the doors is open, if the boot is not closed or if the driver's seat belt is not fastened. Additionally, the display may be used to provide an indication of engine speed, engine temperature, fuel economy or a warning signal that engine oil level is low, or may be used to display Global Positioning System (GPS) information.
An appropriate matrix of electrodes (not shown) is provided on the active cell 10, to which appropriate drive voltage signals are applied, in use, from an associated voltage source (not shown) by means of first and second driver chips 22, 24 mounted on the glass plate 19. Typically, the driver chips 22, 24 are off-the-shelf chips such as, for example, SED157As. Cell 12 remains passive and is provided to improve the contrast of the display.
An Electronic Interface Unit of the display 8 is operated under the control of an Electronic Control Unit (ECU). Appropriate drive voltage signals to the active cell electrode matrix are applied in response to "Build Display Request" signals provided by the Electronic Control Unit, the Build Display Request signals being input to the driver chips 22, 24 though respective connector wires 26, 27. When used in the aforementioned automotive application, the display 8 will typically be a high information density display, for example 386 x 64 pixels, and may be driven to display the demanded image using a multiplex addressing technique in a manner which would be familiar to a person skilled in the art.
In use, current is supplied to the heating element 14 of the DSTN device through an H-bridge circuit (not shown) by means of a first connection 16 (as shown in Figure 2) and a second connection through the second connector 26. The use of an H-bridge circuit ensures minimal DC offset is applied to the heating element 14, which may otherwise degrade the performance of the liquid crystal device. The heating element 14 is switched on and off by applying a ramped PWM drive voltage through the H-bridge circuit. Ramping of the PWM drive voltage to the heating element 14 is advantageous in that large currents are not rapidly drawn from the voltage source (for example, the engine battery) which may otherwise effect the DSTN drive voltages derived from the same voltage source. Typically, the power "ON" ramp for the heating element 14 from zero to maximum current takes 1.6 seconds and the power "OFF" ramp takes 3.2 seconds.
Figure 3 illustrates, in block schematic form, an SED157A LCD driver chip referred to above, hereafter termed "IC 22", suitable for use with the method of the invention. This type of chip, together with others of similar type, are well known in the art and are available as "off the shelf' packages. The operation of such the IC 22 will therefore be well understood by those familiar with this field of technology. Only those parts of the IC 22 that are important for the understanding (and not necessarily the operation) of the invention will be described in detail.
The IC 22 comprises a first data storage device, in the form of a RAM 32, which is arranged to store data to be displayed by the LCD device. The RAM 32 has a capacity of 16,640 bits, being divided into 65 rows and 256 columns, each bit effectively corresponding to a respective pixel in the associated display (not shown in Figure 3). For each pixel in the display, a bit value of 1 in the RAM 32 generally causes the pixel to illuminate, whilst a bit value of 0 causes the pixel not to illuminate. Desired bits can be accessed by specifying row and column addresses in the RAM 32.
The data to be displayed by the LCD device 8 ("display data") is generated by the Electronic Control Unit and applied to the IC 22 in the form of the Build Display Request signals described above. The Build Display Request signals are applied to the IC 22 via an MPU (SPI bus) interface unit 34 from which they are transmitted to the RAM 32. The display data is applied by the RAM 32 to a second data storage device in the form of a buffer or latch circuit 36 which is arranged to store the display data temporarily.
The display data is applied by the latch circuit 36 to driver means in the form of a first driver circuit 38, the transmission of the display data to the first driver circuit being achieved in a conventional manner.
A display timing generator circuit (DTGC) 40 generates timing signals based on a clock signal from the associated LCD display and applies these to the RAM 32 and the latch circuit 36. The DTGC controls the transmission of the display data from the RAM 32 to the latch circuit 36 and from the latch circuit 36 to the driver circuit 38 by synchronising to the clock signal from the display. This control function would be well understood by a person skilled in this art.
Figure 4 shows method steps of a main program control loop L1 for controlling the liquid crystal device. At the onset of the main program control loop L1, a check is made as to whether a Build Display Request command signal has been generated by the Electronic Control Unit (step 130), i.e. whether the display buffer needs to be rebuilt. If there is no Build Display Request, the main control loop exits and is reentered again after a predetermined period (typically, for example, 160 ms).
If, at step 130, a Build Display Request has been generated by the Electronic Control Unit, then an image of the required display is created in the memory of the Electronic Control Unit and the appropriate display data for this image is applied to the RAM 32 via the SPI bus interface 34. The display data is then copied to the latch circuit 36 (step 132) under control of the DTGC 40. The display data is then applied by the latch circuit 36 to the first driver circuit 38 at step 134 and the demanded drive voltage signals are applied to the electrode matrix of the active cell 10 to display the demanded image, as described above.
In a step not shown in Figure 4, the image is refreshed a number of times each second (referred to as the 'frame refresh frequency') in a generally conventional manner. A clock signal, typically at 4550 Hz, is applied to the DTGC 40 and, at each pulse of the clock signal, the DTGC instructs the RAM 32 to apply the display data from one line of the RAM to the latch circuit 36. The display data for all 65 lines of the RAM 32 is thus reapplied or "clocked" to the latch circuit every 4550/65 seconds, i.e. at 70 Hz.
Whilst the display data in the RAM 32 is maintained throughout the main control loop L1, the display data in the latch circuit 36 is thus refreshed at a refresh rate of 70 Hz to ensure that data or display fade does not occur.
Figure 5 illustrates method steps of a modified control loop according to the invention for controlling the liquid crystal display device 8. The method is similar to that illustrated in Figure 4 but has an additional sub-loop L2 contained within the main control loop L1. During execution of the main control loop L1, the Electronic Control Unit generates a REQUEST_UNLATCH flag on a regular, timed basis, for example approximately every 640 ms. The main control loop L1 thus checks at every cycle whether the REQUEST_UNLATCH flag has been set (step 126).
If, on checking, the REQUEST UNLATCH flag has not been set by the Electronic Control Unit, then the control loop L1 continues as normal, checking whether the Build Display Request flag has been set at step 130.
On the other hand if, on checking, the REQUEST UNLATCH flag has been set by the Electronic Control Unit, then a re-initialise sequence is implemented. In the re-initialise sequence, the Electronic Control Unit generates reset command data and applies this, via the interface unit 34 to the latch circuit 36 (step 128). The reset command data unlatches the display data latch circuit 36 such that the latch circuit is reset. The display data RAM 32 will be copied via the display data latch circuit 36 to the display driver 38 in the normal manner, which prevents the display "blinking" under normal operating conditions. If the display is latched by an ESD, there will be an apparent blink or flicker when the latch circuit 36 is reset and the display is refreshed.
The reset command data is not applied to the RAM 32 so that the display data stored therein is unaffected by the re-initialise sequence. When the re-initialise sequence is completed, the sub loop L2 is exited and the control sequence returns to the main loop L1, next checking if a Build Display Request has been made at step 130.
If such a Build Display Request has been generated by the Electronic Control Unit, the new display data is applied to the RAM 32 via the interface 34 and then applied to the latch circuit 36 (step 132) as described above. However, if no Build Display Request has been generated, the original display data held in the RAM 32 is applied to the latch circuit 36 as described above. The refreshing of the latch circuit is then continued in the manner described above.
It will be understood that the refreshing of the data in the latch circuit 36 is carried out on a control loop which is independent of the main control loop L1 or the re-initialise sub loop L2. It will often be the case, therefore, that the REQUEST_UNLATCH flag will be checked at step 126 whilst a refresh operation is in progress. In the event that the REQUEST_UNLATCH flag is generated whilst a refresh operation is in progress, the refresh operation is preferably continued and completed before the re-initialise sequence is initiated.
The frequency of the re-initialise sequence can be selected as required and may occur automatically as described above or at the request of the user. For example, the reinitialise sequence may be synchronised with the refresh rate of the LCD device 8 or may be set to occur after a preset number of refresh operations. Alternatively, the re-initialise sequence may be entered automatically at step 134 such that it occurs whenever new data is applied to the display driver.
It will be appreciated that the present invention provides a simple and effective method for reducing the effect of unwanted ESD of an LCD display. The method is software controlled and thus requires no additional components to the display. The method eliminates the need for mechanical solutions to the problem of ESD which significantly reduces costs and improves aesthetics and performance of the LCD device.
In a further preferred embodiment, the control method for the LCD may include the step of applying a cold kick sub-routine to increase the response time of the LCD at relatively low temperatures (the response time being that time following application of a drive voltage for the liquid crystal material to switch state so as to display the demanded image). The cold kick sub-routine is described in the Applicant's co-pending British patent application (GB0121663.9), and involves applying a negative bias voltage across the liquid crystal material for a period of time dependent upon the temperature of the material.
Having described particular preferred embodiments of the present invention, it is to be appreciated that the embodiments in question are exemplary only and that variations and modifications such as will occur to those possessed of the appropriate knowledge and skills may be made without departure from the scope of the invention as set forth in the appended claims.

Claims

A method of controlling a liquid crystal display device (8) having data storage means (32,36) for storing data to be displayed by said device (8) and display means for displaying said data, the method comprising the steps of:

(a) generating (130) first data to be displayed by said device (8),

(b) applying (132) said first data to said data storage means (32,36),

(c) applying (134) said first data in said data storage device (32,36) to said display means for displaying thereby, and

(d) at a predetermined time, generating and applying (128) reset command data to said data storage means (32,36).
A method as claimed in claim 1, wherein step (d) includes the step of automatically generating and applying the reset command data at a predetermined reset frequency.
A method as claimed in claim 2, wherein the step of automatically generating and applying reset command data occurs under the control of a control unit or ECU.
A method as claimed in claim 2, wherein step (d) includes the step of generating and applying the reset command data in response to a manual input from a user.
A method as claimed in any preceding claim, wherein the data storage means includes a first data storage device (32) and a second data storage device (36).
A method as claimed in claim 5, wherein step (b) includes the step of:

(b) applying said first data to said first data storage device (32), and step (c) includes the steps of:

(c-i) applying said first data from said first data storage device (32) to said second data storage device (36); and

(c-ii) applying said first data from said second data storage device (36) to said display means for displaying thereby.
A method as claimed in claim 5 or claim 6, wherein the liquid crystal display device (8) includes driver means (38) for receiving said first data from said second data storage device (36) and applying said first data to said display means.
A method as claimed in claim 7, wherein step (c-ii) comprises the steps of:

(c-ii-I) applying said first data from said second data storage device (36) to said driver means (38); and

(c-ii-II) applying said first data from said driver means (38) to said display means for displaying thereby.
A method as claimed in any preceding claim, further including the step of:

(e) performing a frame refresh operation by repeating steps (c-i) to (c-ii-II) at a frame refresh frequency.
A method as claimed in any of claims 5 to 9, wherein, at step (d), the reset command data is applied to the second data storage device (36).
A method as claimed in any of claims 5 to 10, wherein the first data storage device (32) comprises a Random Access Memory (RAM) or the like.
A method as claimed in any of claims 5 to 11, wherein the second data storage device (36) comprises a buffer, latch circuit or the like.
A method as claimed in any preceding claim, wherein the method includes the step of applying said first data to a driver chip (22) whereby said driver chip applies said first data to said display means.
A method as claimed in any preceding claim, wherein the method includes the step of applying said first data to the display means at a reset frequency in synchronisation with a frame refresh frequency, or alternatively following a predetermined number of frame refresh operations.