EP1275045A4 - Apparatus and method for maintaining high snoop traffic throughput and preventing cache data eviction during an atomic operation - Google Patents

Apparatus and method for maintaining high snoop traffic throughput and preventing cache data eviction during an atomic operation

Info

Publication number
EP1275045A4
EP1275045A4 EP01908995A EP01908995A EP1275045A4 EP 1275045 A4 EP1275045 A4 EP 1275045A4 EP 01908995 A EP01908995 A EP 01908995A EP 01908995 A EP01908995 A EP 01908995A EP 1275045 A4 EP1275045 A4 EP 1275045A4
Authority
EP
European Patent Office
Prior art keywords
cache data
maintaining high
atomic operation
traffic throughput
data eviction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01908995A
Other languages
German (de)
French (fr)
Other versions
EP1275045A2 (en
Inventor
Anuradha N Moudgal
Belliappa M Kuttanna
Allan Tzeng
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/513,033 external-priority patent/US6347360B1/en
Priority claimed from US09/513,034 external-priority patent/US6389517B1/en
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of EP1275045A2 publication Critical patent/EP1275045A2/en
Publication of EP1275045A4 publication Critical patent/EP1275045A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
EP01908995A 2000-02-25 2001-02-09 Apparatus and method for maintaining high snoop traffic throughput and preventing cache data eviction during an atomic operation Withdrawn EP1275045A4 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US513033 2000-02-25
US513034 2000-02-25
US09/513,033 US6347360B1 (en) 2000-02-25 2000-02-25 Apparatus and method for preventing cache data eviction during an atomic operation
US09/513,034 US6389517B1 (en) 2000-02-25 2000-02-25 Maintaining snoop traffic throughput in presence of an atomic operation a first port for a first queue tracks cache requests and a second port for a second queue snoops that have yet to be filtered
PCT/US2001/004147 WO2001063240A2 (en) 2000-02-25 2001-02-09 Maintaining high snoop traffic throughput and preventing cache data eviction during an atomic operation

Publications (2)

Publication Number Publication Date
EP1275045A2 EP1275045A2 (en) 2003-01-15
EP1275045A4 true EP1275045A4 (en) 2005-12-21

Family

ID=27057731

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01908995A Withdrawn EP1275045A4 (en) 2000-02-25 2001-02-09 Apparatus and method for maintaining high snoop traffic throughput and preventing cache data eviction during an atomic operation

Country Status (4)

Country Link
EP (1) EP1275045A4 (en)
JP (1) JP2003524248A (en)
AU (1) AU2001236793A1 (en)
WO (1) WO2001063240A2 (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006155080A (en) * 2004-11-26 2006-06-15 Fujitsu Ltd Memory controller and memory control method
EP2862062B1 (en) 2012-06-15 2024-03-06 Intel Corporation A virtual load store queue having a dynamic dispatch window with a distributed structure
CN104583939B (en) 2012-06-15 2018-02-23 英特尔公司 System and method for selection instruction
CN104823168B (en) 2012-06-15 2018-11-09 英特尔公司 The method and system restored in prediction/mistake is omitted in predictive forwarding caused by for realizing from being resequenced by load store and optimizing
KR101996462B1 (en) 2012-06-15 2019-07-04 인텔 코포레이션 A disambiguation-free out of order load store queue
EP2862069A4 (en) 2012-06-15 2016-12-28 Soft Machines Inc An instruction definition to implement load store reordering and optimization
CN107748673B (en) 2012-06-15 2022-03-25 英特尔公司 Processor and system including virtual load store queue
CN104583957B (en) 2012-06-15 2018-08-10 英特尔公司 With the speculative instructions sequence without the rearrangement for disambiguating out of order load store queue
GB2516092A (en) * 2013-07-11 2015-01-14 Ibm Method and system for implementing a bit array in a cache line
US9471323B2 (en) * 2013-10-03 2016-10-18 Intel Corporation System and method of using an atomic data buffer to bypass a memory location
JP6179369B2 (en) * 2013-11-22 2017-08-16 富士通株式会社 Arithmetic processing device and control method of arithmetic processing device
FR3048526B1 (en) 2016-03-07 2023-01-06 Kalray ATOMIC INSTRUCTION LIMITED IN RANGE AT AN INTERMEDIATE CACHE LEVEL
GB2554442B (en) * 2016-09-28 2020-11-11 Advanced Risc Mach Ltd Apparatus and method for providing an atomic set of data accesses

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4783736A (en) * 1985-07-22 1988-11-08 Alliant Computer Systems Corporation Digital computer with multisection cache
US5765199A (en) * 1994-01-31 1998-06-09 Motorola, Inc. Data processor with alocate bit and method of operation
EP0889403A2 (en) * 1997-06-30 1999-01-07 Sun Microsystems, Inc. A snoop filter for use in multiprocessor computer systems

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6049851A (en) * 1994-02-14 2000-04-11 Hewlett-Packard Company Method and apparatus for checking cache coherency in a computer architecture
US6098156A (en) * 1997-07-22 2000-08-01 International Business Machines Corporation Method and system for rapid line ownership transfer for multiprocessor updates
US6145059A (en) * 1998-02-17 2000-11-07 International Business Machines Corporation Cache coherency protocols with posted operations and tagged coherency states

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4783736A (en) * 1985-07-22 1988-11-08 Alliant Computer Systems Corporation Digital computer with multisection cache
US5765199A (en) * 1994-01-31 1998-06-09 Motorola, Inc. Data processor with alocate bit and method of operation
EP0889403A2 (en) * 1997-06-30 1999-01-07 Sun Microsystems, Inc. A snoop filter for use in multiprocessor computer systems

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO0163240A3 *

Also Published As

Publication number Publication date
AU2001236793A1 (en) 2001-09-03
EP1275045A2 (en) 2003-01-15
WO2001063240A2 (en) 2001-08-30
JP2003524248A (en) 2003-08-12
WO2001063240A3 (en) 2002-01-17

Similar Documents

Publication Publication Date Title
GB2374175B (en) Methods and apparatus for accessing shared data
AU2003270764A8 (en) Apparatus and method for proxy cache
EP1275045A4 (en) Apparatus and method for maintaining high snoop traffic throughput and preventing cache data eviction during an atomic operation
IL155217A0 (en) Method and apparatus for data processing
GB2345993B (en) System and method for hierarchical caching and cache replacement
GB0229892D0 (en) Method and apparatus for caching documents
HUP0103782A3 (en) Method and apparatus for accessing computer data
GB0006711D0 (en) Method and apparatus for generating profile data
SG101954A1 (en) Exposure method, exposure apparatus, method for producing exposure apparatus, and method for producing device
AU4355801A (en) Method and apparatus for qualitative spatiotemporal data processing
GB2363027B (en) Data processing apparatus, image processing apparatus, and method therefor
SG101453A1 (en) Exposure apparatus, substrate processing unit and lithographic system, and device manufacturing method
GB2380304B (en) Method and apparatus for reducing heap size through adaptive object representation
SG107559A1 (en) Exposure method, exposure apparatus and device producing method
GB2343029B (en) Method and apparatus for performing cache segment flush and cache segment invalidation operations
PL331475A1 (en) Method of removing data from a cache of data processing system featurated by multiple level cathe hierarchy, cathe hierachising device therefor and data prpcessing system employing that method
GB0010648D0 (en) Methods,apparatus and system for caching data
GB2377298B (en) Method for controlling cache system comprising direct-mapped cache and fully-associative buffer
HK1045388A1 (en) Method and apparatus for pre-caching data in audiomemory
GB0222980D0 (en) Method and apparatus for encrypting data
AU4832099A (en) A method and apparatus for performing cache accesses
SG108821A1 (en) Method for evaluating lithography system, method for adjusting substrate-processing apparatus, lithography system, and exposure apparatus
GB2380347B (en) Method and apparatus for modifying page data
GB2381172B (en) Method and apparatus for encrypting data
GB2381173B (en) Method and apparatus for encrypting data

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20020913

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

RIC1 Information provided on ipc code assigned before grant

Ipc: 7G 06F 12/08 A

A4 Supplementary search report drawn up and despatched

Effective date: 20051104

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20050901