EP1271315A3 - Ausführungswarteschlangenverwaltung - Google Patents

Ausführungswarteschlangenverwaltung Download PDF

Info

Publication number
EP1271315A3
EP1271315A3 EP02010606A EP02010606A EP1271315A3 EP 1271315 A3 EP1271315 A3 EP 1271315A3 EP 02010606 A EP02010606 A EP 02010606A EP 02010606 A EP02010606 A EP 02010606A EP 1271315 A3 EP1271315 A3 EP 1271315A3
Authority
EP
European Patent Office
Prior art keywords
threads
run queue
queue management
deterministic
various implementations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP02010606A
Other languages
English (en)
French (fr)
Other versions
EP1271315B1 (de
EP1271315A2 (de
Inventor
Bor-Ming Hsieh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsoft Technology Licensing LLC
Original Assignee
Microsoft Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corp filed Critical Microsoft Corp
Publication of EP1271315A2 publication Critical patent/EP1271315A2/de
Publication of EP1271315A3 publication Critical patent/EP1271315A3/de
Application granted granted Critical
Publication of EP1271315B1 publication Critical patent/EP1271315B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/06—Arrangements for sorting, selecting, merging, or comparing data on individual record carriers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
    • G06F2205/064—Linked list, i.e. structure using pointers, e.g. allowing non-contiguous address segments in one logical buffer or dynamic buffer space allocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Advance Control (AREA)
  • Debugging And Monitoring (AREA)
EP02010606.8A 2001-06-18 2002-05-10 Ausführungswarteschlangenverwaltung Expired - Lifetime EP1271315B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/884,009 US7302684B2 (en) 2001-06-18 2001-06-18 Systems and methods for managing a run queue
US884009 2001-06-18

Publications (3)

Publication Number Publication Date
EP1271315A2 EP1271315A2 (de) 2003-01-02
EP1271315A3 true EP1271315A3 (de) 2006-05-10
EP1271315B1 EP1271315B1 (de) 2018-06-20

Family

ID=25383785

Family Applications (1)

Application Number Title Priority Date Filing Date
EP02010606.8A Expired - Lifetime EP1271315B1 (de) 2001-06-18 2002-05-10 Ausführungswarteschlangenverwaltung

Country Status (3)

Country Link
US (1) US7302684B2 (de)
EP (1) EP1271315B1 (de)
JP (1) JP3987384B2 (de)

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US8195922B2 (en) * 2005-03-18 2012-06-05 Marvell World Trade, Ltd. System for dynamically allocating processing time to multiple threads
US20060212853A1 (en) * 2005-03-18 2006-09-21 Marvell World Trade Ltd. Real-time control apparatus having a multi-thread processor
US8745627B2 (en) * 2005-06-27 2014-06-03 Qualcomm Incorporated System and method of controlling power in a multi-threaded processor
US7552439B2 (en) * 2006-03-28 2009-06-23 Honeywell International Inc. System and method to allow non-deterministic execution in a process control system
US7904704B2 (en) * 2006-08-14 2011-03-08 Marvell World Trade Ltd. Instruction dispatching method and apparatus
US8032737B2 (en) * 2006-08-14 2011-10-04 Marvell World Trade Ltd. Methods and apparatus for handling switching among threads within a multithread processor
US8127080B2 (en) 2008-02-01 2012-02-28 International Business Machines Corporation Wake-and-go mechanism with system address bus transaction master
US8386822B2 (en) 2008-02-01 2013-02-26 International Business Machines Corporation Wake-and-go mechanism with data monitoring
US8640141B2 (en) 2008-02-01 2014-01-28 International Business Machines Corporation Wake-and-go mechanism with hardware private array
US8612977B2 (en) 2008-02-01 2013-12-17 International Business Machines Corporation Wake-and-go mechanism with software save of thread state
US8250396B2 (en) 2008-02-01 2012-08-21 International Business Machines Corporation Hardware wake-and-go mechanism for a data processing system
US8145849B2 (en) 2008-02-01 2012-03-27 International Business Machines Corporation Wake-and-go mechanism with system bus response
US8788795B2 (en) 2008-02-01 2014-07-22 International Business Machines Corporation Programming idiom accelerator to examine pre-fetched instruction streams for multiple processors
US8516484B2 (en) 2008-02-01 2013-08-20 International Business Machines Corporation Wake-and-go mechanism for a data processing system
US8732683B2 (en) 2008-02-01 2014-05-20 International Business Machines Corporation Compiler providing idiom to idiom accelerator
US8452947B2 (en) 2008-02-01 2013-05-28 International Business Machines Corporation Hardware wake-and-go mechanism and content addressable memory with instruction pre-fetch look-ahead to detect programming idioms
US8316218B2 (en) 2008-02-01 2012-11-20 International Business Machines Corporation Look-ahead wake-and-go engine with speculative execution
US8015379B2 (en) 2008-02-01 2011-09-06 International Business Machines Corporation Wake-and-go mechanism with exclusive system bus response
US8225120B2 (en) 2008-02-01 2012-07-17 International Business Machines Corporation Wake-and-go mechanism with data exclusivity
US8341635B2 (en) 2008-02-01 2012-12-25 International Business Machines Corporation Hardware wake-and-go mechanism with look-ahead polling
US8725992B2 (en) 2008-02-01 2014-05-13 International Business Machines Corporation Programming language exposing idiom calls to a programming idiom accelerator
US8312458B2 (en) 2008-02-01 2012-11-13 International Business Machines Corporation Central repository for wake-and-go mechanism
US8171476B2 (en) 2008-02-01 2012-05-01 International Business Machines Corporation Wake-and-go mechanism with prioritization of threads
US8880853B2 (en) 2008-02-01 2014-11-04 International Business Machines Corporation CAM-based wake-and-go snooping engine for waking a thread put to sleep for spinning on a target address lock
US8230201B2 (en) 2009-04-16 2012-07-24 International Business Machines Corporation Migrating sleeping and waking threads between wake-and-go mechanisms in a multiple processor data processing system
US8082315B2 (en) 2009-04-16 2011-12-20 International Business Machines Corporation Programming idiom accelerator for remote update
US8145723B2 (en) 2009-04-16 2012-03-27 International Business Machines Corporation Complex remote update programming idiom accelerator
US8886919B2 (en) 2009-04-16 2014-11-11 International Business Machines Corporation Remote update programming idiom accelerator with allocated processor resources
US8239867B2 (en) * 2009-06-03 2012-08-07 Apple Inc. Method and apparatus for implementing atomic FIFO
US9459941B2 (en) * 2009-07-28 2016-10-04 Telefonaktiebolaget Lm Ericsson (Publ) Apparatus and method for synchronizing the processing of events associated with application sessions in a telecommunications network
US8566491B2 (en) 2011-01-31 2013-10-22 Qualcomm Incorporated System and method for improving throughput of data transfers using a shared non-deterministic bus
US9225660B2 (en) * 2011-12-21 2015-12-29 Arm Finland Oy Method, apparatus and system for addressing resources
US9298504B1 (en) * 2012-06-11 2016-03-29 Amazon Technologies, Inc. Systems, devices, and techniques for preempting and reassigning tasks within a multiprocessor system
US9274832B2 (en) * 2013-02-07 2016-03-01 Htc Corporation Method and electronic device for thread scheduling
US20150074332A1 (en) * 2013-09-10 2015-03-12 Kabushiki Kaisha Toshiba Memory controller and memory system
US9710054B2 (en) 2015-02-28 2017-07-18 Intel Corporation Programmable power management agent
US10489220B2 (en) * 2017-01-26 2019-11-26 Microsoft Technology Licensing, Llc Priority based scheduling

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VUILLEMIN J: "A data structure for manipulating priority queues", COMMUNICATIONS OF THE ACM USA, vol. 21, no. 4, April 1978 (1978-04-01), pages 309 - 315, XP002369252, ISSN: 0001-0782 *

Also Published As

Publication number Publication date
JP2003044296A (ja) 2003-02-14
EP1271315B1 (de) 2018-06-20
EP1271315A2 (de) 2003-01-02
US7302684B2 (en) 2007-11-27
JP3987384B2 (ja) 2007-10-10
US20020194249A1 (en) 2002-12-19

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