EP1258024B1

EP1258024B1 - Plasma display panel

Info

Publication number: EP1258024B1
Application number: EP00971869A
Authority: EP
Inventors: Guang Sup Cho; Eun Ha Choi; June Dong Kim; Young Dae Ju; Jung Gwan Han
Original assignee: Orion PDP Co Ltd
Current assignee: Orion PDP Co Ltd
Priority date: 1999-10-29
Filing date: 2000-10-27
Publication date: 2010-07-21
Anticipated expiration: 2020-10-27
Also published as: EP1258024A1; EP1258024A4; KR20010039312A; DE60044729D1; JP3663416B2; CN1384971A; WO2001031675A1; JP2003513416A; CN1156872C; KR100651822B1

Description

BACKGROUND OF THE INVENTION

Field of the Invention

The present invention relates to a plasma display panel (PDP), and more particularly, to a PDP having an improved structure of a sustain electrode which is formed on an upper substrate of the PDP used in various flat panel display devices such as TV or monitors.

Discussion of the Related Art

Fig. 1 is a schematic view of a unit pixel formed on an upper substrate of a related art PDP.
Referring to Fig. 1, two transparent electrodes 1 are deposited on the upper substrate at regular intervals, and bus electrodes 2 for connection to a power source are deposited on both ends of the transparent electrode 1. A plasma is formed in a unit pixel in such a manner that a power source is supplied through the bus electrodes 2 to maintain discharge between the transparent electrodes 1 having regular intervals.
Figs. 2a and 2b illustrate a related art PDP.
As shown in Fig. 2a, horizontal transparent and bus electrodes 1 and 2 are formed on a transparent upper substrate 7. As shown in Fig. 2b, vertical signal electrodes 5 are formed on a lower substrate 6 at regular intervals, vertical sidewalls 4 are formed on the signal electrodes 5, and phosphors of R, G, and B are deposited between the sidewalls 4. Then, the upper substrate 7 is attached to the lower substrate 6.
In the related art PDP having the above electrode structure, the discharge and sustain electrodes are flush with each other and the quantity of the plasma is proportional to an electrode area.
Since an area of the electrode is limited due to a limited size of the unit pixel, the plasma generating quantity is also limited. The energy of the plasma is continuously lost through an outer wall and the like. The energy of the plasma is much required to maintain discharge.
If the plasma generating quantity is small, much more energy is required to maintain discharge. For this reason, energy efficiency of the PDP is reduced. Also, in the related art PDP having the above electrode structure, efficiency is reduced if the size of the unit pixel is small. In this case, it is difficult to obtain high picture quality.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to a PDP that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a PDP which improves discharge efficiency by reducing a discharge voltage and increasing a volume of a plasma.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the scheme particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided in accordance with the present invention a plasma display panel (PDP) provided with upper and lower substrates aligned in parallel at regular intervals, first and second electrodes formed on the upper substrate in one unit pixel, third electrodes formed on the lower substrate to correspond to the first and second electrodes, and bus lines which connect the first and second electrodes with adjacent first and second electrodes, the PDP comprises fence-type electrodes extended toward the lower substrate; characterised in that a sidewall is formed in a rectangular frame to divide the pixels on the upper substrate, and the fence-type electrodes are formed on the sidewall.
The invention is defined by the claims.
The prior art document JP 11 213904 A (LG ELECTRONICS INC) discloses a plasma display panel with fence-type electrodes formed on the sidewalls of channels. This geometry however suffers from a reduced efficiency.
The following does not form part of the invention but is added as additional information only: the PDP may comprise fence-type electrodes extended toward the lower substrate in a corner of an adjacent pixel of the first and second electrodes.
In one embodiment of the PDP according to the present invention, the fence-type electrodes are made of an opaque metal material. In another embodiment, the fence-type electrodes connected with the first and second electrodes are connected with the fence-type electrodes connected with the first and second electrodes of an adjacent pixel by a bus electrode formed on the sidewall. In another embodiment, the first and second electrodes and the fence-type electrodes are formed symmetrically in a diagonal direction within each unit pixel.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be described in detail with reference to the following drawings in which like reference numerals refer to like elements wherein:

Fig. 1 is a schematic view showing a unit pixel formed on an upper substrate of a related art PDP;
Fig. 2a is a schematic view showing an upper substrate of a related art PDP provided with an electrode of Fig. 1;
Fig. 2b is a schematic view of a lower substrate of a PDP corresponding to Fig. 2a;
Fig. 3 is a schematic view of an electrode of a unit pixel formed on an upper substrate of a PDP according to the first embodiment of the present invention;
Fig. 4 is a schematic view of an upper substrate of a PDP provided with an electrode of Fig. 3;
Fig. 5 is a schematic view of an upper substrate of a PDP according to the second embodiment of the present invention; and
Fig. 6 is a schematic view of an upper substrate of a PDP according to the third embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings.
Fig. 3 is a schematic view of an electrode of a unit pixel formed on an upper substrate of a PDP according to the first embodiment of the present invention.
A lower substrate of a PDP according to the present invention has the same structure as that of the related art PDP. Accordingly, the upper substrate of a PDP according to the present invention will be described below.
An electrode structure of one unit pixel is shown in Fig. 3. Referring to Fig. 3, the unit pixel includes two portions, wherein a left side portion is defined as a first electrode and a right side portion is defined as a second electrode.
A pair of transparent electrodes 1 are deposited on the bottom surface of the unit pixel at regular intervals. An opaque metal fence-type electrode 3 is partially formed in a corner portion of the unit pixel to be partially projected from a corner portion of an adjacent pixel to the lower substrate. A bus electrode 2 is connected to the fence-type electrode 3.
In other words, a discharge sustain electrode structure of a fence type having two portions is formed. In the present invention, a pair of the transparent electrodes 1 are referred to as a discharge sustain electrode.
Fig. 4 is a schematic view of the upper substrate of a PDP provided with the electrode of Fig. 3. The electrode of the upper substrate of Fig. 4 is orthogonal to the electrode(ex, signal electrode) of the lower substrate(not shown). In Fig. 4, an electrode structure of 6 unit pixels is exemplified.
A reference numeral 1 denotes a transparent electrode, a reference numeral 2 denotes a bus electrode, a reference numeral 3 denotes a fence-type electrode, a reference numeral 7 denotes an upper substrate, a reference numeral 8 denotes a horizontal sidewall, and a reference numeral 9 denotes a vertical sidewall.
Lattice shaped (matrix shaped) sidewalls 8 and 9 are formed in a rectangular frame on the upper substrate 7 in horizontal and vertical directions. Thus, an individual discharge space is formed for a unit pixel.
The lattice shaped sidewalls 8 and 9 improve contrast. A pair of the transparent electrodes 1 are deposited on a bottom surface of the upper substrate 7 at regular intervals for a unit pixel in a horizontal direction. An opaque metal fence-type electrode 3 is deposited inside the sidewalls 8 and 9, so as to increase the plasma generating quantity of a corresponding pixel during individual discharge.
In Fig. 4, the bus electrode 2 is deposited on the horizontal sidewall 8 so that it is to be connected with the transparent electrodes 1 using the fence-type electrode 3 as a medium. The heights of the sidewalls 8 and 9 are lower than the height of a sidewall of the lower substrate.
Fig. 5 is a schematic view of an upper substrate of a PDP according to the second embodiment of the present invention. Referring to Fig. 5, transparent electrodes are aligned along a fence-type electrode to extend a discharge path of a sustain electrode, thereby improving discharge density.
In Fig. 5, an electrode structure of 6 unit pixels is exemplified. A reference numeral 1 denotes a transparent electrode, a reference numeral 2 denotes a bus electrode, a reference numeral 3 denotes a fence-type electrode, a reference numeral 7 denotes an upper glass substrate, a reference numeral 8 denotes a horizontal sidewall, and a reference numeral 9 denotes a vertical sidewall.
A pair of the transparent electrodes 1 are longitudinally formed in a vertical direction at regular intervals in one unit pixel. Each of the transparent electrodes 1 is slanted toward either upper or lower directions. An opaque metal fence-type electrode 3 is deposited inside the sidewalls 8 and 9 surrounding the outer wall of the transparent electrodes 1 so as to increase the plasma generating quantity of a corresponding pixel during discharge of an individual pixel.
The fence-type electrodes 3 and the transparent electrodes 1 per unit pixel are symmetrically formed in a diagonal direction.
The bus electrode 2 is deposited on the horizontal sidewall 8 to be connected with the transparent electrode 1 using the fence-type electrode 3 as a medium. The heights of the sidewalls 8 and 9 are lower than that of a sidewall of the lower substrate.
Fig. 6 is a schematic view of an upper substrate of a PDP according to the third embodiment of the present invention. Referring to Fig. 6, a fence-type electrode type upper substrate having a long corner electrode structure is formed orthogonally to the electrodes of Fig. 3. In Fig. 6, an electrode structure of 6 unit pixels is exemplified. A reference numeral 1 denotes a transparent electrode, a reference numeral 2 denotes a bus electrode, a reference numeral 3 denotes a fence-type electrode, a reference numeral 7 denotes an upper glass substrate, a reference numeral 8 denotes a horizontal sidewall, and a reference numeral 9 denotes a vertical sidewall.
In Fig. 6, the bus electrode 2 is formed in the same direction (vertical direction) as that of a sidewall of a lower substrate (not shown), so that a pair of discharge sustain electrodes respectively correspond to respective phosphors. A signal electrode of the lower electrode is formed in a horizontal direction perpendicular to the sidewall of the lower substrate.
A pair of the transparent electrodes 1 are deposited on the upper glass substrate 7 in a vertical direction at regular intervals in a unit pixel. The vertical sidewall 9 of the upper substrate is formed in the same direction as a vertical sidewall 4 (see Fig. 2) of the lower substrate. The horizontal sidewall 8 is additionally formed.
An opaque metal fence-type electrode 3 is deposited inside the sidewalls 8 and 9 of a rectangular frame so as to increase the plasma generating quantity of a corresponding pixel during discharge of an individual pixel.
The bus electrode 2 is deposited on the horizontal sidewall 8 to be connected with a power source in the vertical direction. The heights of the sidewalls 8 and 9 are lower than the height of a sidewall of the lower substrate.
Consequently, in Figs. 5 and 6, the length of a corner portion of the transparent electrode 1 is longer than that of a corner portion of the transparent electrode in the related art PDP.
In the aforementioned electrode structure of Fig. 6, a plasma is generated by discharge between two transparent electrodes 1 having a long corner portion between the sidewalls. Also, an electrode structure with high efficiency is provided, in which an area of the electrode is maximized and the plasma generating quantity is increased between the transparent electrodes having a long corner portion.
In the aforementioned PDP according to the first to third embodiments of the present invention, the opaque metal fence-type electrode 3 is deposited on the sidewalls 8 and 9 of the upper substrate to utilize the area of the electrode 8 to the utmost and thus reduce the discharge voltage. The fence-type electrode 3 minimizes loss of the plasma generated during discharge in an individual unit pixel to increase the plasma generating quantity.
As the electrode area is widened, a plasma formation space is increased and plasma energy loss is decreased, thereby performing stabilized space discharge. Moreover, interaction between adjacent pixels is prevented by individualizing the unit pixels by the side wall. The size of the pixels is decreased to obtain a high quality screen.
As aforementioned, the PDP according to the present invention has the following advantages.
Since the electrode of the upper substrate has a fence-type electrode structure, the discharge voltage is reduced and the volume of the plasma is increased, thereby improving discharge efficiency.
The foregoing embodiments are merely exemplary and are not to be construed as limiting the present invention. The present teachings can be readily applied to other types of apparatuses. The description of the present invention is intended to be illustrative, and not to limit the scope of the claims. Many alternatives, modifications, and variations will be apparent to those skilled in the art.

Claims

A plasma display panel (PDP) provided with upper and lower substrates aligned in parallel at regular intervals, first and second electrodes (1) formed on the upper substrate (7) on one unit pixel, third electrodes (5) formed on the lower substrate to correspond to the first and second electrodes (1), and bus lines (2) which connect the first and second electrodes (1) with adjacent first and second electrodes, the PDP comprises fence-type electrodes (3)extended toward the lower substrate;
characterised in that a sidewall (8)(9) is formed in a rectangular frame to divide the pixels on the upper substrate (7), and the fence-type electrodes (3) are formed on the sidewall (8)(9).
The PDP of claim 1, wherein the fence-type electrodes (3) are made of an opaque metal material.
The PDP of claim 1, wherein the fence-type electrodes (3) connected with the first and second electrodes (1) are connected with the fence-type electrodes connected with the first and second electrodes of an adjacent pixel by a bus electrode (2) formed on the sidewall (8)(9).
The PDP of claim 1, wherein the first and second electrodes (1) and the fence-type electrodes (3) are formed symmetrically in a diagonal direction within each unit pixel.