EP1238500A1 - Method and system for monitoring data transmission using differential transmission methods with a direct voltage portion - Google Patents
Method and system for monitoring data transmission using differential transmission methods with a direct voltage portionInfo
- Publication number
- EP1238500A1 EP1238500A1 EP00990518A EP00990518A EP1238500A1 EP 1238500 A1 EP1238500 A1 EP 1238500A1 EP 00990518 A EP00990518 A EP 00990518A EP 00990518 A EP00990518 A EP 00990518A EP 1238500 A1 EP1238500 A1 EP 1238500A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- detector
- receiver
- transmitter
- circuit arrangement
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
- H04L25/085—Arrangements for reducing interference in line transmission systems, e.g. by differential transmission
Definitions
- the invention relates to a method for monitoring the transmission of analog or digital signals by means of differential transmission methods with a DC voltage component and a circuit arrangement for carrying out the method.
- the analog or digital signal to be transmitted controls two outputs A and AN of the transmitter working in opposite directions.
- output A acts as a current source
- output AN serves as a current sink and vice versa.
- the transmitter provides the current accordingly
- the transmitter also provides a DC voltage component Uc.
- this DC voltage component Uc is independent of the transmission and has a constant value that results in the axis of symmetry of the eye opening at the receiver input.
- the difference between the input voltages UE and UEN is formed in the receiver. This voltage difference corresponds to the value Ud across the resistor R.
- the difference is amplified and assigned to the logic states (0,1) after a threshold value decision.
- the output of the receiver generates the logic state (1) if the difference between the input voltages UE and UEN is positive, for example. If the difference is negative
- FIG. 1 shows a known circuit arrangement for carrying out a differential transmission method with a DC voltage component.
- a meaningful data transfer between modules is only possible if the transmitter and the receiver are in their active operating state.
- the transmitter either does not exist at all (e.g. a transmitter module was not used) or is de-energized (e.g. transmitter module was used but without supply voltage) or in a high-impedance state (e.g. the transmitter outputs are switched off) is.
- the receiver is provided with a hysteresis.
- the differential voltage formed in the receiver is fed to a threshold decision with this hysteresis.
- the receiver receives a bias voltage through a suitably selected current flow through the resistor R.
- the output of the receiver only remains in a stable state if the differential disturbance is less than the pre-set voltage.
- the bias voltage results in a differential voltage amount dependent on the data Ud
- the object of the invention is therefore to avoid the disadvantages described above and to minimize the effort required.
- the object is achieved in that the DC voltage component generated by the transmitter for the differential transmission is used on the receiver side for information about the operating state of the transmitter.
- the operating state of the transmitter is determined on the receiver side by means of a detector. If the transmitter is absent or inactive, the detector controls the output of the receiver so that a predetermined value is not exceeded or the receiver is switched off completely.
- the detector is connected symmetrically between the resistance which generates the voltage difference in the receiver and compares the direct voltage component Uc generated by the transmitter with a reference voltage Uref.
- the detector can be used as a differential amplifier with / without
- Threshold value deciders can be formed, for example the detector can consist of a further receiver for differential data transmission or of transistor circuits in the form of bipolar or field effect transistor circuits.
- an expanded detector can be connected to each transmission line, so that the input voltages of each transmission link can be compared and evaluated with a reference voltage of the detector, and the evaluation of the state of each line is supplied, for example, to an OR operation, the Output controls the receiver and / or other modules.
- the detector can be formed from two differential amplifiers with / without threshold value decision and their OR combination, e.g. the detector can consist of two further receivers for differential data transmission or of transistor circuits in the form of bipolar or field effect transistor circuits.
- the invention prevents high-frequency oscillation of the receiver and subsequent assemblies and prevents damage or destruction. Additional control lines, which provide information about the operating status of the transmitter, are not required.
- the invention can be implemented in the form of circuits or, if necessary, can e.g. in the case of retrofits, be connected to the receiver as external wiring.
- FIG. 1 An exemplary embodiment of the circuit arrangement according to the invention is shown in FIG.
- the data to be transmitted are fed via the input to two outputs A and AN of the transmitter working in opposite directions and control the same.
- the transmitter provides the current of the appropriate size and direction in order to generate the voltage Ud across the resistors R / 2.
- the transmitter provides a DC voltage component Uc which is independent and constant from the transmission and which results in the axis of symmetry of the eye opening at the receiver input.
- the difference between the input voltages UE and UEN is formed in the receiver, which corresponds to the total value across the resistors R / 2.
- the detector is connected between the equally dimensioned resistors R / 2 and symmetrically loads the existing transmission path and compares the voltage Uc with a reference voltage Uref and controls the receiver.
- the load ensures that a DC voltage component is only detected when the transmitter is in the active state.
- the differential voltage amount is
- the reference voltage should be selected so that disturbances in the DC voltage component Uc do not lead to an interruption in the data transmission.
- the transmitter is not available or inactive, i.e. if it is switched off or high-impedance, the DC voltage component Uc falls below the reference voltage Uref.
- the receiver is controlled by the detector so that e.g. the receiver output outputs a defined value or switches off the receiver.
- the detector for example, as a differential amplifier with / without threshold value decider, for example as a further receiver for differential data transmission (see FIG. 3).
- Bipolar or field effect transistor circuits see Figure 4 WO 01/45337 ⁇ PCT / DEOO / 04403
- bipolar transistor circuit e.g. a "threshold decision" at approx. 0.7 V.
- an improvement in the sensitivity to interference with respect to disturbances in the DC voltage component Uc can be achieved if, as in FIG. 5, the voltage Uc_Ud / 2 of each individual transmission line is compared and evaluated with a reference voltage Uref.
- the evaluation of the condition of each individual line is e.g. an OR operation, the output of which is used to control the receiver and / or other modules.
- the extended detector shown in FIG. 6 detects active data transmission even with a DC voltage component Uc ⁇ 0 V (e.g. caused by interference) as long as Uc + Ud / 2 and superimposed interference exceed the reference voltage Uref on at least one line.
- a DC voltage component Uc ⁇ 0 V e.g. caused by interference
- the minimum reference voltage Uref must be selected so that interference on each individual line when the transmitter is absent or inactive is reliably suppressed by the detector.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Abstract
Description
Claims
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19959982A DE19959982C2 (en) | 1999-12-13 | 1999-12-13 | Method and arrangement for monitoring data transmission using differential transmission methods with a DC voltage component |
DE19959982 | 1999-12-13 | ||
PCT/DE2000/004403 WO2001045337A1 (en) | 1999-12-13 | 2000-12-11 | Method and system for monitoring data transmission using differential transmission methods with a direct voltage portion |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1238500A1 true EP1238500A1 (en) | 2002-09-11 |
Family
ID=7932424
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP00990518A Withdrawn EP1238500A1 (en) | 1999-12-13 | 2000-12-11 | Method and system for monitoring data transmission using differential transmission methods with a direct voltage portion |
Country Status (6)
Country | Link |
---|---|
US (1) | US20030056031A1 (en) |
EP (1) | EP1238500A1 (en) |
JP (1) | JP2003517773A (en) |
DE (1) | DE19959982C2 (en) |
TW (1) | TW561743B (en) |
WO (1) | WO2001045337A1 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1304842B1 (en) * | 2001-10-19 | 2008-05-14 | Texas Instruments Incorporated | Serial differential data link with automatic power down |
DE10237696B3 (en) * | 2002-08-15 | 2004-04-15 | Infineon Technologies Ag | Transmission fault detection method, for two-wire differential signal transmission line, continually monitoring average voltage of the two line signals to detect any sudden jumps |
JP2004140565A (en) * | 2002-10-17 | 2004-05-13 | Matsushita Electric Ind Co Ltd | Balanced transmitter |
JP3891185B2 (en) * | 2003-09-05 | 2007-03-14 | セイコーエプソン株式会社 | Receiver circuit, interface circuit, and electronic device |
JP2009272791A (en) * | 2008-05-02 | 2009-11-19 | Sony Corp | Transmitter, information transmission method, receiver, and information processing method |
JP5444797B2 (en) * | 2009-04-10 | 2014-03-19 | ソニー株式会社 | Transmission device, display device, and image display system |
JP5234374B2 (en) * | 2011-03-02 | 2013-07-10 | 日本電気株式会社 | Differential signal transmission circuit, disk array controller, and differential signal transmission cable |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5220211A (en) * | 1991-10-28 | 1993-06-15 | International Business Machines Corporation | High speed bus transceiver with fault tolerant design for hot pluggable applications |
DE4229175A1 (en) * | 1992-09-02 | 1994-03-03 | Bosch Gmbh Robert | Network interface |
US5485488A (en) * | 1994-03-29 | 1996-01-16 | Apple Computer, Inc. | Circuit and method for twisted pair current source driver |
US5828733A (en) * | 1995-04-03 | 1998-10-27 | Advanced Micro Devices, Inc. | Method and arrangement for increasing data transmisssion rate over telephone cable |
US6032209A (en) * | 1998-07-24 | 2000-02-29 | Storage Technology Corporation | Hot-swappable high speed point-to-point interface |
-
1999
- 1999-12-13 DE DE19959982A patent/DE19959982C2/en not_active Expired - Fee Related
-
2000
- 2000-12-11 EP EP00990518A patent/EP1238500A1/en not_active Withdrawn
- 2000-12-11 WO PCT/DE2000/004403 patent/WO2001045337A1/en not_active Application Discontinuation
- 2000-12-11 US US10/149,761 patent/US20030056031A1/en not_active Abandoned
- 2000-12-11 JP JP2001546105A patent/JP2003517773A/en not_active Withdrawn
- 2000-12-12 TW TW089126448A patent/TW561743B/en active
Non-Patent Citations (1)
Title |
---|
See references of WO0145337A1 * |
Also Published As
Publication number | Publication date |
---|---|
US20030056031A1 (en) | 2003-03-20 |
DE19959982A1 (en) | 2001-06-28 |
TW561743B (en) | 2003-11-11 |
DE19959982C2 (en) | 2001-10-04 |
JP2003517773A (en) | 2003-05-27 |
WO2001045337A1 (en) | 2001-06-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69938584T2 (en) | ADJUSTABLE DELAY LEVEL WITH A SELF-ADVANCED LOAD | |
DE102015204021B4 (en) | Dynamic current limiting circuit | |
DE1591223C3 (en) | Automatic test device for fast switching electronic circuits | |
DE102005020803B4 (en) | Circuit arrangement with an amplifier arrangement and an offset compensation arrangement | |
DE10213254A1 (en) | Load operating system and method therefor | |
EP0246662B1 (en) | Receiver for optical digital signals having various amplitudes | |
WO1996042159A1 (en) | System for the fail-safe transmission of data via a differential bus | |
DE102011083930A1 (en) | Signal transmission arrangement with a transformer and signal transmission method | |
EP1238500A1 (en) | Method and system for monitoring data transmission using differential transmission methods with a direct voltage portion | |
DE69428524T2 (en) | RECEIVER SIDE PULSE WIDTH ADAPTIVE EQUALIZER | |
EP1085705A2 (en) | Network with several nodes and at least one network hub | |
DE69128652T2 (en) | Control circuit | |
DE19523031A1 (en) | System for transmitting data over a differential bus | |
DE19925238B4 (en) | Edge control device for an electrical data transmission system | |
DE102006016356A1 (en) | Circuit arrangement for glitch-free or glitch-reduced signal transmission between voltage ranges | |
DE10250818B4 (en) | Data receiver and data reception method | |
DE69331872T2 (en) | Low power transmission device | |
EP0727897B1 (en) | Circuit for receiving a signal transmitted on a bus as voltage level variations | |
EP1068700B1 (en) | Signaling output stage for generating digital voltage signals on a bus system | |
EP1187330B1 (en) | Voltage comparator circuit for the envelope of an AC voltage and method of comparing | |
DE69902205T2 (en) | Circuit for recovering the DC component | |
DE69022265T2 (en) | Method and device for improving the release response of a laser diode in an optical transmission system. | |
DE19942688C2 (en) | Method of operating an electronic circuit and electronic circuit | |
DE19918512C1 (en) | Circuit arrangement with a reduction circuit for reducing longitudinal interference voltages on a two-wire line | |
EP1120660B1 (en) | Apparatus and method for evaluating offset voltages of digital signals |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20020522 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
|
RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: SIEBLER, FRANK Inventor name: DAUERER, JOERG Inventor name: STEIB, GERHARD |
|
RBV | Designated contracting states (corrected) |
Designated state(s): AT BE CH DE GB IE LI |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20040701 |