EP1212626A4 - Method for testing circuits - Google Patents

Method for testing circuits

Info

Publication number
EP1212626A4
EP1212626A4 EP00939316A EP00939316A EP1212626A4 EP 1212626 A4 EP1212626 A4 EP 1212626A4 EP 00939316 A EP00939316 A EP 00939316A EP 00939316 A EP00939316 A EP 00939316A EP 1212626 A4 EP1212626 A4 EP 1212626A4
Authority
EP
European Patent Office
Prior art keywords
testing circuits
testing
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP00939316A
Other languages
German (de)
French (fr)
Other versions
EP1212626A1 (en
Inventor
Pramodchandran N Variyam
Abhijit Chatterjee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Georgia Tech Research Institute
Georgia Tech Research Corp
Original Assignee
Georgia Tech Research Institute
Georgia Tech Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Georgia Tech Research Institute, Georgia Tech Research Corp filed Critical Georgia Tech Research Institute
Publication of EP1212626A1 publication Critical patent/EP1212626A1/en
Publication of EP1212626A4 publication Critical patent/EP1212626A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/01Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836Fault-finding or characterising
    • G01R31/2846Fault-finding or characterising using hard- or software simulation or using knowledge-based systems, e.g. expert systems, artificial intelligence or interactive algorithms
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/316Testing of analog circuits
    • G01R31/3163Functional testing

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Evolutionary Computation (AREA)
  • Medical Informatics (AREA)
  • Tests Of Electronic Circuits (AREA)
EP00939316A 1999-05-19 2000-05-19 Method for testing circuits Withdrawn EP1212626A4 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13480099P 1999-05-19 1999-05-19
US134800P 1999-05-19
PCT/US2000/013862 WO2000070358A1 (en) 1999-05-19 2000-05-19 Method for testing circuits

Publications (2)

Publication Number Publication Date
EP1212626A1 EP1212626A1 (en) 2002-06-12
EP1212626A4 true EP1212626A4 (en) 2006-05-24

Family

ID=22465073

Family Applications (1)

Application Number Title Priority Date Filing Date
EP00939316A Withdrawn EP1212626A4 (en) 1999-05-19 2000-05-19 Method for testing circuits

Country Status (3)

Country Link
EP (1) EP1212626A4 (en)
AU (1) AU5442000A (en)
WO (1) WO2000070358A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104237770B (en) * 2014-08-15 2016-11-23 电子科技大学 A kind of analog-circuit fault diagnosis method
CN104198922B (en) * 2014-08-15 2017-02-01 电子科技大学 Frequency selection method in early fault diagnosis of analog circuit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4044244A (en) * 1976-08-06 1977-08-23 International Business Machines Corporation Automatic tester for complex semiconductor components including combinations of logic, memory and analog devices and processes of testing thereof
US4168527A (en) * 1978-02-17 1979-09-18 Winkler Dean A Analog and digital circuit tester
US4647846A (en) * 1980-10-10 1987-03-03 Malkin Dov B Method and means for testing multi-nodal circuits
US5327437A (en) * 1991-11-25 1994-07-05 Hewlett-Packard Company Method for testing electronic assemblies in the presence of noise
US5819208A (en) * 1996-10-29 1998-10-06 Northern Telecom Limited Quantifying circuit performance
WO1998055880A1 (en) * 1997-06-02 1998-12-10 Opmaxx, Inc. Method for parallel analog and digital circuit fault simulation and test set specification

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4907230A (en) * 1988-02-29 1990-03-06 Rik Heller Apparatus and method for testing printed circuit boards and their components
US4935877A (en) * 1988-05-20 1990-06-19 Koza John R Non-linear genetic algorithms for solving problems
US5506852A (en) * 1994-03-17 1996-04-09 Nec Usa, Inc. Testing VLSI circuits for defects
US5805795A (en) * 1996-01-05 1998-09-08 Sun Microsystems, Inc. Method and computer program product for generating a computer program product test that includes an optimized set of computer program product test cases, and method for selecting same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4044244A (en) * 1976-08-06 1977-08-23 International Business Machines Corporation Automatic tester for complex semiconductor components including combinations of logic, memory and analog devices and processes of testing thereof
US4168527A (en) * 1978-02-17 1979-09-18 Winkler Dean A Analog and digital circuit tester
US4647846A (en) * 1980-10-10 1987-03-03 Malkin Dov B Method and means for testing multi-nodal circuits
US5327437A (en) * 1991-11-25 1994-07-05 Hewlett-Packard Company Method for testing electronic assemblies in the presence of noise
US5819208A (en) * 1996-10-29 1998-10-06 Northern Telecom Limited Quantifying circuit performance
WO1998055880A1 (en) * 1997-06-02 1998-12-10 Opmaxx, Inc. Method for parallel analog and digital circuit fault simulation and test set specification

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
CHAKRABARTI S ET AL: "Diagnostic test pattern generation for analog circuits using hierarchical models", VLSI DESIGN, 1999. PROCEEDINGS. TWELFTH INTERNATIONAL CONFERENCE ON GOA, INDIA 7-10 JAN. 1999, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 7 January 1999 (1999-01-07), pages 518 - 523, XP010319997, ISBN: 0-7695-0013-7 *
GROCHOWSKI, ET AL.: "Integrated Circuit Testing for Quality Assurance in Manufacturing: History, Current Status, and Future Trends", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-II: ANALOG AND DIGITAL SIGNAL PROCESSING, vol. 44, no. 8, August 1997 (1997-08-01), pages 610 - 633, XP011012685 *
See also references of WO0070358A1 *
VARIYAM P N ET AL: "Enhancing test effectiveness for analog circuits using synthesized measurements", VLSI TEST SYMPOSIUM, 1998. PROCEEDINGS. 16TH IEEE MONTEREY, CA, USA 26-30 APRIL 1998, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 26 April 1998 (1998-04-26), pages 132 - 137, XP010277151, ISBN: 0-8186-8436-4 *
VARIYAM P N ET AL: "Specification-Driven Test Design for Analog Circuits", DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, 1998. PROCEEDINGS., 1998 IEEE INTERNATIONAL SYMPOSIUM ON AUSTIN, TX, USA 2-4 NOV. 1998, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 2 November 1998 (1998-11-02), pages 335 - 340, XP010315434, ISBN: 0-8186-8832-7 *
VARIYAM P N ET AL: "Test generation for comprehensive testing of linear analog circuits using transient response sampling", COMPUTER-AIDED DESIGN, 1997. DIGEST OF TECHNICAL PAPERS., 1997 IEEE/ACM INTERNATIONAL CONFERENCE ON SAN JOSE, CA, USA 9-13 NOV. 1997, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 9 November 1997 (1997-11-09), pages 382 - 385, XP010261079, ISBN: 0-8186-8200-0 *

Also Published As

Publication number Publication date
EP1212626A1 (en) 2002-06-12
AU5442000A (en) 2000-12-05
WO2000070358A1 (en) 2000-11-23

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