EP1183720A1 - Method for cleaning a silicon substrate surface and use for making integrated electronic components - Google Patents

Method for cleaning a silicon substrate surface and use for making integrated electronic components

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Publication number
EP1183720A1
EP1183720A1 EP00925372A EP00925372A EP1183720A1 EP 1183720 A1 EP1183720 A1 EP 1183720A1 EP 00925372 A EP00925372 A EP 00925372A EP 00925372 A EP00925372 A EP 00925372A EP 1183720 A1 EP1183720 A1 EP 1183720A1
Authority
EP
European Patent Office
Prior art keywords
ions
silicon substrate
cleaning
electronic components
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP00925372A
Other languages
German (de)
French (fr)
Inventor
Michael Korwin-Pawlowski
Jean-Pierre Lazzari
Gilles Borsoni
Michel Froment
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
X Ion SA
Original Assignee
X Ion SA
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Filing date
Publication date
Application filed by X Ion SA filed Critical X Ion SA
Publication of EP1183720A1 publication Critical patent/EP1183720A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures

Definitions

  • the invention relates to a method for cleaning a silicon substrate surface, which can be applied to the manufacture of integrated electronic components.
  • the invention relates to the field of microelectronics on silicon substrate, and more particularly to the manufacture of integrated circuits and memory with very high integration density. It applies to electronic components integrated in such circuits, such as diodes or transistors, or to memories with very high integration density.
  • Monocrystalline silicon is widely used in the field of microelectronics. It comes in the form of pellets or "slices" cut from a silicon ingot. The cutting is generally carried out along the orientation c ⁇ stallographic plane 100, perpendicular to the coordinate vector 1; 0; 0, the wafer is said to be of orientation 100. After cutting, the substrate is polished and then cleaned.
  • the cleaning phase aims to eliminate the stains present on the surface of the substrate, before carrying out the various stages of manufacturing integrated circuits.
  • the soils are generally constituted by dielectric materials, such as silicon oxide, silicon monoxide, organic residues from cleaning products, or various silicon-based SiX compounds, X being a radical such that l , carbon, etc.
  • the silicon surface can also have point structural defects which affect its flatness, that is to say its "planing” in terms of profession, such as "dimers", groups of two strongly bonded silicon atoms. between them, but less linked to the crystal mesh.
  • the cleaning methods used are chemical pickling methods of the RCA type, from the name of the company which developed it. It involves immersion in a hydrofluoric acid bath and rinsing with deionized water.
  • An object of the invention is to obtain a silicon surface that is completely free of contamination.
  • Another object is to form a planarized silicon surface, which does not exhibit roughness.
  • the present invention proposes to act by a specific remote interaction between moderately charged ions and the surface of orientation silicon 100 to be cleaned, in order to cause the ejection of soils present on the surface, such as dielectric materials, and eliminating crystal defects of the dimer type, without the ions penetrating said surface.
  • moderately charged ions such as dielectric materials
  • crystal defects of the dimer type without the ions penetrating said surface.
  • the invention aims to provide a perfectly cleaned and planarized surface.
  • the subject of the invention is a method of cleaning a surface of orientation silicon substrate 100 for the manufacture of integrated electronic components, and in which, after polishing, the cleaning is carried out under vacuum by production of a flow of moderately charged positive ions, of low energy and of predetermined density, the flux being directed towards the surface of the substrate, and by controlling the kinetic energy of the ions so that their speed is substantially zero at a predetermined distance from said surface to cause only the ejection of stains present on the surface of the substrate, and the elimination of specific crystalline defects of repulsion forces of sufficient intensity being created within these stains and these defects to obtain a thoroughly planar cleaned surface .
  • the production of ions is controlled in density (number of ions per unit of surface and time) by application of an extraction voltage, and in direction by magnetic sorting according to the mass / charge ratio; the ions are selected in speed and in direction by filtering, respectively by electric field of the band pass or high pass type and by collimation, for example by a series of diaphragms;
  • the ions generated are rare gas ions of uniform charge, such as Argon, in particular the ions Ar 12+ to Ar 8 Neon, or Krypton; - the density of the ions is between 10 8 and 10 15 ions / cm 2 . s.
  • the method according to the invention is "planarizing" to the extent that it allows the selective ejection of soils without attacking the silicon. Indeed, once the dirt is ejected, it is the free electrons coming from the mass of silicon that will be extracted by the continuous supply of ions. Thus the cleaned surface areas, that is to say areas free of soiling, do not accumulate a charge opposite the ions and the material extraction process is never initiated. Likewise, the process is planarizing by eliminating crystal defects.
  • this process is self-stopping because the interaction between ions and matter ceases, for the reasons mentioned in the previous paragraph, as soon as all the soil or all surface defects are eliminated.
  • the process of the invention makes it possible to produce a thin layer of Si0 2 , which can serve as a diffusion barrier in the integrated electronic components, such as transistor or diode.
  • a MOS (Metal - Oxide - Semiconductor) type transistor is in the form of a monocrystalline silicon substrate.
  • This substrate comprises two heavily n + doped zones, constituting two electrodes, the source and the drain, with a thickness of the order of 1 to 3 ⁇ m. Between these electrodes, the substrate is surmounted by a grid formed in a silicon wafer with orientation 100. The lower part of the grid, in contact with the substrate, consists of a layer of refractory metal oxide, titanium or tantane, forming the gate oxide.
  • the gate oxide is conventionally produced by sputtering or by ion bombardment deposition under oxidative conditions (abbreviated to IBD, initials of Ion Beam Deposition in English terminology). With a high dielectric constant, it makes it possible to increase the thickness of the insulator in order to avoid the formation of “pinholes” (pin-holes in English terminology) which cause short circuits which can destroy the transistor.
  • refractory metal oxides deposited on the substrate, these oxides combine over time with monocrystalline silicon to constitute the silicide of the corresponding refractory metal. This silicide, formed just under the grid, greatly affects the performance of the component.
  • the present invention proposes to prepare the silicon substrate intended to receive the oxide of refractory metals according to a preliminary cleaning step in accordance with the preceding process, followed by an interaction step. at a vacuum distance between a flux of oxidizing ions and the surface of the silicon substrate, the kinetic energy of the ions being controlled so that their speed is substantially zero at a predetermined distance from said surface, for example 10 to 20 ⁇ .
  • the oxidizing ions are selected 0 + ions, directed and decelerating, and the silicon substrate is maintained at a temperature below 500 ° C, preferably between 200 and 500 ° C.
  • the cleaning step according to the preceding method is completed by a step of passivation of the surface by hydrogenation using a hydrofluoric acid and ammonium ion bath.
  • the passivation obtained is of the type developed by the company BELL TELEPHONE Inc., according to a known process.
  • the hydrogenation step is followed by an oxidation step, by remote interaction under vacuum with moderately charged ions to cause the opening of the Si-H bonds, then filling of the open bonds with oxygen gas.
  • the ions selected under vacuum are preferably moderately charged Argon ions, having a uniform charge of, for example, between Ar 4+ to Ar 8+ , and the oxidation is carried out by the introduction of oxygen gas controlled under pressure.
  • the temperature of the silicon substrate is kept at a value between 200 and 500 ° C.
  • other moderately charged rare gases can be used (Neon, Krypton, Xenon etc.), and the substrate is maintained under vacuum to receive the deposit of refractory oxide.
  • the silicon substrate oriented along the plane 100 is first pickled to roughly rid it of the native oxide formed on its surface.
  • a high vacuum reactor of the order of 10 "11 to 10 " 13 mbar, produced by known pumping means, such as ultra high vacuum.
  • This reactor is equipped with an argon ion flow generator Ar 12+ , from a source such as an electron cyclotron resonance source of ECR type (Electron Cyclotron Resonance initials in English terminology).
  • the source produces ions with low kinetic energy, of a few keV / q (q being the number of charges per ion), generally from 1 to 20 keV / q, 10 keV / q in the example of implementation.
  • the source is regulated by the application of an extraction voltage, which is equal to 10 kV in the present case.
  • the ions are controlled in direction by a sorting magnet which eliminates ions whose lateral component of speed is greater than a given value.
  • Speed and direction selection means are also provided on the ion path, between the source and the silicon substrate to be treated. These means are filtering means constituted by:
  • the flow collimating means in the form of a series of diaphragms of diameter on the order of a millimeter.
  • the selection means also have the function of guiding the ions towards the silicon substrate.
  • An electric deceleration field slows down the ions as they approach the silicon surface until they reach a speed close to or equal to zero.
  • the electric field is applied by a flat capacitor coupled to a potentiometer. This application is controlled by a deceleration voltage to give each ion an energy between a few eV and 0.
  • the value of the deceleration voltage regulates the distance of approach of the ions and the size of the interaction zone between the argon ions and the stains present on the surface of a suostrate of silicon.
  • these soils are represented in the form of a layer 10 of S ⁇ 0 2 and of an organic material 11 of SiC, partially covering the surface 21 of a monoc ⁇ stallin silicon substrate 20.
  • the intensity of the repulsion forces depends on the characteristics of the ion flow, and in particular on its charge density which can range from 10 8 to 10 15 ions / cm 2 . s.
  • the ion beam has an intensity of 120 ⁇ A and a section of 1 cm 2 ; the density of incident ions is 6.10 13 ⁇ ons / cm 2 .s;
  • the temperature is taken equal to 300 ° C.
  • agglomerates of material 14 are expelled from organic material 11 when Argon ions 30 approach this type of soiling.
  • Argon ions 30 arrive near an area of the silicon surface 21 free of stains, such as area 21a, these ions will extract electrons 31 which are pumped from the depths of the silicon substrate 20, which avoids the presence of charges capable of extracting silicon agglomerates from the surface of the substrate.
  • the process is very self-stopping because the charged ions cause the expulsion of the stains as long as they are present on the surface of the silicon substrate, but the expulsion of material stops as soon as the stains have been removed.
  • the ejected agglomerates, positively charged are attracted by an electrostatic screen.
  • the measurement of the charge of this screen makes it possible to detect, when this charge becomes constant, the end of the action of the ions and therefore of the cleaning.
  • a mother 40 is in the form of two silicon atoms, 41 and 42, linked together.
  • Each atom of the dimer is also linked to two silicon atoms, respectively references 51, 53 and 52, 54, these four atoms being located at the consecutive vertices of a rectangle.
  • the bonds between each atom of the dimer and the atoms of the rectangle form a triangle oriented towards the center of the rectangle, the dimer 41-42 overhanging the plane P in which the four atoms are arranged 51 to 54. This overhang constitutes a defect in the plane 100 crystal mesh which results in a surface irregularity, which harms the hovering thereof.
  • Such a dimer exhibits structural instability because each atom of the dimer is linked to only three atoms.
  • the atoms 41 and 42 therefore have pendant bonds 61, 62 which form open bonds, in the opposite direction to that of all of the bonds formed by the dimer with the atoms 51 to 54 of the crystal lattice.
  • the bonds of the latter with the crystal lattice are weakened and then open: the dimer 41-42 is then expelled from the crystalline plane 100 of the silicon substrate.
  • An example of application of the process of the invention is the obtaining of a thin layer of rigorous planing S ⁇ 0 2 on a silicon substrate of integrated electronic components.
  • This layer of S ⁇ 0 2 can be used in particular of diffusion barrier of refractory metal oxides.
  • the surface of the silicon substrate is first carefully prepared according to a cleaning step in accordance with the preceding process in a reactor equipped with an ECR generator.
  • this surface is then subjected to a remote interaction under vacuum between a flow of oxidizing ions, 0 + ions in this case, and the surface of the silicon substrate.
  • Argon gas is then replaced by Oxygen gas and the reactor configuration parameters are reset to values adapted by those skilled in the art: - close the Argon valve and open that of oxygen ;
  • the 0 + ions are selected in speed and directed towards the silicon substrate by magnetic filtering using a reflex filter. Then the ions are decelerated by applying a deceleration voltage until reaching a speed zero or close to zero at a given distance from the surface, equal to about 10 to 20 ⁇ .
  • the silicon substrate is maintained at a temperature below 500 ° C, equal to 300 ° C in the present case.
  • the growth rate of the Si0 2 layer formed tends asymptotically to zero. Control of the oxide thickness is thus facilitated.
  • the cleaning step is completed by a passivation step of the surface by hydrogenation using a bath of hydrofluoric acid and ammonium ions.
  • the passivation obtained is of the type developed by the company BELL TELEPHONE Inc., according to a known process.
  • the silicon surface is then covered with a single layer of hydrogen forming SiH bonds with the silicon surface.
  • these bonds are opened by interaction with moderately charged Argon ions, Ar 4+ to Ar 8+ , Ar 8+ in the example, then filled by adding oxygen gas.
  • the remote interaction with the Argon ions is implemented in a similar manner to that previously carried out for cleaning. Oxidation is done by introducing pressure-controlled oxygen gas, of the order of 10 " ⁇ Torr in the present case.
  • the silicon substrate In order to promote the opening of the SiH bonds and the oxidation, it is also planned to maintain the silicon substrate at a temperature between 200 and 500 ° C., 300 ° C. in the exemplary embodiment.
  • This embodiment is self-stopping because the thickness of the oxidized layer is predetermined and homogeneous due to the formation of this layer on the pendant bonds of the hydrogen monolayer formed in the previous step on a large planing surface. .
  • the oxidized silicon substrate according to one or other of the preceding examples is conveyed under vacuum to receive such a deposition in another reaction chamber.
  • the invention is not limited to the embodiments described and shown.
  • oxidizing ions for example ions from water vapor, or other medium charged ions in the second example of the application, by example of rare gas ions (Neon, Krypton, etc.) with an oxidation temperature of up to 500 ° C for the weakest charged ions.
  • rare gas ions Neon, Krypton, etc.
  • oxygen gas can be effective in the reactor from the start of the production of ions or as soon as the first ions approach the silicon surface.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Crystallography & Structural Chemistry (AREA)
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  • General Physics & Mathematics (AREA)
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  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Chemical Kinetics & Catalysis (AREA)
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  • Cleaning Or Drying Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

The invention concerns a method for cleaning a silicon substrate surface with 100 orientation for integrated electronic components. The method is characterised in that it consists in carrying out the cleaning step after polishing by producing under vacuum a flux of positive ions (30) moderately loaded, with low energy level and predetermined density. The flux is directed towards the surface (21) of the silicon substrate (20), and the kinetic energy of the ions (30) is controlled so that their speed is substantially null at a predetermined distance from said surface. The ejection of soils (10, 11) present on the substrate surface and the elimination of punctiform crystalline defects (40) is then brought about by the generation of repulsive forces of sufficient intensity within said soil and said defects, thereby producing a perfectly planar surface.

Description

PROCEDE DE NETTOYAGE D'UNE SURFACE DE SUBSTRAT DE SILICIUM ET APPLICATION A LA FABRICATION DE COMPOSANTS METHOD FOR CLEANING A SILICON SUBSTRATE SURFACE AND APPLICATION TO THE MANUFACTURE OF COMPONENTS
ELECTRONIQUES INTEGRESINTEGRATED ELECTRONICS
L'invention concerne un procédé de nettoyage d'une surface de substrat de silicium, qui peut être appliqué à la fabrication de composants électroniques intégrés.The invention relates to a method for cleaning a silicon substrate surface, which can be applied to the manufacture of integrated electronic components.
En effet, l'invention se rapporte au domaine de la micro-électronique sur substrat de silicium, et plus particulièrement a la fabrication de circuits intégrés et de mémoire à très haute densité d'intégration. Elle s'applique aux composants électroniques intégrés dans de tels circuits, comme des diodes ou des transistors, ou aux mémoires à très haute densité d'intégration.Indeed, the invention relates to the field of microelectronics on silicon substrate, and more particularly to the manufacture of integrated circuits and memory with very high integration density. It applies to electronic components integrated in such circuits, such as diodes or transistors, or to memories with very high integration density.
Le silicium monocristallm est largement utilisé dans le domaine de la micro-électronique . Il se présente sous forme de pastilles ou « tranches » découpées dans un lingot de silicium. La découpe se faisant en général selon le plan cπstallographique d'orientation 100, perpendiculairement au vecteur de coordonnées 1 ; 0 ; 0, la tranche est dite d'orientation 100. Apres découpe, le substrat est poli puis nettoyé .Monocrystalline silicon is widely used in the field of microelectronics. It comes in the form of pellets or "slices" cut from a silicon ingot. The cutting is generally carried out along the orientation cπstallographic plane 100, perpendicular to the coordinate vector 1; 0; 0, the wafer is said to be of orientation 100. After cutting, the substrate is polished and then cleaned.
La phase de nettoyage vise à éliminer les souillures présentes à la surface du substrat, avant de réaliser les différentes étapes de fabrication de circuits intégrés. Les souillures sont constituées en général par des matériaux diélecπques, tels que de l'oxyde de silicium, du monoxyde de silicium, des résidus organiques issus des produits de nettoyage, ou divers composés SiX à base de silicium, X étant un radical tel que l'azote, le carbone, etc. La surface de silicium peut présenter également des défauts ponctuels de structure qui nuisent à sa planéité, c'est-à-dire à sa « planante » en terme de métier, tels que des « dimeres », groupements de deux atomes de silicium lies fortement entre eux, mais moins liés à la maille cristalline. De façon classique, les procédés de nettoyage utilisés sont des procédés chimiques de décapage du type RCA, du nom de la société qui l'a mis au point. Il comporte l'immersion dans un bain d'acide fluorhydriçue et un rinçage à l'eau désionisée.The cleaning phase aims to eliminate the stains present on the surface of the substrate, before carrying out the various stages of manufacturing integrated circuits. The soils are generally constituted by dielectric materials, such as silicon oxide, silicon monoxide, organic residues from cleaning products, or various silicon-based SiX compounds, X being a radical such that l , carbon, etc. The silicon surface can also have point structural defects which affect its flatness, that is to say its "planing" in terms of profession, such as "dimers", groups of two strongly bonded silicon atoms. between them, but less linked to the crystal mesh. Conventionally, the cleaning methods used are chemical pickling methods of the RCA type, from the name of the company which developed it. It involves immersion in a hydrofluoric acid bath and rinsing with deionized water.
Cependant ces procédés, bien que relativement sélectifs, présentent un certain nombre d'inconvénients :However, these processes, although relatively selective, have a certain number of drawbacks:
- la surface de silicium est attaquée, ce qui entraîne une augmentation de rugosité importante ; - l'utilisation d'acides forts comme l'acide fluorhydrique, qui présentent un taux de toxicit.é important, impose la mise en place de précautions lourdes et coûteuses ;- The silicon surface is etched, which leads to a significant increase in roughness; - the use of strong acids such as hydrofluoric acid, which have a high rate of toxicity, requires the implementation of heavy and costly precautions;
- la présence éventuelle de résidus organiques issus des produits de nettoyage utilisés ;- the possible presence of organic residues from the cleaning products used;
- le contrôle des réactions en milieu aqueux n'est pas parfaitement reproductible et le séchage est toujours délicat .- the control of reactions in an aqueous medium is not perfectly reproducible and drying is always delicate.
Un but de l'invention est d'obtenir une surface de silicium parfaitement exempte de souillures.An object of the invention is to obtain a silicon surface that is completely free of contamination.
Un autre but est de former une surface de silicium planarisée, qui ne présente pas de rugosité.Another object is to form a planarized silicon surface, which does not exhibit roughness.
Pour atteindre ces buts, la présente invention propose d'agir par une interaction spécifique à distance entre des ions moyennement chargés et la surface de silicium d'orientation 100 à nettoyer, afin de provoquer l'éjection de souillures présentes en surface, telles que les matières diélectriques, et éliminer des défauts cristallins du type dimère, sans que les ions ne pénètrent ladite surface. L' interaction sélective à distance avec les matières diélectriques permet de conserver une qualité de surface intacte, puisque les ions n'agissent sur ni ne pénètrent dans la surface monocristalline.To achieve these goals, the present invention proposes to act by a specific remote interaction between moderately charged ions and the surface of orientation silicon 100 to be cleaned, in order to cause the ejection of soils present on the surface, such as dielectric materials, and eliminating crystal defects of the dimer type, without the ions penetrating said surface. Selective interaction at a distance with dielectric materials keeps an intact surface quality, since the ions neither act on nor penetrate the monocrystalline surface.
Un procédé faisant intervenir l'interaction d'ions Argon à distance a été décrit dans la demande de brevet français FR 96/16288. Ce procédé vise à résoudre un problème fondamentalement différent de celui évoqué ci- dessus, car il est destiné à ouvrir des liaisons hydrogène à la surface d'un substrat de silicium préalablement hydrogéné pour y former une couche saturée de Si02. Il utilise des ions Argon fortement chargés (Ar17+ ou Ar18+) et une surface de silicium d'orientation 111.A process involving the interaction of Argon ions at a distance has been described in the patent application French FR 96/16288. This process aims to solve a problem fundamentally different from that mentioned above, because it is intended to open hydrogen bonds on the surface of a silicon substrate previously hydrogenated to form a saturated layer of Si0 2 there . It uses highly charged Argon ions (Ar 17+ or Ar 18+ ) and a 111 orientation silicon surface.
Appliqué au nettoyage d'un substrat de silicium 100, un tel procédé ferait éclater la surface de silicium. En effet, les liaisons Si-H dans le plan d'orientation 100 étant plus difficiles à ouvrir que dans le plan d'orientation 111, les ions fortement chargés vont créer une image électrostatique autour d'agglomérats de silicium, fragiliser les liaisons entre ces agglomérats, puis provoquer leur éjection et la formation de cratères par effet d' « explosion coulombienne » .Applied to the cleaning of a silicon substrate 100, such a method would cause the silicon surface to burst. Indeed, the Si-H bonds in the orientation plane 100 being more difficult to open than in the orientation plane 111, the highly charged ions will create an electrostatic image around silicon agglomerates, weakening the bonds between these agglomerates, then cause their ejection and the formation of craters by effect of "Coulomb explosion".
Au contraire, l'invention vise à fournir une surface parfaitement nettoyée et planarisée.On the contrary, the invention aims to provide a perfectly cleaned and planarized surface.
Plus précisément, l'invention a pour objet un procédé de nettoyage d'une surface de substrat de silicium d'orientation 100 pour la fabrication de composants électroniques intégrés, et dans lequel, après polissage, le nettoyage est conduit sous vide par production d'un flux d'ions positifs moyennement chargés, de basse énergie et de densité prédéterminée, le flux étant dirigé vers la surface du substrat, et par contrôle de l'énergie cinétique des ions pour que leur vitesse soit sensiblement nulle à une distance prédéterminée de ladite surface pour provoquer uniquement l'éjection de souillures présentes à la surface du substrat, et l'élimination de défauts cristallins ponctuels des forces de répulsion d'intensité suffisante étant créées au sein de ces souillures et de ces défauts pour obtenir une surface nettoyée rigoureusement plane. Selon des caractéristiques préférées : - la production d'ions est contrôlée en densité (nombre d'ions par unité de surface et de temps) par application d'une tension d'extraction, et en direction par tri magnétique en fonction du rapport masse/charge ; - les ions sont sélectionnés en vitesse et en direction par filtrage, respectivement par champ électrique de type passe-bande ou passe-haut et par collimation, par exemple par une série de diaphragmes ;More specifically, the subject of the invention is a method of cleaning a surface of orientation silicon substrate 100 for the manufacture of integrated electronic components, and in which, after polishing, the cleaning is carried out under vacuum by production of a flow of moderately charged positive ions, of low energy and of predetermined density, the flux being directed towards the surface of the substrate, and by controlling the kinetic energy of the ions so that their speed is substantially zero at a predetermined distance from said surface to cause only the ejection of stains present on the surface of the substrate, and the elimination of specific crystalline defects of repulsion forces of sufficient intensity being created within these stains and these defects to obtain a thoroughly planar cleaned surface . According to preferred characteristics: - the production of ions is controlled in density (number of ions per unit of surface and time) by application of an extraction voltage, and in direction by magnetic sorting according to the mass / charge ratio; the ions are selected in speed and in direction by filtering, respectively by electric field of the band pass or high pass type and by collimation, for example by a series of diaphragms;
- la décélération de ces ions à l'approche de ladite surface est réalisée par application d'une tension adaptée ;- The deceleration of these ions when approaching said surface is achieved by applying an adapted voltage;
- les ions générés sont des ions de gaz rare de charge uniforme, tels que l'Argon, en particulier les ions Ar12+ à Ar8 le Néon, ou le Krypton ; - la densité des ions est comprise entre 108 et 1015 ions/cm2. s .- the ions generated are rare gas ions of uniform charge, such as Argon, in particular the ions Ar 12+ to Ar 8 Neon, or Krypton; - the density of the ions is between 10 8 and 10 15 ions / cm 2 . s.
Avantageusement, le procédé selon l'invention est « planarisant » dans la mesure où il permet l'éjection sélective des souillures sans attaquer le silicium. En effet, une fois les souillures éjectées, ce sont les électrons libres provenant de la masse du silicium qui vont être extraits par l'apport continu d'ions. Ainsi les zones de surface nettoyées, c'est-à-dire dépourvues de souillures, n'accumulent pas de charge en regard des ions et le processus d'extraction de matière n'est jamais initié. De même, le procédé est planarisant par élimination des défauts cristallins.Advantageously, the method according to the invention is "planarizing" to the extent that it allows the selective ejection of soils without attacking the silicon. Indeed, once the dirt is ejected, it is the free electrons coming from the mass of silicon that will be extracted by the continuous supply of ions. Thus the cleaned surface areas, that is to say areas free of soiling, do not accumulate a charge opposite the ions and the material extraction process is never initiated. Likewise, the process is planarizing by eliminating crystal defects.
De plus, ce procédé est auto-stoppant car l'interaction ions - matière cesse, pour les raisons évoquées au paragraphe précédent, dès que toute la souillure ou tous les défauts de surface sont éliminés.In addition, this process is self-stopping because the interaction between ions and matter ceases, for the reasons mentioned in the previous paragraph, as soon as all the soil or all surface defects are eliminated.
Selon une application particulière, le procédé de l'invention permet de réaliser une couche de Si02 de faible épaisseur, pouvant servir de barrière de diffusion dans les composants électroniques intégrés, tels que transistor ou diode .According to a particular application, the process of the invention makes it possible to produce a thin layer of Si0 2 , which can serve as a diffusion barrier in the integrated electronic components, such as transistor or diode.
A titre d'exemple, un transistor de type MOS (Métal - Oxyde - Semiconducteur) se présente sous la forme d'un substrat de silicium monocristallin. Ce substrat comporte deux zones fortement dopées n+, constituant deux électrodes, la source et le drain, d'une épaisseur de l'ordre de 1 à 3 μm. Entre ces électrodes, le substrat est surmonté d'une grille formée dans une tranche de silicium d'orientation 100. La partie inférieure de la grille, en contact avec le substrat, est constituée d'une couche d'oxyde de métaux réfractaires, titane ou tantane, formant l'oxyde de grille. L'oxyde de grille est réalisé classiquement par pulvérisation cathodique ou par dépôt par bombardement ionique sous condition oxydante (en abrégé IBD, initiales de Ion Beam Déposition en terminologie anglo-saxonne) . De constante diélectrique élevée, il permet d'augmenter l'épaisseur d'isolant afin d'éviter la formation de « trous d'épingle » (pin-holes en terminologie anglo-saxonne) qui provoquent des courts-circuits pouvant détruire le transistor.As an example, a MOS (Metal - Oxide - Semiconductor) type transistor is in the form of a monocrystalline silicon substrate. This substrate comprises two heavily n + doped zones, constituting two electrodes, the source and the drain, with a thickness of the order of 1 to 3 μm. Between these electrodes, the substrate is surmounted by a grid formed in a silicon wafer with orientation 100. The lower part of the grid, in contact with the substrate, consists of a layer of refractory metal oxide, titanium or tantane, forming the gate oxide. The gate oxide is conventionally produced by sputtering or by ion bombardment deposition under oxidative conditions (abbreviated to IBD, initials of Ion Beam Deposition in English terminology). With a high dielectric constant, it makes it possible to increase the thickness of the insulator in order to avoid the formation of “pinholes” (pin-holes in English terminology) which cause short circuits which can destroy the transistor.
Dans ces composants, une difficulté importante apparaît avec l'utilisation d'oxydes de métaux réfractaires : déposés sur le substrat, ces oxydes s'allient dans le temps avec le silicium monocristallin pour constituer le siliciure du métal réfractaire correspondant. Ce siliciure, formé juste sous la grille, nuit fortement aux performances du composant .In these components, an important difficulty appears with the use of refractory metal oxides: deposited on the substrate, these oxides combine over time with monocrystalline silicon to constitute the silicide of the corresponding refractory metal. This silicide, formed just under the grid, greatly affects the performance of the component.
La formation d'une couche mince de Si02, d'une planarité rigoureuse, sous-jacente aux oxydes réfractaires, réalise alors une barrière de diffusion efficace vis-à-vis de ces oxydes car aucun trajet n'existe pour induire une fuite de matière apte à former les siliciures nuisibles par interaction oxyde/silicium. Afin de réaliser une telle couche d'oxyde de silicium, la présente invention propose de préparer le substrat de silicium destiné à recevoir l'oxyde de métaux réfractaires selon une étape de nettoyage préliminaire conforme au procédé précédent, suivie d'une étape d'interaction à distance sous vide entre un flux d' ions oxydants et la surface du substrat de silicium, l'énergie cinétique des ions étant contrôlée pour que leur vitesse soit sensiblement nulle à une distance prédéterminée de ladite surface, par exemple 10 à 20 Â.The formation of a thin layer of Si0 2 , of a rigorous planarity, underlying the refractory oxides, then achieves an effective diffusion barrier with respect to these oxides because no path exists to induce a leakage of material capable of forming harmful silicides by oxide / silicon interaction. In order to produce such a layer of silicon oxide, the present invention proposes to prepare the silicon substrate intended to receive the oxide of refractory metals according to a preliminary cleaning step in accordance with the preceding process, followed by an interaction step. at a vacuum distance between a flux of oxidizing ions and the surface of the silicon substrate, the kinetic energy of the ions being controlled so that their speed is substantially zero at a predetermined distance from said surface, for example 10 to 20 Å.
Selon des conditions de mise en œuvre particulières, les ions oxydants sont des ions 0+ sélectionnés, dirigés et décélères, et le substrat de silicium est maintenu à une température inférieure à 500°C, de préférence entre 200 et 500°C.According to particular implementation conditions, the oxidizing ions are selected 0 + ions, directed and decelerating, and the silicon substrate is maintained at a temperature below 500 ° C, preferably between 200 and 500 ° C.
Selon une variante de réalisation, l'étape de nettoyage selon le procédé précédent est complétée par une étape de passivation de la surface par hydrogénation à l'aide d'un bain d' acide fluorhydrique et d' ions ammonium. La passivation obtenue est du type de celle développée par la société BELL TELEPHONE Inc., selon un procédé connu.According to an alternative embodiment, the cleaning step according to the preceding method is completed by a step of passivation of the surface by hydrogenation using a hydrofluoric acid and ammonium ion bath. The passivation obtained is of the type developed by the company BELL TELEPHONE Inc., according to a known process.
L'étape d'hydrogénation est suivie d'une étape d'oxydation, par interaction à distance sous vide avec des ions modérément chargés pour provoquer l'ouverture des liaisons Si-H, puis comblement des liaisons ouvertes par du gaz oxygène.The hydrogenation step is followed by an oxidation step, by remote interaction under vacuum with moderately charged ions to cause the opening of the Si-H bonds, then filling of the open bonds with oxygen gas.
Les ions sélectionnés sous vide sont de préférence des ions Argon modérément chargés, présentant une charge uniforme comprise par exemple entre Ar4+ à Ar8+, et l'oxydation se fait par introduction de gaz oxygène contrôlé en pression.The ions selected under vacuum are preferably moderately charged Argon ions, having a uniform charge of, for example, between Ar 4+ to Ar 8+ , and the oxidation is carried out by the introduction of oxygen gas controlled under pressure.
Selon d'autres caractéristiques préférées, la température du substrat de silicium est maintenue à une valeur située entre 200 et 500°C, d'autres gaz rares moyennement chargés peuvent être utilisés (Néon, Krypton, Xénon etc.), et le substrat est maintenu sous vide pour recevoir le dépôt d'oxyde réfractaire.According to other preferred characteristics, the temperature of the silicon substrate is kept at a value between 200 and 500 ° C., other moderately charged rare gases can be used (Neon, Krypton, Xenon etc.), and the substrate is maintained under vacuum to receive the deposit of refractory oxide.
D'autres caractéristiques et avantages de l'invention apparaîtront à la lecture de la description détaillée qui suit, relative à des exemples de réalisation non limitatifs, en référence aux figures annexées qui représentent respectivement :Other characteristics and advantages of the invention will appear on reading the detailed description which follows, relating to nonlimiting exemplary embodiments, with reference to the appended figures which represent respectively:
- la figure 1, une vue en coupe illustrant l'extraction de matières parasites d'un substrat de silicium monocristallin en appliquant le procédé selon l'invention ; et- Figure 1, a sectional view illustrating the extraction of parasitic materials from a monocrystalline silicon substrate by applying the method according to the invention; and
- la figure 2, une vue en perspective d'un défaut de la maille cristalline de surface de type dimère.- Figure 2, a perspective view of a defect in the crystalline surface mesh of the dimer type.
Avant de procéder au nettoyage selon l'invention, le substrat de silicium orienté selon le plan 100 est d'abord décapé pour le débarrasser grossièrement de l'oxyde natif formé sur sa surface.Before cleaning according to the invention, the silicon substrate oriented along the plane 100 is first pickled to roughly rid it of the native oxide formed on its surface.
Il est ensuite disposé dans un réacteur sous vide poussé, de l'ordre de 10"11 à 10"13 mbar, produit par des moyens de pompage connus, tels que l' ultravide. Ce réacteur est équipé d'un générateur de flux d'ions argon Ar12+, à partir d'une source telle qu'une source à résonance cyclotronique électronique de type ECR (initiales de Electron Cyclotron Résonance en terminologie anglo- saxonne) .It is then placed in a high vacuum reactor, of the order of 10 "11 to 10 " 13 mbar, produced by known pumping means, such as ultra high vacuum. This reactor is equipped with an argon ion flow generator Ar 12+ , from a source such as an electron cyclotron resonance source of ECR type (Electron Cyclotron Resonance initials in English terminology).
La source produit des ions à basse énergie cinétique, de quelques keV/q (q étant le nombre de charges par ion) , généralement de 1 à 20 keV/q, 10 keV/q dans l'exemple de mise en oeuvre. La source est réglée par l'application d'une tension d'extraction, qui est égale à 10 kV dans le cas présent. Les ions sont contrôlés en direction par un aimant de tri qui élimine les ions dont la composante latérale de vitesse est supérieure à une valeur donnée.The source produces ions with low kinetic energy, of a few keV / q (q being the number of charges per ion), generally from 1 to 20 keV / q, 10 keV / q in the example of implementation. The source is regulated by the application of an extraction voltage, which is equal to 10 kV in the present case. The ions are controlled in direction by a sorting magnet which eliminates ions whose lateral component of speed is greater than a given value.
Des moyens de sélection en vitesse et direction sont également prévus sur le trajet des ions, entre la source et le substrat de silicium a traiter. Ces moyens sont des moyens de filtrage constitues par :Speed and direction selection means are also provided on the ion path, between the source and the silicon substrate to be treated. These means are filtering means constituted by:
- un filtre de type passe-bande ou passe-haut a champ électrique, connu de l'homme de l'art, qui sélectionne les ions en fonction de leur énergie cinétique, les ions d'énergie égale à environ 10 keV/q étant sélectionnes dans ce: exemple ; couplé àa filter of the bandpass or highpass type with an electric field, known to a person skilled in the art, which selects the ions according to their kinetic energy, the energy ions equal to approximately 10 keV / q being select from this: example; coupled to
- des moyens collimateurs de flux sous la forme d'une série de diaphragmes de diamètre de l'ordre du millimètre. Les moyens de sélection ont également pour fonction de guider les ions vers le substrat de silicium.flow collimating means in the form of a series of diaphragms of diameter on the order of a millimeter. The selection means also have the function of guiding the ions towards the silicon substrate.
Un champ électrique de décélération ralentit les ions à l'approche de la surface de silicium jusqu'à atteindre une vitesse proche ou égale a zéro. Le champ électrique est appliqué par un condensateur plan couplé à un potentiomètre . Cette application est contrôlée par une tension de décélération pour donner a chaque ion une énergie comprise entre quelques eV et 0.An electric deceleration field slows down the ions as they approach the silicon surface until they reach a speed close to or equal to zero. The electric field is applied by a flat capacitor coupled to a potentiometer. This application is controlled by a deceleration voltage to give each ion an energy between a few eV and 0.
La valeur de la tension de décélération, égale à lOkV dans l'exemple de réalisation, règle la distance d'approche des ions et la dimension de la zone d interaction entre les ions argon et les souillures présentes à la surface d'un suostrat de silicium.The value of the deceleration voltage, equal to 10kV in the embodiment, regulates the distance of approach of the ions and the size of the interaction zone between the argon ions and the stains present on the surface of a suostrate of silicon.
Sur la figure 1, ces souillures sont représentées sous forme d'une couche 10 de Sι02 et d'une matière organique 11 de SiC, recouvrant partiellement la surface 21 d'un substrat de silicium monocπstallin 20.In FIG. 1, these soils are represented in the form of a layer 10 of Sι0 2 and of an organic material 11 of SiC, partially covering the surface 21 of a monocπstallin silicon substrate 20.
Lorsqu'un ion Ar12+ 30 arrive à proximité de la couche 10, les liaisons de valence d'une zone 12 de cette couche, située en regard de l'ion 30, sont fragilisées. Simultanément, l'ion induit une image électrostatique dans cette zone. Les charges induites sont de même signe négatif et créent des forces de répulsion d' intensité supérieures aux forces de cohésion de la matière : des agglomérats de matière 13, de signe positif, sont ainsi expulsées tant que de la matière diélectrique reste en surface.When an Ar 12+ 30 ion arrives near the layer 10, the valence bonds of a zone 12 of this layer, located opposite the ion 30, are weakened. Simultaneously, the ion induces an electrostatic image in this area. The induced charges have the same negative sign and create repulsion forces of intensity greater than the cohesion forces of the material: agglomerates of. material 13, of positive sign, are thus expelled as long as dielectric material remains on the surface.
L' intensité des forces de répulsion dépend des caractéristiques du flux d'ions, et en particulier de sa densité de charges pouvant aller de 108 a 1015 ions/cm2. s .The intensity of the repulsion forces depends on the characteristics of the ion flow, and in particular on its charge density which can range from 10 8 to 10 15 ions / cm 2 . s.
Dans l'exemple de mise en œuvre :In the implementation example:
- le faisceau d'ions a une intensité de 120 μA et une section de 1 cm2 ; la densité d'ions incidents s'élève à 6.1013 ιons/cm2.s ; et- the ion beam has an intensity of 120 μA and a section of 1 cm 2 ; the density of incident ions is 6.10 13 ιons / cm 2 .s; and
- la température est prise égale a 300°C.- the temperature is taken equal to 300 ° C.
De manière similaire, des agglomérats de matière 14 sont expulsées de la matière organique 11 lorsque des ions Argon 30 s'approchent de ce type de souillure. En revanche, lorsque des ions 30 arrivent à proximité d'une zone de la surface de silicium 21 dépourvue de souillures, telle que la zone 21a, ces ions vont extraire des électrons 31 qui sont pompés des profondeurs du substrat de silicium 20, ce qui évite la présence de charges susceptibles d'extraire des agglomérats de silicium à la surface du substrat.Similarly, agglomerates of material 14 are expelled from organic material 11 when Argon ions 30 approach this type of soiling. On the other hand, when ions 30 arrive near an area of the silicon surface 21 free of stains, such as area 21a, these ions will extract electrons 31 which are pumped from the depths of the silicon substrate 20, which avoids the presence of charges capable of extracting silicon agglomerates from the surface of the substrate.
Ainsi le processus est bien auto-stoppant car les ions charges provoquent l'expulsion des souillures tant qu'elles sont présentes à la surface du substrat de silicium, mais l'expulsion de matière s'arrête dès que les souillures ont été éliminées.Thus the process is very self-stopping because the charged ions cause the expulsion of the stains as long as they are present on the surface of the silicon substrate, but the expulsion of material stops as soon as the stains have been removed.
Avantageusement, les agglomérats éjectés, chargés positivement, sont attires par un écran électrostatique. La mesure de la charge de cet écran permet de détecter, lorsque cette charge devient constante, la f n de l'action des ions et donc du nettoyage.Advantageously, the ejected agglomerates, positively charged, are attracted by an electrostatic screen. The measurement of the charge of this screen makes it possible to detect, when this charge becomes constant, the end of the action of the ions and therefore of the cleaning.
Le procédé est également planarisant du fait de l'élimination des souillures en surface, mais également du fait qu'il permet l'élimination de défauts de la maille cristalline de surface de type dimère, localises au niveau de cette surface comme illustré à la figure 2. Sur cette figure, un d mere 40 se présente sous la forme de deux atomes de silicium, 41 et 42, liés entre eux.The process is also planarizing due to the elimination of soil on the surface, but also because it allows the elimination of defects of the crystalline surface mesh of dimer type, localized at the level of this surface as illustrated in Figure 2. In this figure, a mother 40 is in the form of two silicon atoms, 41 and 42, linked together.
Chaque atome du dimère est également lié à deux atomes de silicium, respectivement références 51, 53 et 52, 54, ces quatre atomes étant situés aux sommets consécutifs d'un rectangle. Les liaisons entre chaque atome du dimère et les atomes du rectangle forment un triangle orientés vers le centre du rectangle, le dimère 41-42 surplombant le plan P dans lequel sont disposés les quatre atomes 51 à 54. Ce surplomb constitue un défaut du plan 100 de la maille cristalline qui se traduit par une irrégularité de surface, ce qui nuit à la planante de celle-ci .Each atom of the dimer is also linked to two silicon atoms, respectively references 51, 53 and 52, 54, these four atoms being located at the consecutive vertices of a rectangle. The bonds between each atom of the dimer and the atoms of the rectangle form a triangle oriented towards the center of the rectangle, the dimer 41-42 overhanging the plane P in which the four atoms are arranged 51 to 54. This overhang constitutes a defect in the plane 100 crystal mesh which results in a surface irregularity, which harms the hovering thereof.
Un tel dimère présente une instabilité de structure du fait que chaque atome du dimère n'est lié qu'à trois atomes. Les atomes 41 et 42 présentent donc des liaisons pendantes 61, 62 qui forment des liaisons ouvertes, en direction opposée à celle de l'ensemble des liaisons que forme le dimère avec les atomes 51 à 54 de la maille cristalline. Lorsqu'un ion Argon 30 s'approche du dimère, les liaisons de celui-ci avec la maille cristalline sont fragilisées puis ouvertes : le dimère 41-42 est alors expulsé du plan cristallin 100 du substrat de silicium.Such a dimer exhibits structural instability because each atom of the dimer is linked to only three atoms. The atoms 41 and 42 therefore have pendant bonds 61, 62 which form open bonds, in the opposite direction to that of all of the bonds formed by the dimer with the atoms 51 to 54 of the crystal lattice. When an Argon 30 ion approaches the dimer, the bonds of the latter with the crystal lattice are weakened and then open: the dimer 41-42 is then expelled from the crystalline plane 100 of the silicon substrate.
Tout défaut cristallin de ce type, trimère ou autre configuration atypique avec éventuellement des atomes autres que silicium (par exemple 0 ou X) , qui induit nécessairement des liaisons fragilisées par rapport au reste du plan cristallin, constitue des défauts cristallins ponctuels qui sont également éliminés par l'interaction ionique à distance.Any crystalline defect of this type, trimer or other atypical configuration with possibly atoms other than silicon (for example 0 or X), which necessarily induces weakened bonds compared to the rest of the crystalline plane, constitute punctual crystalline defects which are also eliminated. by ionic interaction at a distance.
Un exemple d'application du procédé de l'invention est l'obtention d'une couche mince de Sι02 de planante rigoureuse sur un substrat de silicium de composants électroniques intégrés. Cette couche de Sι02 peut servir notamment de barrière de diffusion d'oxydes de métaux réfractaires .An example of application of the process of the invention is the obtaining of a thin layer of rigorous planing Sι0 2 on a silicon substrate of integrated electronic components. This layer of Sι0 2 can be used in particular of diffusion barrier of refractory metal oxides.
Afin de réaliser une telle couche d'oxyde de silicium, la surface du substrat de silicium est d'abord soigneusement préparée selon une étape de nettoyage conformément au procédé précédent dans un réacteur équipé d'un générateur ECR.In order to produce such a layer of silicon oxide, the surface of the silicon substrate is first carefully prepared according to a cleaning step in accordance with the preceding process in a reactor equipped with an ECR generator.
Selon un exemple d'oxydation, cette surface est ensuite soumise à une interaction à distance sous vide entre un flux d'ions oxydants, ions 0+ en l'occurrence, et la surface du substrat de silicium. Dans le même réacteur, Le gaz Argon est alors remplacé par du gaz Oxygène et les paramètres de configuration du réacteur sont recalés sur des valeurs adaptées par l'homme de l'art : - fermer la vanne d'Argon et ouvrir celle d'oxygène ;According to an example of oxidation, this surface is then subjected to a remote interaction under vacuum between a flow of oxidizing ions, 0 + ions in this case, and the surface of the silicon substrate. In the same reactor, Argon gas is then replaced by Oxygen gas and the reactor configuration parameters are reset to values adapted by those skilled in the art: - close the Argon valve and open that of oxygen ;
- adapter la puissance radiofréquence injectée.- adapt the injected radio frequency power.
- ajuster le champ magnétique de l'aimant de tri des ions qui sélectionne les ions en fonction du rapport masse/charge, par réglage de la tension appliquée ; - régler l'ouverture du diaphragme ;- adjust the magnetic field of the ion sorting magnet which selects the ions according to the mass / charge ratio, by adjusting the applied voltage; - adjust the aperture of the diaphragm;
- les tensions d'extraction et de décélération ne sont pas modifiées.- the extraction and deceleration voltages are not changed.
Les ions 0+ sont sélectionnés en vitesse et dirigés vers le substrat de silicium par filtrage magnétique à l'aide d'un filtre reflex. Puis les ions sont décélères par application d'une tension de décélération jusqu'à atteindre une vitesse nulle ou proche de zéro à une distance donnée de la surface, égale à environ 10 à 20 Â. Le substrat de silicium est maintenu à une température inférieure à 500°C, égale à 300°C dans le cas présent.The 0 + ions are selected in speed and directed towards the silicon substrate by magnetic filtering using a reflex filter. Then the ions are decelerated by applying a deceleration voltage until reaching a speed zero or close to zero at a given distance from the surface, equal to about 10 to 20 Å. The silicon substrate is maintained at a temperature below 500 ° C, equal to 300 ° C in the present case.
La vitesse de croissance de la couche de Si02 formée tend asymptotiquement vers zéro. Le contrôle de l'épaisseur d'oxyde est ainsi facilité.The growth rate of the Si0 2 layer formed tends asymptotically to zero. Control of the oxide thickness is thus facilitated.
Selon un autre exemple d'oxydation, l'étape de nettoyage est complétée par une étape de passivation de la surface par hydrogénation a l'aide d'un bain d'acide fluorhydπque et d'ions ammonium. La passivation obtenue est du type de celle développée par la société BELL TELEPHONE Inc., selon un procède connu. La surface de silicium est alors recouverte d'une couche unique d'hydrogène formant des liaisons SiH avec la surface de silicium. Dans un reacteur sous vide poussé de 10"9 à 10"10 Pa, ces liaisons sont ouvertes par interaction avec des ions Argon modérément chargés, Ar4+ à Ar8+, Ar8+ dans l'exemple, puis comblées par apport de gaz oxygène.According to another example of oxidation, the cleaning step is completed by a passivation step of the surface by hydrogenation using a bath of hydrofluoric acid and ammonium ions. The passivation obtained is of the type developed by the company BELL TELEPHONE Inc., according to a known process. The silicon surface is then covered with a single layer of hydrogen forming SiH bonds with the silicon surface. In a high vacuum reactor from 10 "9 to 10 " 10 Pa, these bonds are opened by interaction with moderately charged Argon ions, Ar 4+ to Ar 8+ , Ar 8+ in the example, then filled by adding oxygen gas.
L' interaction a distance avec les ions Argon est mise en œuvre de manière similaire a celle réalisée précédemment en vue du nettoyage. L'oxydation se fait par introduction de gaz oxygène contrôle en pression, de l'ordre de 10"δ Torr dans le cas présent.The remote interaction with the Argon ions is implemented in a similar manner to that previously carried out for cleaning. Oxidation is done by introducing pressure-controlled oxygen gas, of the order of 10 "δ Torr in the present case.
Afin de favoriser l'ouverture des liaisons SiH et l'oxydation, il est également prévu de maintenir le substrat de silicium à une température située entre 200 et 500°C, 300°C dans l'exemple de réalisation. Ce mode de réalisation est auto-stoppant car l'épaisseur de la couche oxydée est prédéterminée et homogène du fait de la formation de cette couche sur les liaisons pendantes de la monocouche d'hydrogène formée à l'étape préalable sur une surface de grande planante. Afin de procéder au dépôt de la couche d'oxyde réfractaire sous-jacente, le substrat de silicium oxydé selon l'un ou l'autre des exemples précédents, est véhiculé sous vide pour recevoir un tel dépôt dans une autre chambre de réaction. L'invention n'est pas limitée aux exemples de réalisation décrits et représentés. Il est par exemple possible d'utiliser d'autres types d'ions oxydants dans le premier exemple de l'application décrite, par exemple des ions issus de la vapeur d'eau, ou d'autres ions moyennement charges dans le deuxième exemple de l'application, par exemple des ions de gaz rares (Néon, Krypton, etc.) avec une température d'oxydation pouvant aller jusqu'à 500 °C pour les ions les plus faiblement chargés. Par ailleurs, la présence de gaz oxygène peut être effective dans le réacteur dès le début de la production d' ions ou dès que les premiers ions approchent la surface de silicium. In order to promote the opening of the SiH bonds and the oxidation, it is also planned to maintain the silicon substrate at a temperature between 200 and 500 ° C., 300 ° C. in the exemplary embodiment. This embodiment is self-stopping because the thickness of the oxidized layer is predetermined and homogeneous due to the formation of this layer on the pendant bonds of the hydrogen monolayer formed in the previous step on a large planing surface. . In order to proceed with the deposition of the underlying refractory oxide layer, the oxidized silicon substrate according to one or other of the preceding examples is conveyed under vacuum to receive such a deposition in another reaction chamber. The invention is not limited to the embodiments described and shown. It is for example possible to use other types of oxidizing ions in the first example of the application described, for example ions from water vapor, or other medium charged ions in the second example of the application, by example of rare gas ions (Neon, Krypton, etc.) with an oxidation temperature of up to 500 ° C for the weakest charged ions. Furthermore, the presence of oxygen gas can be effective in the reactor from the start of the production of ions or as soon as the first ions approach the silicon surface.

Claims

REVENDICATIONS 1. Procédé de nettoyage d'une surface de substrat de silicium monocristallin d'orientation 100 pour composants électroniques intégrés, caractérisé en ce que, après polissage, le nettoyage est conduit sous vide par production d'un flux d'ions positifs (30) moyennement chargés, de basse énergie et de densité prédéterminée, le flux étant dirigé vers la surface (21) du substrat de silicium (20), et par contrôle de l'énergie cinétique des ions (30) pour que leur vitesse soit sensiblement nulle à une distance prédéterminée de ladite surface pour provoquer uniquement l'éjection de souillures (10, 11) présentes à la surface du substrat et l'élimination de défauts cristallins ponctuels (40), des forces de répulsion d'intensité suffisante étant créées au sein de ces souillures et de ces défauts pour obtenir une surface rigoureusement plane.CLAIMS 1. Method for cleaning a surface of orientation 100 monocrystalline silicon substrate for integrated electronic components, characterized in that, after polishing, cleaning is carried out under vacuum by producing a flow of positive ions (30 ) moderately charged, of low energy and of predetermined density, the flux being directed towards the surface (21) of the silicon substrate (20), and by controlling the kinetic energy of the ions (30) so that their speed is substantially zero at a predetermined distance from said surface to cause only the ejection of soils (10, 11) present on the surface of the substrate and the elimination of point crystal defects (40), repulsion forces of sufficient intensity being created within of these stains and these defects to obtain a strictly flat surface.
2. Procédé selon la revendication 1, dans lequel la production d' ions est contrôlée en densité par application d'une tension d'extraction et en direction par tri magnétique, et en ce qu'une décélération de ces ions à l'approche de ladite surface est réalisée par application d'une tension adaptée.2. Method according to claim 1, in which the production of ions is controlled in density by application of an extraction voltage and in direction by magnetic sorting, and in that a deceleration of these ions when approaching said surface is produced by applying a suitable voltage.
3. Procédé selon la revendication 2, caractérisé en ce que les ions sont sélectionnés par filtrage en vitesse et en direction vers le substrat de silicium, en vitesse par champ électrique de type passe-bande ou passe-haut, et en direction par collimation.3. Method according to claim 2, characterized in that the ions are selected by filtering in speed and in direction towards the silicon substrate, in speed by electric field of band-pass or high-pass type, and in direction by collimation.
4. Procédé selon l'une quelconque des revendications précédentes, dans lequel les ons générés sont des ions de gaz rare de charge uniforme.4. Method according to any one of the preceding claims, in which the ons generated are rare gas ions of uniform charge.
5. Procède selon la revendication 4, dans lequel les ions générés sont des ions Argon de charge prise entre Ar8τ et Ar12\5. Method according to claim 4, in which the ions generated are Argon ions of charge taken between Ar 8τ and Ar 12 \
6. Application du procédé de nettoyage selon l'une quelconque des revendications précédentes pour réaliser une couche de Sι02 à la surface d'un substrat de silicium de plan de découpe 100, notamment destinée à servir de barrière de diffusion dans les composants électroniques intégrés, caractérisée en ce qu'elle consiste à préparer le substrat de silicium selon l'une quelconque des revendications précédentes, puis à faire interagir sous viαe un flux d' ions oxydants et la surface du substrat de silicium, l'énergie cinétique des ions étant contrôlée pour que leur vitesse soit sensiblement nulle à une distance prédéterminée de ladite surface.6. Application of the cleaning method according to any one of the preceding claims to achieve a layer of Sι0 2 on the surface of a silicon substrate with cutting plane 100, in particular intended to serve as diffusion barrier in the integrated electronic components, characterized in that it consists in preparing the silicon substrate according to one any of the preceding claims, then interacting under viαe a flow of oxidizing ions and the surface of the silicon substrate, the kinetic energy of the ions being controlled so that their speed is substantially zero at a predetermined distance from said surface.
7. Application selon la revendication 6, caractérisée en ce que les ions oxydants sont des ions 0" sélectionnés, dirigés et décélères, et en ce que le substrat de silicium est maintenu à une température inférieure à 500°C, de préférence entre 200 et 500°C.7. Application according to claim 6, characterized in that the oxidizing ions are 0 " selected ions, directed and decelerating, and in that the silicon substrate is maintained at a temperature below 500 ° C, preferably between 200 and 500 ° C.
8. Application du procédé de nettoyage selon l'une quelconque des revendications 1 à 5, pour réaliser une couche de Si02 à la surface d'un substrat de silicium de plan de découpe 100, notamment destinée à servir de barrière de diffusion dans les composants électroniques intégrés, caractérisée en ce que l'étape de nettoyage est complétée par une étape de passivation de la surface par hydrogénation à l'aide d'un bain d'acide fluorhydrique et d'ions ammonium, suivie d'une étape d'oxydation par interaction à distance sous vide avec des ions de gaz neutre modérément chargés pour ouvrir les liaisons SiH et comblement des liaisons ouvertes par du gaz oxygène.8. Application of the cleaning method according to any one of claims 1 to 5, for producing a layer of Si0 2 on the surface of a silicon substrate with cutting plane 100, in particular intended to serve as a diffusion barrier in the integrated electronic components, characterized in that the cleaning step is completed by a step of passivation of the surface by hydrogenation using a hydrofluoric acid and ammonium ion bath, followed by a step of oxidation by interaction at a distance under vacuum with ions of moderately charged neutral gas to open the SiH bonds and filling of the open bonds with oxygen gas.
9. Application selon la revendication 8, caractérisée en ce que les ions modérément chargés sont des ions d'Argon de charge uniforme entre Ar+ à Ar8+, et en ce que le gaz oxygène est contrôlé en pression.9. Application according to claim 8, characterized in that the moderately charged ions are Argon ions of uniform charge between Ar + to Ar 8+ , and in that the oxygen gas is controlled by pressure.
10. Application selon la revendication 8 ou 9, caractérisée en ce que le gaz oxygène est contrôlé en pression, la température du substrat de silicium est maintenue à une valeur située entre 200 et 500°C, et le substrat de silicium est maintenu sous vide pour recevoir le dépôt d'oxyde réfractaire. 10. Application according to claim 8 or 9, characterized in that the oxygen gas is controlled by pressure, the temperature of the silicon substrate is maintained at a value between 200 and 500 ° C, and the silicon substrate is maintained under vacuum to receive the deposit of refractory oxide.
EP00925372A 1999-05-07 2000-05-03 Method for cleaning a silicon substrate surface and use for making integrated electronic components Withdrawn EP1183720A1 (en)

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FR9905835 1999-05-07
FR9905835A FR2793264B1 (en) 1999-05-07 1999-05-07 METHOD FOR CLEANING A SURFACE OF A SILICON SUBSTRATE AND APPLICATION TO THE MANUFACTURE OF INTEGRATED ELECTRONIC COMPONENTS
PCT/FR2000/001182 WO2000068984A1 (en) 1999-05-07 2000-05-03 Method for cleaning a silicon substrate surface and use for making integrated electronic components

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US6554950B2 (en) 2001-01-16 2003-04-29 Applied Materials, Inc. Method and apparatus for removal of surface contaminants from substrates in vacuum applications
FR2949237B1 (en) * 2009-08-24 2011-09-30 Ecole Polytech METHOD OF CLEANING THE SURFACE OF A SILICON SUBSTRATE

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FR2757881B1 (en) * 1996-12-31 1999-04-09 Univ Paris Curie PROCESS FOR TREATING A SURFACE OF A SEMICONDUCTOR, CORRESPONDING DEVICE AND ASSOCIATED SEMICONDUCTOR
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FR2793264B1 (en) 2001-06-15

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