Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04J—MULTIPLEX COMMUNICATION
  • H04J3/00—Time-division multiplex systems
  • H04J3/02—Details
  • H04J3/06—Synchronising arrangements
  • H04J3/0635—Clock or time synchronisation in a network
  • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
  • H04J3/0658—Clock or time synchronisation among packet nodes
  • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
  • H04J3/0664—Clock or time synchronisation among packet nodes using timestamps unidirectional timestamps
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B7/00—Radio transmission systems, i.e. using radiation field
  • H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
  • H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
  • H04B7/2662—Arrangements for Wireless System Synchronisation
  • H04B7/2671—Arrangements for Wireless Time-Division Multiple Access [TDMA] System Synchronisation
  • H04B7/2678—Time synchronisation
  • H04B7/2687—Inter base stations synchronisation
  • H04B7/269—Master/slave synchronisation

Definitions

• the present invention pertains to telecommunications, and particularly to the synchronization of real time clocks maintained by plural processors of a telecommunications network.
• Cellular telecommunications systems employ a wireless link (e.g., air interface) between a (mobile) user equipment unit and a base station (BS) node.
• the base station node has transmitters and receivers for radio connections with numerous user equipment units.
• One or more base station nodes are connected (e.g., by landlines or microwave) and managed by a radio network controller node (also known in some networks as a base station controller [BSC]).
• BSC base station controller
• the radio network controller node is, in turn, connected through control nodes to a core communications network.
• Control nodes can take various forms, depending on the types of services or networks to which the control nodes are connected.
• control node For connection to connection-oriented, switched circuit networks such as PSTN and/or ISDN, the control node can be a mobile switching center (MSC). For connecting to packet switching data services such as the Internet (for example), the control node can be a gateway data support node through which connection is made to the wired data networks, and perhaps one or more serving nodes.
• MSC mobile switching center
• gateway data support node For connecting to packet switching data services such as the Internet (for example), the control node can be a gateway data support node through which connection is made to the wired data networks, and perhaps one or more serving nodes.
• a telecommunications connection between a mobile user equipment unit and another party thus involves an uplink from the mobile unit through a base station and a radio network controller (RNC), and a downlink in the reverse direction.
• RNC radio network controller
• control and user information is transmitted in frames both on the uplink and downlink.
• some of the nodes of cellular telecommunications networks employ plural processors, each having a real time operating system with a real time clock. It is important, in maintaining control of the telecommunications network and in handling connections, that the real time clocks be synchronized. What is needed, therefore, and an object of the present invention, is a technique for synchronizing real time clocks in a telecommunications network.
• a telecommunications system capitalizes employment of a system frame number for synchronizing plural real time clocks provided at one or more nodes of the network.
• System frame signals e.g., pulses
• a master processor sends a clock set message to the processors, the clock set message including a reference master clock time and a reference system frame number.
• the recipient processors which receive the clock set message resynchronize their respective slave clocks using the reference master clock time and the reference system frame number.
• the clock set message directs the recipient processors to set their respective slave clocks to the reference master clock time upon the recipient processors obtaining the reference system frame number.
• the clock set message advises the recipient processors of an actual master clock time at the reference system frame number, thereby enabling the recipient processor to calculate an adjusted slave clock time.
• the location of the master processor relative to the recipient processors varies in accordance with differing embodiments.
• the master processor and the recipient processors are located at a same node of the telecommunications network, e.g., a base station node.
• the master processor and the recipient processor can be located on differing device boards at a same node of the telecommunications network.
• the master processor and the recipient processor are located at differing nodes of the telecommunications network, e.g., the master processor is located at a radio network controller node and one or more recipient processors are located at a base station node of the telecommunications network.
• Fig. 1 is a schematic view of an embodiment of a telecommunications system which utilizes the present invention.
• Fig. 2 is a schematic view showing employment of a synchronization technique of the present invention at a base station.
• Fig. 3 is a schematic view showing employment of a synchronization technique of the present invention between a radio network controller (RNC) and a base station.
• RNC radio network controller
• Fig. 4 A is a flowchart showing a first mode of using a clock set message (CSM) of the present invention.
• CSM clock set message
• Fig. 4B is a flowchart showing a second mode of using a clock set message
• FIG. 5 is a diagrammatic view of an example format of a clock set message (CSM) of the present invention.
• Fig. 1 shows a telecommunications network 18 in which a user equipment unit 20 communicates with one or more base stations 22 over air interface (e.g., radio interface) 23.
• Base stations 22 are connected by terrestrial lines (or microwave) to radio network controller (RNC) 24 [also known as a base station controller (BSC) in some networks].
• RNC radio network controller
• the radio network controller (RNC) 24 is, in turn, connected through a control node known as the mobile switching center 26 to circuit-switched telephone networks (PSTN/ISDN) represented by cloud 28.
• PSTN/ISDN circuit-switched telephone networks
• radio network controller (RNC) 24 is connected to Serving GPRS Support Node (SGSN) 25 and through backbone network 27 to a Gateway GRPS support node (GGSN) 30, through which connection is made with packet-switched networks (e.g., the Internet, X.25 external networks) represented by cloud 32.
• SGSN Serving GPRS Support Node
• GGSN Gateway GRPS support node
• radio network controller (RNC) 24 orchestrates participation of the plural base stations 22 which may be involved in the connection or session, since user equipment unit 20 may be geographically moving and handover may be occurring relative to the base stations 22.
• radio network controller (RNC) 24 picks frames of user information from one or more base stations 22 to yield a connection between user equipment unit 20 and the other party, whether that party be in PSTN/IDSN 28 or on the packet-switched networks (e.g., the Internet) 32.
• RNC radio network controller
• CDMA code division multiple access
• the information transmitted between a base station and a particular mobile station is modulated by a mathematical code (such as spreading code) to distinguish it from information for other mobile stations which are utilizing the same radio frequency.
• a mathematical code such as spreading code
• the individual radio links are discriminated on the basis of codes.
• Various aspects of CDMA are set forth in Garg, Vijay K. et al., Applications of CDMA in Wireless/Personal Communications, Prentice Hall (1997).
• the user equipment unit 20 in Fig. 1 is depicted as being in contact with multiple base stations 22 (e.g., base station 221 and base station 22 2 ).
• the present invention particularly pertains to synchronization of real time clocks in a telecommunications network 18 wherein the information is transmitted in frames or information packets both on the uplink and on the downlink.
• Each frame is consecutively numbered to include an identifying frame number (FN).
• the frame number (FN) is, in turn, based on a system frame number (SFN) which is maintained at both the base stations 22 and the radio network controller (RNC) 24.
• SFN system frame number
• the SFN is synchronized between the radio network controller (RNC) 24 and the base stations 22.
• each base station 22 has a system frame number (SFN) oscillator which distributes the system frame number to all boards in the base station 22.
• SFN system frame number
• each base stations 22 keeps it own SFN counter using the SFN oscillator.
• RNC radio network controller
• FN frame number
• This frame number (FN) is actually derived from the SFN, e.g., SFN mod 72.
• Fig. 2 illustrates a representative base station 22 of telecommunications network 18.
• the example base station 22 of Fig. 2 comprises plural units or device boards 200 M , 200 S ⁇ , ...200 Sn .
• Each device board 200 has a board processor 202, which executes a real time operating system (RTOS) 204 having a real time clock 206.
• RTOS real time operating system
• device board 200 M is denominated as a "master board” by virtue of the fact that its real time clock 206 M is considered the master real time clock (master clock 206 M ).
• device board 200 M includes a source of system frame signals, i.e., SFN oscillator 210.
• the processor 202 M of master board 200 M communicates via interface 212 and over a control bus 214 with processors of other device boards 200.
• the device boards 200 other than master device board 200 M are herein known as slave boards solely for their respective roles in the synchronization of the invention. Respecting synchronization, the real time clocks 206 on slave boards 200 S ⁇ - 200 Sn are slaved to the master clock 206 M . In addition, slave boards 200 S ⁇ - 200 Sn receive the system frame signals from SFN oscillator 210 over SFN signal line 216.
• the SFN oscillator 210 outputs a pulse which in the illustrated embodiment occurs every 10 milliseconds.
• the pulses issued from SFN oscillator 210 are applied to a SFN counter 220 in each of the slave boards 200 S ⁇ - 200 Sn .
• the SFN counter 220 maintains a count of the pulses comprising the system frame signals received on SFN signal line 216.
• the master processor 202 M receives and counts the system frame signals. When the master processor 200 M determines that a complete set of system frame signals has been issued by SFN oscillator 210, the master processor 200 M issues a reset signal on reset line 222.
• the slave boards 200 S ⁇ - 200 Sn each have one or more characteristic functions, represented generally by function blocks 230 S ⁇ - 230 Sn resident on the respective boards.
• Each of the function blocks 230 S ⁇ - 230 Sn can perform one or more base station functions.
• function block 230 S] can be a transmitter/receiver for effecting communication over air interface 23.
• the function block 230 Sn can be an interface to another node of telecommunications network 18 (such as radio network controller (RNC) 24 , for example), in which case device board 200 Sn functions as an extension board.
• RNC radio network controller
• device board 200 Sn functions as an extension board.
• the device boards 200 of base station 22 serve as transmitter/receiver boards.
• the particular identities and mix of functions provided at base station 22 are not germane to the present invention, with the aforementioned functions being provided for sake of illustration.
• Fig. 2 does not illustrate the transmission of user data frames and the like between the device boards 200 of base station 22.
• Such transmission of user data frames can occur in any conventional manner, such as by encapsulation in ATM frames, for example.
• a switch such as an ATM switch, can be provided for facilitating transmission of, e.g., user data frames between device boards of base station 22.
• the present invention seeks to synchronize the slave clocks 206 s to the master clock 206 M . It is presumed that the master clock 206 M has been accurately maintained or kept (e.g., by radio network controller (RNC) 24), and that the SFN counter of the master processor has been appropriately synchronized (e.g., upon start up).
• RNC radio network controller
• the synchronization of the present invention capitalizes upon the system frame numbers (SFNs) that are maintained at the various device boards 200 of telecommunications network 18.
• the SFN oscillator 210 outputs pulses on line 216.
• the pulses on line 216 are counted by the SFN counters 220 so that each device board 200, so that knowing the frame number (FN) of each user data frame and the SFN the device board 200 can send the frame over the air interface at the proper time.
• the master processor 202 M counts the system frame pulses and determines when the system frame number should be reset to zero. When the master processor 202 M determines that the system frame number should be reset to zero, it sends a reset signal on line 222.
• the master processor 202 M sends a clock set message (CSM) 500 on control bus 214 to recipient processors 202 s on each of the slave boards 200 S ⁇ - 200 Sn -
• CSM clock set message
• the clock set message (CSM) 500 includes a message type identification field 502 which distinguishes the clock set message CSM from other types of messages transmitted on control bus 214.
• the clock set message (CSM) 500 includes a reference system frame number in field 506 (known as the reference system frame number field 504) and a reference master clock time in field 504 (known as the reference master clock time field 506).
• the reference master clock time field 506 specifies the reference master clock time in a format of hour, minute, and seconds (hh.mm.ss). If the control bus 214 employs addressing rather than dedicated connections between the master device board 200 M and the various slave boards 200 S ⁇ - 200 Sn . then an address field is also required in clock set message (CSM) 500. Other fields may also be included, e.g., parity or checksum fields, for example.
• the first mode of the invention is illustrated in Fig. 4A, wherein at step 4A-1 master processor 202 M prepares and sends (via interface 212 M and over control bus 214) a clock set message (CSM) 500 having the format shown in Fig. 5.
• Step 4A-2 of Fig. 4A shows a slave processor 202 s receiving and processing the clock set message (CSM) 500, which involves, e.g., storing the values received in the reference system frame number field 504 and reference master clock time field 506.
• the slave clock 206 s is reset to the hh.mm.ss value carried in the reference master clock time field 506.
• the slave clock 206 s is reset to the actual time specified in the reference master clock time field 506 of the clock set message (CSM) 500.
• the clock set message (CSM) 500 advises the recipient processors on the slave boards 200 S ⁇ - 200 Sn that an actual master clock time (as specified in reference master clock time field 506) occurred at the reference system frame number carried in the reference system frame number field 504.
• the recipient processor calculates an adjusted slave clock time at which its associated slave clock 206 s is to be reset.
• Fig. 4B The second mode of the invention is illustrated in Fig. 4B, wherein at step 4B-1 master processor 202 M prepares and sends (via interface 212 M and over control bus 214) a clock set message (CSM) 500 having the format shown in Fig. 5.
• Step 4B-2 of Fig. 4B shows a slave processor 202 s receiving and processing the clock set message (CSM) 500, which involves, e.g., storing the values received in the reference system frame number field 504 and reference master clock time field 506.
• the adjusted slave clock time computed at step 4B-4 is thus not the actual time value in the reference master clock time field 506, but another value computed using the actual time value in the reference master clock time field 506.
• the computation is simplified by the fact that the pulses of the system frame on line 216 occur at known intervals (e.g., every 10 milliseconds in the illustrated embodiment).
• the slave processor 202 sets its associated slave clock 206 s to the adjusted slave clock time, thereby achieving synchronization.
• the slave processor 202 know the current system frame number at the time of making the computation of step 4B-4. Whether knowledge or updating of that current system frame number is acquired before or after receipt of clock set message (CSM) 500 is not material, as long as an accurate current system frame number is utilized.
• Fig. 3 provides a second representative example embodiment for illustrating the real time clock synchronization of the present invention.
• Fig. 3 illustrates a scenario in which radio network controller (RNC) 24 maintains master clock 306 M which is used for synchronization of slave clocks 306 s situated at one or more base stations 22] - 22 q .
• RNC radio network controller
• the master clock master clock 306 M is situated on a timing board 300 ⁇ of radio network controller (RNC) 24, and particularly is part of real time operating system (RTOS) 304 ⁇ of processor 302 ⁇ situated on timing board 300 ⁇ .
• RNC radio network controller
• RTOS real time operating system
• the timing board 300 ⁇ includes an interface 312 ⁇ through which processor 302 ⁇ communicates over control lines 314 with processors of the base stations 22.
• timing board 300 ⁇ has a SFN oscillator 310 which outputs the system frame signals (pulses) in like manner as SFN oscillator 210 of Fig. 2.
• Timing board 300 ⁇ is shown as having a port 313 ⁇ through which communications are established with the remainder of radio network controller (RNC) 24 via switch 315.
• Information of various types is transmitted between timing board 300 ⁇ and switch 315 through port 313 ⁇ , including the system frame signals and reset signals corresponding to those carried by lines 216 and 222 in Fig. 2.
• the switch 315 serves to connect differing units of radio network controller (RNC) 24, such units including (in addition to timing board 300 ⁇ ) a diversity handover unit 340, a control node interface 342 (for interfacing, e.g., to MSC 26 or SGSN 25), and base station interfaces 344j - 344 q (which are connected, e.g., by landlines, to respective base stations 22j - 22 q ).
• RNC radio network controller
• Each base station 22 is connected via an extension board 350 to the radio network controller (RNC) 24.
• RNC radio network controller
• the extension board 350 is just one of several types of device boards which can be situated at a base station 22.
• the extension board 350 receives the system frame signals from SFN oscillator 310 ⁇ and reset signals from processor 302 ⁇ of radio network controller (RNC) 24, and in one embodiment applies such signals via switch 352 to each of plural device boards 200 of base station 22.
• base station 22j is shown as having device boards 200 S ⁇ through 200 ⁇ _ Sn
• base station 22 q is shown as having device boards 200 q _ S ⁇ through 200 q .
• the device boards 200 of the base stations 22 of Fig. 3 are similar to those of Fig. 2, with the exception that each device board 200 has a port 354 as illustrated by port 354 1-SI of device board 200j_ S ⁇ and port 354 q _ S] of device board 200 q _ S ⁇ -
• the ports 354 manage communications between switch 352 and constituent units of the device board 200, including SFN counter 220 and processor 202.
• the processor 202 is connected via interface 212 to its respective control line 314.
• Control line 314 carries the clock set message (CSM) 500, which for the embodiment of Fig. 3 can have a same example format as shown in Fig. 5 and discussed above.
• CSM clock set message
• each of the device boards 200 at each base station 22 can have their slave clocks 206 synchronization directly in the manner depicted by device board 200 1-S ⁇ and above described with respect to either the mode of Fig. 4 A or the mode of Fig. 4B. That is, each device board 200 can receive the system frame signals from the SFN oscillator 310 ⁇ of radio network controller (RNC) 24 and the clock set message (CSM) 500 from radio network controller (RNC) 24.
• RNC radio network controller
• CSM clock set message
• control line 314 is connected to each device board 200 in the base station which has a slave clock 106 requiring synchronization, and an address field is required in the clock set message (CSM) 500 for specifying the particular device board 200 at base station 22 to which the clock set message (CSM) 500 is applied.
• CSM clock set message
• the master clock 306 ⁇ of radio network controller (RNC) 24 can first be used to synchronize a predetermined slave clock 206 of one of the device boards 200 at each base station (e.g., device board 200 ⁇ -S! at base station 22 ⁇ ), with the first- synchronized such slave clock 206 then serving as an assistant master clock for synchronizing the remaining slave clocks 206 on other device boards 200 of the same base station 22.
• the assistant master clock is supervised and phase corrected by the radio network controller (RNC) 24.
• each device board 200 of a base station 22 receives the system frame signals directly from the SFN oscillator 310 ⁇ , but the clock set message (CSM) 500 is relayed from the device board 200 having the first-synchronization slave clock to other boards at the base station 22 for the synchronization of the remaining slave clocks on the other device boards 200.
• CSM clock set message
• the clock set message (CSM) 500 for the embodiment of Fig. 3 can operate in either the mode of Fig. 4A or the mode of Fig. 4B. Such modes are understood with reference to the preceding discussion of Fig. 2.
• Fig. 3 has been illustrated with the nodes employing switches for routing information through the nodes.
• switches can be ATM switches for routing ATM cells through nodes.
• RNC radio network controller
• intra-node switches may also be used in the embodiment of Fig. 2, although not specifically illustrated herein.
• the master processor and hence the master clock, can be located at a control node of the telecommunications network 18, such as mobile switching center 26.
• the master processor is employed to reset slave clocks at inferior nodes (e.g., radio network controller (RNC) 24 and/or the base stations 22).
• RNC radio network controller
• the present invention facilitates accurate synchronization of real time clocks at a node, and even among plural nodes of telecommunications network 18 by capitalizing upon another feature (SFN) of the telecommunications network 18.
• SFN another feature
• the synchronization of the present invention allows real time operating systems (RTOS) to time stamp events occurring in telecommunications network 18 with precision. These events can be, for example, alarm reports sent to other nodes or log events recorded in a log file for use, e.g., when de-bugging the system.
• RTOS real time operating systems

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• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Mobile Radio Communication Systems (AREA)
• Synchronisation In Digital Transmission Systems (AREA)
• Multi Processors (AREA)

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• 1999
  • 1999-12-17 AU AU30937/00A patent/AU3093700A/en not_active Abandoned
  • 1999-12-17 CN CN99816161.6A patent/CN1335000A/zh active Pending
  • 1999-12-17 CA CA002353598A patent/CA2353598A1/en not_active Abandoned
  • 1999-12-17 EP EP99964908A patent/EP1142176A2/de not_active Withdrawn
  • 1999-12-17 JP JP2000590333A patent/JP2002533990A/ja not_active Withdrawn
  • 1999-12-17 WO PCT/SE1999/002416 patent/WO2000038361A2/en not_active Application Discontinuation
  • 1999-12-20 AR ARP990106592A patent/AR021937A1/es unknown

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