EP1084525A1 - Cable assembly - Google Patents
Cable assemblyInfo
- Publication number
- EP1084525A1 EP1084525A1 EP99924429A EP99924429A EP1084525A1 EP 1084525 A1 EP1084525 A1 EP 1084525A1 EP 99924429 A EP99924429 A EP 99924429A EP 99924429 A EP99924429 A EP 99924429A EP 1084525 A1 EP1084525 A1 EP 1084525A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- cable assembly
- pin
- connector
- connectors
- signal lines
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R31/00—Coupling parts supported only by co-operation with counterpart
- H01R31/06—Intermediate parts for linking two coupling parts, e.g. adapter
Definitions
- the present invention relates to a cable assembly which uses a cable containing signal lines differing in electrical characteristics.
- the cable assembly 18 contains signal lines 26 for a low-speed voice signal and power supply lines 28 in addition to the signal lines 24 used for the transmission of high-speed signals between the semiconductor devices 10 and 12.
- Another method is to vary the connector configuration or the number of conductors between the connectors at both ends of the cable to physically prevent erroneous connection, but this involves higher costs than when using identical connectors at both ends.
- the signal lines are arranged symmetrically between the upper and lower halves, as shown in Figure 3, the wire lines can be arranged such that the wire to each semiconductor device do not cross each other, and yet the arrangement allows reverse connection without causing any appreciable problem.
- signal lines having optimum electrical characteristics for the respective signals cannot be used for the intended signals, as shown in the example of Figure 3 in which a voice signal is assigned to a high-speed signal transmission signal line.
- the present invention provides a cable assembly comprising a cable containing signal lines differing in electrical characteristics, and first and second connectors provided at both ends of the cable and each having a plurality of contacts, wherein a plurality of signal lines having substantially the same electrical characteristics are connected in sequence but in reverse order to a plurality of contacts on the second connector respectively located at positions corresponding to the plurality of contacts on the first connector to which the plurality of signal lines are connected.
- Embodiments of the Invention Figure 4 is a diagram illustrating the wiring within a cable assembly 30 according to one embodiment of the present invention.
- the uppermost pin on the connector 32 is pin #1 and the lowermost pin on the connector 34 is pin #1.
- High-speed differential signals DATA 1 to 5 are assigned to pins #1 to #10 on the connectors 32 and 34 with the pin assignments reversed on the connector 34. With such pin assignments, the pins on each connector are in the order of DATA 1+, DATA 1-, DATA 2+, DATA 5- from top to bottom, so that the wire lines connecting to the semiconductor devices can be made identical in length with each line not crossing any of the other lines and skew and reflection distortions can thus be suppressed.
- Figure 5 is a diagram illustrating the wiring within the cable assembly 30, showing the pin assignments on both connectors with pin #1 located at the top, irrespective of their positional relations on the respective circuit boards. According to Figure 5, it will become more apparent that the signals DATA 1 to 5 are assigned to the corresponding positions on the connectors in reverse order to each other.
- Figure 6 is a perspective view showing a second example of a cable assembly to which the present invention is applied.
- Connectors 40 and 42 are identical in configuration and each connector-has 26 contacts #1 to #26.
- FIG. 7 is a diagram showing connections between the wire lines within the cable assembly 44 of Figure 6 and receptacles 46 and 48 provided on the respective boards.
- Differential signal outputs TxO to Tx4 on the receptacle 46 are connected to differential signal inputs RxO to Rx5 on the receptacle 48 by five twin axial (twinax) cables with a characteristic impedance of 100 ⁇ , the twinax cables each consisting of a twisted-pair wire surrounded by a shield.
- Differential signal terminals USB are connected together by a twinax cable with a characteristic impedance of 90 ⁇ .
- Low- speed signals CTRL 1 to 4 and DATA 1 to 4 are interconnected by individual wires.
- the twinax cable with a characteristic impedance of 100 ⁇ , the twinax cable with a characteristic impedance of 90 ⁇ , and the individual wires are all housed within the cable 45 shown in Figure 6.
- Figure 8 is a diagram illustrating the wiring within the cable assembly 44, showing the pin assignments on both connectors with pin #1 located at the top, irrespective of their positional relations on the respective circuit boards.
- Figure 9 is a diagram showing the wiring within the cable assembly 30 classified by signal type. As can be seen from Figures 8 and 9, differential signals LVDS are assigned to the corresponding positions on the connectors in reverse order to each other.
- Figure 1 is a diagram showing an example of pin arrangements on semiconductor devices.
- Figure 2 is a diagram showing an example of the wiring within a cable assembly according to the prior art, accounting for the pin arrangements on the semiconductor devices.
- Figure 3 is a diagram illustrating the wiring within a cable assembly based on the idea of assigning signals symmetrically between the upper and lower halves.
- Figure 4 is a diagram illustrating the wiring within a cable assembly according to one embodiment of the present invention.
- Figure 5 is a diagram illustrating the wiring of Figure 4 with pin #1 on both connectors shown at the top.
- Figure 6 is a perspective view of the cable assembly according to the present invention.
- Figure 7 is a diagram showing connections between the wire lines within the cable assembly of Figure 6 and receptacles on circuit boards.
- Figure 8 is a diagram illustrating the wiring within the cable assembly of Figure 7 with pin #1 on both connectors shown at the top.
- Figure 9 is a diagram showing the wiring within the cable assembly classified by signal type.
Abstract
A cable assembly including signal lines for transmitting high speed differential signal and including signal lines having various electric characteristics in a form allowing reverse insertion and at low cost, wherein wiring is out in a fashion such that high speed differential signals DATA 1 to 5 are assigned to corresponding-positions, that is, positions of the same pin numbers of connectors 32 and 34 in reverse pin order.
Description
CABLE ASSEMBLY
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a cable assembly which uses a cable containing signal lines differing in electrical characteristics.
Prior Art There is an increasing need for a cable assembly that uses a cable containing signal lines having electrical characteristics (such as characteristic impedance, propagation delay, and attenuation characteristics) suited for the transmission of high- speed signals and signal lines having electrical characteristics suited for the transmission of low-speed signals. This would reduce the number of cables used to connect apparatuses that transmit and receive high-speed signals such as image signals and low-speed signals such as voice signals.
To suppress skew and reflection distortions in the wiring connecting between a connector and a semiconductor device such as a transmission driver contained in each apparatus, not only the pin arrangement on the connector but also the wiring within the cable assembly must be determined by considering the pin arrangement on the semiconductor device so that the wire lines from the semiconductor device to the connector do not cross each other. Furthermore, in order to reduce the cost, it is desirable to use connectors with a minimum required number of contacts, and to design the wiring so that use of connectors of the same configuration are at both ends do not cause problems.
Consider, for example, the case where semiconductor devices 10 and 12 having pin arrangements with pins to be interconnected being arranged facing each other, as shown in Figure 1, are mounted on circuit boards 14 and 16 within different apparatuses. In this case, for the wiring within the cable assembly or the pin arrangements on the connectors, the wiring within the cable assembly 18 or the pin arrangements on the connectors 20 and 22, shown in Figure 2, can be considered first. According to the illustration, skew and reflection distortions can be held low, because the wire lines between the Semiconductor device 10 and the connector 20 and the wire lines between the semiconductor device 12 and the connector 22 can be arranged
so that the wire lines are parallel to each other with no single line crossing any of the other lines.
In the example of Figure 2, the cable assembly 18 contains signal lines 26 for a low-speed voice signal and power supply lines 28 in addition to the signal lines 24 used for the transmission of high-speed signals between the semiconductor devices 10 and 12.
Problems to be Solved by the Invention In the arrangements of Figure 2, the connectors 20 and 22 are mounted facing each other, and the pin numbering sequence is reversed between the connectors 20 and 22 such that the pin located at the uppermost position on the connector 20 is pin #1 whereas the pin located at the lowermost position on the connector 20 is pin #1-. This leads to the problem that signal transmission becomes impossible if the connector 20 is plugged into the board 16 and the connector 22 into the board 14. One method to address this problem is to provide each connector with a marking for preventing such reverse connection, but this method still cannot completely eliminate the possibility of erroneous connection. Another method is to vary the connector configuration or the number of conductors between the connectors at both ends of the cable to physically prevent erroneous connection, but this involves higher costs than when using identical connectors at both ends. If the signal lines are arranged symmetrically between the upper and lower halves, as shown in Figure 3, the wire lines can be arranged such that the wire to each semiconductor device do not cross each other, and yet the arrangement allows reverse connection without causing any appreciable problem. However, a situation can arise where signal lines having optimum electrical characteristics for the respective signals cannot be used for the intended signals, as shown in the example of Figure 3 in which a voice signal is assigned to a high-speed signal transmission signal line. Further, if there is an odd number of signal lines, a dummy signal line has to be added to effect the up/down symmetric arrangement. This greatly reduces the freedom in the signal line arrangement, posing a design constraint. It is accordingly an object of the present invention to realize a low cost cable assembly that permits reverse connection and provides great freedom in design, using a cable containing signal lines differing in electrical characteristics.
Means for Solving the Problems The present invention provides a cable assembly comprising a cable containing signal lines differing in electrical characteristics, and first and second connectors provided at both ends of the cable and each having a plurality of contacts, wherein a plurality of signal lines having substantially the same electrical characteristics are connected in sequence but in reverse order to a plurality of contacts on the second connector respectively located at positions corresponding to the plurality of contacts on the first connector to which the plurality of signal lines are connected. By connecting the plurality of signal lines to the connecting positions on the second connector corresponding to their connecting positions on the first connector, signals can be transmitted properly even if the connectors are connected reversely. Furthermore, since the signal lines are connected in the reverse order, the wire lines to the semiconductor devices having pin arrangements with the pins to be interconnected facing each other are prevented from crossing each other.
Embodiments of the Invention Figure 4 is a diagram illustrating the wiring within a cable assembly 30 according to one embodiment of the present invention. In Figure 4, as in the examples of Figures 2 and 3, the uppermost pin on the connector 32 is pin #1 and the lowermost pin on the connector 34 is pin #1. High-speed differential signals DATA 1 to 5 are assigned to pins #1 to #10 on the connectors 32 and 34 with the pin assignments reversed on the connector 34. With such pin assignments, the pins on each connector are in the order of DATA 1+, DATA 1-, DATA 2+, DATA 5- from top to bottom, so that the wire lines connecting to the semiconductor devices can be made identical in length with each line not crossing any of the other lines and skew and reflection distortions can thus be suppressed. On the other hand, Since VOICE GND and VOICE are connected to pin #12 and pin #11, respectively, on both connectors, their arrangement order as viewed from top to bottom is reversed between the connectors 32 and 34 in Figure 4; this does not present a problem since the voice signal is not a high-speed signal.
Figure 5 is a diagram illustrating the wiring within the cable assembly 30, showing the pin assignments on both connectors with pin #1 located at the top,
irrespective of their positional relations on the respective circuit boards. According to Figure 5, it will become more apparent that the signals DATA 1 to 5 are assigned to the corresponding positions on the connectors in reverse order to each other.
Figure 6 is a perspective view showing a second example of a cable assembly to which the present invention is applied. Connectors 40 and 42 are identical in configuration and each connector-has 26 contacts #1 to #26.
Figure 7 is a diagram showing connections between the wire lines within the cable assembly 44 of Figure 6 and receptacles 46 and 48 provided on the respective boards. Differential signal outputs TxO to Tx4 on the receptacle 46 are connected to differential signal inputs RxO to Rx5 on the receptacle 48 by five twin axial (twinax) cables with a characteristic impedance of 100 Ω, the twinax cables each consisting of a twisted-pair wire surrounded by a shield. Differential signal terminals USB are connected together by a twinax cable with a characteristic impedance of 90 Ω. Low- speed signals CTRL 1 to 4 and DATA 1 to 4 are interconnected by individual wires. The twinax cable with a characteristic impedance of 100 Ω, the twinax cable with a characteristic impedance of 90 Ω, and the individual wires are all housed within the cable 45 shown in Figure 6.
Figure 8 is a diagram illustrating the wiring within the cable assembly 44, showing the pin assignments on both connectors with pin #1 located at the top, irrespective of their positional relations on the respective circuit boards.
Figure 9 is a diagram showing the wiring within the cable assembly 30 classified by signal type. As can be seen from Figures 8 and 9, differential signals LVDS are assigned to the corresponding positions on the connectors in reverse order to each other.
Brief Description of the Drawings
Figure 1 is a diagram showing an example of pin arrangements on semiconductor devices.
Figure 2 is a diagram showing an example of the wiring within a cable assembly according to the prior art, accounting for the pin arrangements on the semiconductor devices.
Figure 3 is a diagram illustrating the wiring within a cable assembly based on the idea of assigning signals symmetrically between the upper and lower halves.
Figure 4 is a diagram illustrating the wiring within a cable assembly according to one embodiment of the present invention.
Figure 5 is a diagram illustrating the wiring of Figure 4 with pin #1 on both connectors shown at the top. Figure 6 is a perspective view of the cable assembly according to the present invention.
Figure 7 is a diagram showing connections between the wire lines within the cable assembly of Figure 6 and receptacles on circuit boards.
Figure 8 is a diagram illustrating the wiring within the cable assembly of Figure 7 with pin #1 on both connectors shown at the top.
Figure 9 is a diagram showing the wiring within the cable assembly classified by signal type.
DESCRIPTION OF THE REFERENCE NUMERALS 10, 12 semiconductor device 18, 30, 44 cable assembly
20, 22, 32, 34, 40, 42 connector 46, 48 receptacle
Claims
CLAIMS:
Claim 1. A cable assembly comprising a cable containing signal lines having a variety of electric characteristics and first and second connectors each having multiple contacts, provided an both ends of the cable, wherein a plurality of signal lines among said signal lines within said cable having substantially identical electric characteristics are respectively connected to a plurality of contacts of said second connector, said contacts existing in positions corresponding to contacts of said first connector that are connected to said plurality of signal lines, in order of connection reverse to the order of connection to said first connector.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15736898A JPH11353953A (en) | 1998-06-05 | 1998-06-05 | Cable assembly |
JP15736898 | 1998-06-05 | ||
PCT/US1999/011293 WO1999063631A1 (en) | 1998-06-05 | 1999-05-21 | Cable assembly |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1084525A1 true EP1084525A1 (en) | 2001-03-21 |
Family
ID=15648134
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP99924429A Withdrawn EP1084525A1 (en) | 1998-06-05 | 1999-05-21 | Cable assembly |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1084525A1 (en) |
JP (1) | JPH11353953A (en) |
WO (1) | WO1999063631A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004222904A (en) * | 2003-01-22 | 2004-08-12 | Daiman:Kk | Game machine |
JP5159136B2 (en) | 2007-03-28 | 2013-03-06 | 株式会社東芝 | Electronics |
EP2061121B1 (en) * | 2007-11-13 | 2010-01-06 | Tyco Electronics Belgium EC N.V. | Shielded USB connector system |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4954101A (en) * | 1989-07-06 | 1990-09-04 | Neal Nelson | Improved cable for coupling between data terminals and data sets |
US5387110A (en) * | 1993-11-12 | 1995-02-07 | International Business Machines Corporation | Reversible dual media adapter cable |
US5719933A (en) * | 1994-02-18 | 1998-02-17 | Welch; Richard | Wiring arrangement for a communication interconnection system |
-
1998
- 1998-06-05 JP JP15736898A patent/JPH11353953A/en active Pending
-
1999
- 1999-05-21 EP EP99924429A patent/EP1084525A1/en not_active Withdrawn
- 1999-05-21 WO PCT/US1999/011293 patent/WO1999063631A1/en not_active Application Discontinuation
Non-Patent Citations (1)
Title |
---|
See references of WO9963631A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO1999063631A1 (en) | 1999-12-09 |
JPH11353953A (en) | 1999-12-24 |
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Legal Events
Date | Code | Title | Description |
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PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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17P | Request for examination filed |
Effective date: 20001123 |
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AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB |
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17Q | First examination report despatched |
Effective date: 20020418 |
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
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18D | Application deemed to be withdrawn |
Effective date: 20020829 |