EP1005703A1 - Method for producing electrically conductive cross connections between two layers of wiring on a substrate - Google Patents

Method for producing electrically conductive cross connections between two layers of wiring on a substrate

Info

Publication number
EP1005703A1
EP1005703A1 EP98951303A EP98951303A EP1005703A1 EP 1005703 A1 EP1005703 A1 EP 1005703A1 EP 98951303 A EP98951303 A EP 98951303A EP 98951303 A EP98951303 A EP 98951303A EP 1005703 A1 EP1005703 A1 EP 1005703A1
Authority
EP
European Patent Office
Prior art keywords
substrate
teeth
metallization
connections
injection molding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98951303A
Other languages
German (de)
French (fr)
Inventor
Marcel Heerman
Jozef Van Puymbroeck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens NV SA
Original Assignee
Siemens NV SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens NV SA filed Critical Siemens NV SA
Publication of EP1005703A1 publication Critical patent/EP1005703A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29L—INDEXING SCHEME ASSOCIATED WITH SUBCLASS B29C, RELATING TO PARTICULAR ARTICLES
    • B29L2031/00—Other particular articles
    • B29L2031/34—Electrical apparatus, e.g. sparking plugs or parts thereof
    • B29L2031/3493—Moulded interconnect devices, i.e. moulded articles provided with integrated circuit traces
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    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0284—Details of three-dimensional rigid printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09045—Locally raised area or protrusion of insulating substrate
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H—ELECTRICITY
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
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    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/045—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by making a conductive layer having a relief pattern, followed by abrading of the raised portions
    • H—ELECTRICITY
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    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
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Definitions

  • Integrated circuits are getting more and more connections and are being miniaturized more and more.
  • the difficulties with solder paste application and assembly expected with this increasing miniaturization are to be remedied by new housing shapes, in particular single, Few or multi-chip modules in the ball grid array package to be emphasized here (DE-Z productronic 5, 1994, Pages 54, 55).
  • These modules are based on a plated-through substrate on which the chips are contacted, for example, via contact wires or by means of flip chip assembly.
  • BGA Ball Grid Array
  • the ball grid array comprises solder bumps which are arranged flat on the underside of the substrate and which are surface mounted on the printed circuit boards or
  • MID Mpulded Interconnection Devices
  • injection molded parts with integrated conductor tracks are used instead of conventional printed circuits.
  • High-quality thermoplastics that are suitable for injection molding three-dimensional substrates are the basis of this technology.
  • Thermoplastics of this type are distinguished from conventional substrate materials for printed circuits by better mechanical, chemical, electrical and environmental properties.
  • the housing support function takes over guides and snap connections at the same time, while the metallization layer serves not only as a wiring and connection function but also as an electromagnetic shield and ensures good heat dissipation.
  • the metallization layer serves not only as a wiring and connection function but also as an electromagnetic shield and ensures good heat dissipation.
  • corresponding through holes are already produced during injection molding.
  • the inner walls of these via holes are then also coated with a metal layer when the injection molded parts are metallized. Further details on the production of three-dimensional injection molded parts with integrated conductor tracks can be found, for example, in DE-A-37 32 249 or DE-A-0 361 192.
  • a first conductor level, a dielectric layer and a second conductor level are successively produced on a substrate produced by injection molding and provided with a recess, followed by an electronic one in the recess
  • the component is introduced, the connections of the component with associated connection surfaces on the substrate are connected in an electrically conductive manner, preferably by bonding, and then an encapsulation for the component is formed by filling the trough with plastic.
  • the result is a compact, thin structure with a high wiring density.
  • the sunken assembly and encapsulation of components in recesses of the injection-molded substrate in addition to the reduction in thickness, provide optimal protection of the component and its connection wiring.
  • PSGA polymer stud grid array
  • BGA ball grid array
  • the new design which is suitable for single, Few or multi-chip modules, comprises an injection-molded, three-dimensional substrate made of an electrically insulating polymer, - polymer bumps arranged flat on the underside of the substrate and molded during injection molding, formed on the polymer bumps by a solderable end surface External connections, at least on the underside of the substrate, conductors which connect the external connections to internal connections, and at least one chip arranged on the substrate, the connections of which are electrically conductively connected to the internal connections.
  • the production of the external connections on the polymer bumps can also be carried out with minimal effort together with the production of the conductor tracks which is customary in the MID technology or the SIL technology. Thanks to the laser fine structuring preferred for SIL technology, the external connections on the polymer bumps with high numbers of connections can be realized in a very fine grid. It should also be emphasized that the temperature expansion of the polymer bumps corresponds to the temperature expansion of the substrate and the circuit board accommodating the module. Should mechanical stresses occur, the polymer bumps allow at least partial compensation due to their elastic properties.
  • the polymer bumps and the chip or chips are usually arranged on the same side of the substrate.
  • the polymer bumps and the chip or the chips can also be arranged on different sides of the substrate. Such an arrangement of polymer bumps and chips on opposite sides of the substrate is of particular interest in the case of large chips which require a large number of assigned external connections.
  • WO-A-89 00346 discloses single-chip modules suitable for surface mounting, which are based on an injection-molded three-dimensional substrate with via holes.
  • the substrate during injection molding receives a trough arranged centrally on the upper side and a multiplicity of polymer bumps arranged in one or also in two peripheral rows on the underside.
  • the chip arranged on the upper side in the trough is connected to associated conductor tracks leading outward in strips in the form of fine contact wires. These conductor tracks are then electrically conductively connected to the assigned, surface-metallized polymer bumps via vias arranged in the outer region.
  • edge regions of the substrate are then cut off with intersecting lines passing through the plated-through holes, then electrically conductive cross-connections with a semicircular cross-section are created which electrically conductively connect the outer ends of the conductor tracks arranged on the surface of the substrate with the associated polymer bumps arranged on the underside of the substrate.
  • the invention specified in claim 1 is based on the problem in which MID technology is used to produce electrically conductive cross connections between two wiring layers on the top and the bottom of an injection-molded simplify its substrate.
  • the cross connections should be particularly suitable for the polymer stud grid arrays explained above.
  • the advantages achieved with the invention are, in particular, that, compared to the conventional through-plating technology with metallized holes, much finer structures with a higher reliability of the cross connections can be realized.
  • the open toothing of the substrates can be metallized with a very good layer thickness distribution.
  • the structuring of the metallization in the individual cross-connections by at least partially removing the metallization in the area of the teeth requires only little effort.
  • the development according to claim 2 enables a particularly fine structuring of the teeth in injection molding.
  • the embodiment according to claim 3 enables the use of the cross connections according to the invention in polymer stud grid arrays. It should be emphasized that the teeth and the polymer bumps or polymer studs are produced in the same operation during injection molding.
  • the embodiment according to claim 4 has the advantage that, when applying the metallization, it is possible to use technologies which have proven themselves in the manufacture of printed circuits for a long time.
  • the method according to the invention can in principle also be carried out using semi-additive technology, the sub- trepttechnik according to claim 5 several advantages.
  • the possibility of fine laser structuring should be emphasized here in particular, which enables the creation of the finest structures even with three-dimensional substrates without the need for complex conventional photolithography.
  • the etching resist layer can be applied in a simple manner by the electrodeposition of tin or tin-lead and then structured by processing with the laser beam.
  • the inventive method is particularly suitable for the production of a polymer stud grid array with a chip arranged on the top of the substrate.
  • the arrangement of the chip on the top and the arrangement of the bumps or polymer studs on the underside of the substrate result in ideal conditions for the implementation of so-called chip scale packages, in which the dimensions of the array essentially match the dimensions of the chip.
  • FIG. 1 shows a partial top view of a substrate with integrally molded teeth in the outer end area
  • FIG. 2 shows a three-dimensional representation of the teeth according to FIG. 1
  • FIG. 3 shows a partial top view of a substrate with integrally molded teeth in the region of a recess in the substrate
  • FIG. 4 shows the partial top view of the substrate according to FIG. 1 after the application of a metallization and an etching resist
  • FIG. 5 shows the partial top view of a substrate according to FIG. 4 after the laser structuring
  • FIG. 6 shows a partial top view of the substrate according to FIG. 4 after the teeth have been ground to form cross-connections
  • FIG. 7 shows a side view of the substrate designed as a polymer stud grid array.
  • a substrate S is assumed which has a plurality of teeth Z which are arranged at a uniform distance from one another in the outer end region.
  • the substrate including the teeth Z and the cusps H to be explained later with reference to FIG. 7, is produced by injection molding, with high-temperature-resistant thermoplastics such as polyetherimide, polyether sulfone or polyamide being suitable as substrate materials.
  • the three-dimensional representation according to FIG. 2 shows that the teeth Z are designed in the form of a wave profile with a flat base area and extend between the upper side 0 and the lower side U of the substrate S.
  • top 0 and bottom U are formed parallel to one another, ie all teeth Z, which of course can also be integrally formed on the other three end faces of substrate S, are of equal length.
  • FIG. 3 shows that the teeth Z can in principle also be integrally formed on the end faces of the recess A in the region of a recess A of the substrate S.
  • other shapes such as circular shapes or slot-like shapes, may also be suitable.
  • the substrate S produced by injection molding is first subjected to a series of customary pretreatments, in particular pickling, cleaning, seeding and activating the seeding. Then, according to FIG.
  • a metallization M is applied to the entire surface of the substrate S by chemical copper deposition without external current and subsequent galvanic copper deposition.
  • An etching resist AR is then applied to the metallization M by electroless or electrodeposition of tin. Since only the end region of the substrate with teeth Z of interest here is shown in FIG. 4, it must be pointed out that both the metallization M and the etching resist AR cover the entire substrate S over the entire surface.
  • the structuring of the metallization M on the upper side 0 and the lower side U (compare FIG. 2) of the substrate S takes place in accordance with FIG. 5.
  • the etching resist AR is removed again by means of laser radiation. Further details of such a laser structuring can be found, for example, in DE-A-37 32 249.
  • the unprotected areas of the metallization M are then removed by etching up to the surface of the substrate S. It can be seen from FIG. 5 that this structuring process produces conductor tracks L on both sides of the substrate S, each of which extends in the region between two teeth Z towards the edge of the substrate S.
  • the dividing line T shown in FIG. 5 only serves to distinguish the surface metallization M with the conductor tracks L and the end metallization M. In fact, however, the metallization M extends over the substrate S without any separation.
  • FIG. 7 shows a side view of the substrate S with conductor tracks L, cross connections Q and with the bumps H already mentioned, which are arranged flat on the underside U.
  • a chip C is applied to the top side 0 of the substrate S, the contacting of which takes place either in the wire-bond technology shown on the left with bonding wires B or in the flip-chip technology shown on the right with connections A.
  • the chip C is connected to the top side 0 of the substrate S via an adhesive layer K.
  • Chips C are electrically conductively connected to associated bumps H via conductor tracks L on the top 0, via end-side cross connections Q and via conductor tracks L on the bottom U.
  • a solderable end surface E is applied to the underside of the metallized bumps H, which is formed, for example, by a layer sequence of nickel and gold.
  • FIG. 7 The structure shown in FIG. 7 is a polymer stud grid array, which is designated overall by PSGA. Further details of such polymer stud grid arrays can be found, for example, in WO-A-96 09646.
  • the external dimensions of chip C and substrate S are approximately the same size. It is therefore a form of housing, which is usually referred to as a chip scale package. It can also be clearly seen that the cross-connections Q on the end face with their high structural fineness enable an extremely compact design of the entire polymer stud grid array PSGA and thus play a decisive part in the implementation of the chip scale package.

Abstract

According to the invention, teeth (Z) are incorporated into a three-dimensional, injection-moulded substrate (S) during the injection moulding process, said teeth being located in the outer edge area and/or in the area of a recess. A metallic coating (M) is then applied to the substrate (S). Extremely finely structured electrically conductive cross connections are produced when said metal coating (M) is removed in the area of the teeth (Z), especially after the teeth (Z) have been ground down or cut off.

Description

Beschreibungdescription
Verfahren zur Herstellung von elektrisch leitenden Querverbindungen zwischen zwei Verdrahtungslagen auf einem SubstratProcess for producing electrically conductive cross connections between two wiring layers on a substrate
Integrierte Schaltkreise bekommen immer höhere Anschlußzahlen und werden dabei immer weiter miniaturisiert. Die bei dieser zunehmenden Miniaturisierung erwarteten Schwierigkeiten mit Lotpastenauftrag und Bestückung sollen durch neue Gehäusefor- men behoben werden, wobei hier insbesondere Single-, Few- oder Multi-Chip-Module im Ball Grid Array Package hervorzuheben sind (DE-Z productronic 5, 1994, Seiten 54, 55) . Diese Module basieren auf einem durchkontaktierten Substrat, auf welchem die Chips beispielsweise über Kontaktierdrähte oder mittels Flipchip-Montage kontaktiert sind. An der Unterseite des Substrats befindet sich das Ball Grid Array (BGA) , das häufig auch als Solder Grid Array, Land Grid Array oder Solder Bump Array bezeichnet wird. Das Ball Grid Array umfaßt auf der Unterseite des Substrats flächig angeordnete Lothök- ker, die eine Oberflächenmontage auf den Leiterplatten oderIntegrated circuits are getting more and more connections and are being miniaturized more and more. The difficulties with solder paste application and assembly expected with this increasing miniaturization are to be remedied by new housing shapes, in particular single, Few or multi-chip modules in the ball grid array package to be emphasized here (DE-Z productronic 5, 1994, Pages 54, 55). These modules are based on a plated-through substrate on which the chips are contacted, for example, via contact wires or by means of flip chip assembly. On the underside of the substrate is the Ball Grid Array (BGA), which is often referred to as a Solder Grid Array, Land Grid Array or Solder Bump Array. The ball grid array comprises solder bumps which are arranged flat on the underside of the substrate and which are surface mounted on the printed circuit boards or
Baugruppen ermöglichen. Durch die flächige Anordnung der Lothöcker können hohe Anschlußzahlen in einem groben Raster von beispielsweise 1,27 mm realisiert werden.Enable assemblies. Due to the flat arrangement of the solder bumps, large numbers of connections can be realized in a coarse grid of, for example, 1.27 mm.
Bei der sog. MID-Technologie (MID = Mpulded Jnterconnection Devices) werden anstelle konventioneller gedruckter Schaltungen Spritzgießteile mit integrierten Leiterzügen verwendet. Hochwertige Thermoplaste, die sich zum Spritzgießen von dreidimensionalen Substraten eignen, sind die Basis dieser Tech- nologie. Derartige Thermoplaste zeichnen sich gegenüber herkömmlichen Substratmaterialien für gedruckte Schaltungen durch bessere mechanische, chemische, elektrische und umweit- technische Eigenschaften aus. Bei einer speziellen Richtung der MID-Technologie, der sog. SIL-Technik (SIL = ≤pitzgieß- teile mit integrierten Leiterzügen) , erfolgt die Strukturierung einer auf die Spritzgießteile aufgebrachten Metall- schicht unter Verzicht auf die sonst übliche Maskentechnik durch ein spezielles Laserstrukturierungsverfahren. In die dreidimensionalen Spritzgießteile mit strukturierter Metallisierung sind dabei mehrere mechanische und elektrische Funktionen integrierbar. Die Gehäuseträgerfunktion übernimmt gleichzeitig Führungen und Schnappverbindungen, während die Metallisierungsschicht neben der Verdrahtungs- und Verbindungsfunktion auch als elektromagnetische Abschirmung dient und für eine gute Wärmeabfuhr sorgt. Zur Herstellung von elektrisch leitenden Querverbindungen zwischen zwei Verdrah- tungsanlagen auf einander gegenüberliegenden Oberflächen der Spritzgußteile werden bereits beim Spritzgießen entsprechende Durchkontaktierungslöcher erzeugt. Die Innenwandungen dieser Durchkontaktierungslöcher werden dann beim Metallisieren der Spritzgießteile ebenfalls mit einer Metallschicht überzogen. Weitere Einzelheiten zur Herstellung von dreidimensionalen Spritzgießteilen mit integrierten Leiterzügen gehen beispielsweise aus der DE-A-37 32 249 oder der DE-A-0 361 192 hervor .With the so-called MID technology (MID = Mpulded Interconnection Devices), injection molded parts with integrated conductor tracks are used instead of conventional printed circuits. High-quality thermoplastics that are suitable for injection molding three-dimensional substrates are the basis of this technology. Thermoplastics of this type are distinguished from conventional substrate materials for printed circuits by better mechanical, chemical, electrical and environmental properties. In a special direction of MID technology, the so-called SIL technology (SIL = ≤pitzgieß-teile with integrated conductor tracks), the structuring of a metal layer applied to the injection molded parts takes place without the usual masking technique through a special laser structuring process. Several mechanical and electrical functions can be integrated into the three-dimensional injection molded parts with structured metallization. The housing support function takes over guides and snap connections at the same time, while the metallization layer serves not only as a wiring and connection function but also as an electromagnetic shield and ensures good heat dissipation. For the production of electrically conductive cross connections between two wiring systems on opposite surfaces of the injection molded parts, corresponding through holes are already produced during injection molding. The inner walls of these via holes are then also coated with a metal layer when the injection molded parts are metallized. Further details on the production of three-dimensional injection molded parts with integrated conductor tracks can be found, for example, in DE-A-37 32 249 or DE-A-0 361 192.
Gemäß einer aus der EP-A-0 645 953 bekannten Variante der MID-Technologie werden auf einem durch Spritzgießen hergestellten und mit einer Mulde versehenen Substrat nacheinander eine erste Leiterebene, eine Dielektrikumschicht und eine zweite Leiterebene erzeugt, worauf in die Mulde ein elektro- nisches Bauelement eingebracht wird, die Anschlüsse des Bauelements mit zugeordneten Anschlußflächen auf dem Substrat vorzugsweise durch Bonden elektrisch leitend verbunden werden und dann durch Füllen der Mulde mit Kunststoff eine Verkapse- lung für das Bauelement gebildet wird. Es entsteht ein kom- pakter, dünner Aufbau mit einer hohen Verdrahtungsdichte.According to a variant of MID technology known from EP-A-0 645 953, a first conductor level, a dielectric layer and a second conductor level are successively produced on a substrate produced by injection molding and provided with a recess, followed by an electronic one in the recess The component is introduced, the connections of the component with associated connection surfaces on the substrate are connected in an electrically conductive manner, preferably by bonding, and then an encapsulation for the component is formed by filling the trough with plastic. The result is a compact, thin structure with a high wiring density.
Durch die versunkene Montage und Verkapselung von Bauelementen in Mulden des spritzgegossenen Substrats wird neben der Dickenreduzierung ein optimaler Schutz von Bauelement und dessen Anschlußverdrahtung erzielt.The sunken assembly and encapsulation of components in recesses of the injection-molded substrate, in addition to the reduction in thickness, provide optimal protection of the component and its connection wiring.
Aus der WO-A-96 096 46 ist ein sog. Polymer Stud Grid Array (PSGA) bekannt, welches die Vorteile eines Ball Grid Arrays (BGA) mit den Vorteilen der MID-Technologie vereinigt. Die Bezeichnung der neuen Bauform als Polymer Stud Grid Array (PSGA) erfolgte dabei in Anlehnung an das Ball Grid Array (BGA) , wobei der Begriff "Polymer Stud" auf beim Spritzgießen des Substrats mitgeformte Polymerhöcker hinweisen soll. Die neue für Single-, Few- oder Multi-Chip-Module geeignete Bauform umfaßt ein spritzgegossenes, dreidimensionales Substrat aus einem elektrisch isolierenden Polymer, - auf der Unterseite des Substrats flächig angeordnete und beim Spritzgießen mitgeformte Polymerhöcker, auf den Polymerhöckern durch eine lötbare Endoberfläche gebildete Außenanschlüsse, zumindest auf der Unterseite des Substrats ausgebildete Leiterzüge, die die Außenanschlüsse mit Innenanschlüssen verbinden, und mindestens einen auf dem Substrat angeordneten Chip, dessen Anschlüsse mit den Innenanschlüssen elektrisch leitend verbunden sind.A so-called polymer stud grid array (PSGA) is known from WO-A-96 096 46, which has the advantages of a ball grid array (BGA) combined with the advantages of MID technology. The designation of the new design as the Polymer Stud Grid Array (PSGA) was based on the Ball Grid Array (BGA), whereby the term "polymer stud" is intended to refer to polymer bumps formed during the injection molding of the substrate. The new design, which is suitable for single, Few or multi-chip modules, comprises an injection-molded, three-dimensional substrate made of an electrically insulating polymer, - polymer bumps arranged flat on the underside of the substrate and molded during injection molding, formed on the polymer bumps by a solderable end surface External connections, at least on the underside of the substrate, conductors which connect the external connections to internal connections, and at least one chip arranged on the substrate, the connections of which are electrically conductively connected to the internal connections.
Neben der einfachen und kostengünstigen Herstellung der Polymerhöcker beim Spritzgießen des Substrats kann auch die Herstellung der Außenanschlüsse auf den Polymerhöckern mit minimalem Aufwand zusammen mit der bei der MID-Technologie bzw. der SIL-Technik üblichen Herstellung der Leiterzüge vorgenommen werden. Durch die bei der SIL-Technik bevorzugte Laser- feinstrukturierung können die Außenanschlüsse auf den Polymerhöckern mit hohen Anschlußzahlen in einem sehr feinen Raster realisiert werden. Hervorzuheben ist ferner, daß die Temperaturausdehnung der Polymerhöcker den Temperaturausdehnungen des Substrats und der das Modul aufnehmenden Leiterplatte entspricht. Sollten mechanische Spannungen auftreten, so ermöglichen die Polymerhöcker durch ihre elastischen Eigenschaften zumindest einen teilweisen Ausgleich. Durch die Formstabilität der auf den Polymerhöckern gebildeten Außenanschlüsse kann auch die Sicherheit bei Reparatur und Austausch gegenüber den Ball Grid Arrays mit ihren durch Lothöcker ge- bildeten Anschlüssen erheblich gesteigert werden. Bei dem Polymer Stud Grid Array sind die Polymerhöcker und der Chip oder die Chips üblicherweise auf der gleichen Seite des Substrats angeordnet. Bei einem mit Durchkontaktierungen ver- sehenen Substrat können die Polymerhöcker und der Chip oder die Chips durchaus auch auf verschiedenen Seiten des Substrats angeordnet sein. Eine derartige Anordnung von Polymerhöckern und Chips auf gegenüberliegenden Seiten des Substrats ist insbesondere bei großen Chips, die eine Viel- zahl von zugeordneten Außenanschlüssen benötigen, interessant .In addition to the simple and cost-effective production of the polymer bumps during injection molding of the substrate, the production of the external connections on the polymer bumps can also be carried out with minimal effort together with the production of the conductor tracks which is customary in the MID technology or the SIL technology. Thanks to the laser fine structuring preferred for SIL technology, the external connections on the polymer bumps with high numbers of connections can be realized in a very fine grid. It should also be emphasized that the temperature expansion of the polymer bumps corresponds to the temperature expansion of the substrate and the circuit board accommodating the module. Should mechanical stresses occur, the polymer bumps allow at least partial compensation due to their elastic properties. Due to the dimensional stability of the external connections formed on the polymer bumps, security during repair and replacement can also be compared to the ball grid arrays with their solder bumps. formed connections can be increased significantly. In the polymer stud grid array, the polymer bumps and the chip or chips are usually arranged on the same side of the substrate. In the case of a substrate provided with vias, the polymer bumps and the chip or the chips can also be arranged on different sides of the substrate. Such an arrangement of polymer bumps and chips on opposite sides of the substrate is of particular interest in the case of large chips which require a large number of assigned external connections.
Aus der WO-A-89 00346 sind für die Oberflächenmontage geeignete Single-Chip-Module bekannt, die auf einem spritzgegosse- nen dreidimensionalen Substrat mit Durchkontaktierungslöchern basieren. Neben diesen Durchkontaktierungslöchern erhält das Substrat beim Spritzgießen eine zentral auf der Oberseite angeordnete Mulde und eine Vielzahl von in ein oder auch in zwei peripheren Reihen auf der Unterseite angeordneten Poly- merhöckern. Der auf der Oberseite in der Mulde angeordnete Chip wird über feine Kontaktierdrähte mit zugeordneten, streifenförmig nach außen führenden Leiterbahnen verbunden. Diese Leiterbahnen sind dann über im äußeren Bereich angeordneten Durchkontaktierungen mit den zugeordneten, oberfläch- lieh metallisierten Polymerhöckern elektrisch leitend verbunden. Werden dann die Randbereiche des Substrats mit mittig durch die Durchkontaktierungslöcher gehenden Schnittlinien abgetrennt, so entstehen elektrisch leitende Querverbindungen mit halbrundem Querschnitt, welche die äußeren Enden der auf der Oberfläche des Substrats angeordneten Leiterbahnen mit den zugeordneten auf der Unterseite des Substrats angeordneten Polymerhöckern elektrisch leitend verbinden.WO-A-89 00346 discloses single-chip modules suitable for surface mounting, which are based on an injection-molded three-dimensional substrate with via holes. In addition to these plated-through holes, the substrate during injection molding receives a trough arranged centrally on the upper side and a multiplicity of polymer bumps arranged in one or also in two peripheral rows on the underside. The chip arranged on the upper side in the trough is connected to associated conductor tracks leading outward in strips in the form of fine contact wires. These conductor tracks are then electrically conductively connected to the assigned, surface-metallized polymer bumps via vias arranged in the outer region. If the edge regions of the substrate are then cut off with intersecting lines passing through the plated-through holes, then electrically conductive cross-connections with a semicircular cross-section are created which electrically conductively connect the outer ends of the conductor tracks arranged on the surface of the substrate with the associated polymer bumps arranged on the underside of the substrate.
Der im Anspruch 1 angegebenen Erfindung liegt das Problem zu- gründe, bei der MID-Technologie die Herstellung von elektrisch leitenden Querverbindungen zwischen zwei Verdrahtungs- lagen auf der Oberseite und der Unterseite eines spritzgegos- senen Substrats zu vereinfachen. Die Querverbindungen sollen dabei insbesondere auch für die vorstehend erläuterten Polymer Stud Grid Arrays geeignet sein.The invention specified in claim 1 is based on the problem in which MID technology is used to produce electrically conductive cross connections between two wiring layers on the top and the bottom of an injection-molded simplify its substrate. The cross connections should be particularly suitable for the polymer stud grid arrays explained above.
Die mit der Erfindung erzielten Vorteile bestehen insbesondere darin, daß gegenüber der konventionellen Durchkontaktie- rungstechnik mit metallisierten Löchern wesentlich feinere Strukturen mit einer höheren Zuverlässigkeit der Querverbindungen realisiert werden können. Die nach außen offene Ver- zahnung der Substrate kann im Gegensatz zu den Innenwandungen enger Durchkontaktierungslöcher mit einer sehr guten Schicht- dickenverteilung metallisiert werden. Die Strukturierung der Metallisierung in die einzelnen Querverbindungen durch zumindest teilweise Entfernung der Metallisierung im Bereich der Zähne erfordert dabei nur einen geringen Aufwand.The advantages achieved with the invention are, in particular, that, compared to the conventional through-plating technology with metallized holes, much finer structures with a higher reliability of the cross connections can be realized. In contrast to the inner walls of narrow plated-through holes, the open toothing of the substrates can be metallized with a very good layer thickness distribution. The structuring of the metallization in the individual cross-connections by at least partially removing the metallization in the area of the teeth requires only little effort.
Vorteilhafte Ausgestaltungen des erfindungsgemäßen Verfahrens sind in den Ansprüchen 2 bis 9 angegeben. Eine besonders vorteilhafte Anwendung des Verfahrens ist im Anspruch 10 angege- ben.Advantageous embodiments of the method according to the invention are specified in claims 2 to 9. A particularly advantageous application of the method is specified in claim 10.
Die Weiterbildung nach Anspruch 2 ermöglicht eine besonders feine Strukturierung der Zähne bei Spritzgießen.The development according to claim 2 enables a particularly fine structuring of the teeth in injection molding.
Die Ausgestaltung nach Anspruch 3 ermöglicht die Anwendung der erfindungsgemäßen Querverbindungen bei Polymer Stud Grid Arrays. Hervorzuheben ist dabei, daß die Zähne und die Polymerhöcker bzw. Polymerstuds im gleichen Arbeitsgang beim Spritzgießen erzeugt werden.The embodiment according to claim 3 enables the use of the cross connections according to the invention in polymer stud grid arrays. It should be emphasized that the teeth and the polymer bumps or polymer studs are produced in the same operation during injection molding.
Die Ausgestaltung nach Anspruch 4 hat den Vorteil, daß beim Aufbringen der Metallisierung auf Technologien zurückgegriffen werden kann, die sich bei der Herstellung gedruckter Schaltungen seit langer Zeit bewährt haben.The embodiment according to claim 4 has the advantage that, when applying the metallization, it is possible to use technologies which have proven themselves in the manufacture of printed circuits for a long time.
Obwohl das erfindungsgemäße Verfahren prinzipiell auch in Se- miadditivtechnik durchgeführt werden kann, bietet die Sub- traktivtechnik gemäß Anspruch 5 etliche Vorteile. Neben der einfachen und wirtschaftlichen Erzeugung der gewünschten Leitermuster ist hier insbesondere die Möglichkeit der Laser- feinstrukturierung hervorzuheben, die unter Verzicht auf die aufwendige konventionelle Photolithographie auch bei dreidimensionalen Substraten die Erzeugung feinster Strukturen ermöglicht. Gemäß Anspruch 6 kann die Ätzresistschicht hierbei auf einfache Weise durch die galvanische Abscheidung von Zinn oder Zinn-Blei aufgebracht und anschließend durch Bearbeitung mit dem Laserstrahl strukturiert werden.Although the method according to the invention can in principle also be carried out using semi-additive technology, the sub- traktivtechnik according to claim 5 several advantages. In addition to the simple and economical generation of the desired conductor pattern, the possibility of fine laser structuring should be emphasized here in particular, which enables the creation of the finest structures even with three-dimensional substrates without the need for complex conventional photolithography. According to claim 6, the etching resist layer can be applied in a simple manner by the electrodeposition of tin or tin-lead and then structured by processing with the laser beam.
Die Weiterbildung nach Anspruch 7 ermöglicht eine besonders einfache und zuverlässige mechanische Strukturierung der Metallisierung zur Erzeugung der Querverbindungen. Insbesondere kann diese mechanische Strukturierung im Bereich der Stirnseiten der Substrate gemäß Anspruch 8 durch Abschleifen oder, gemäß Anspruch 9, durch Abschneiden der Zähne besonders rasch und einfach durchgeführt werden.The development according to claim 7 enables a particularly simple and reliable mechanical structuring of the metallization to produce the cross connections. In particular, this mechanical structuring in the region of the end faces of the substrates can be carried out particularly quickly and easily by grinding or, according to claim 9, by cutting off the teeth.
Gemäß Anspruch 10 ist das erfindungsgemäße Verfahren insbesondere für die Herstellung eines Polymer Stud Grid Arrays mit einem auf der Oberseite des Substrats angeordneten Chip geeignet . Durch die Anordnung des Chips auf der Oberseite und durch die Anordnung der Höcker bzw. Polymer Studs auf der Un- terseite des Substrats ergeben sich hier ideale Voraussetzungen für die Realisierung von sog. Chip Scale Packages, bei welchen die Abmessungen des Arrays im wesentlichen den Abmessungen des Chips entsprechen.According to claim 10, the inventive method is particularly suitable for the production of a polymer stud grid array with a chip arranged on the top of the substrate. The arrangement of the chip on the top and the arrangement of the bumps or polymer studs on the underside of the substrate result in ideal conditions for the implementation of so-called chip scale packages, in which the dimensions of the array essentially match the dimensions of the chip.
Ein Ausführungsbeispiel der Erfindung ist in der Zeichnung dargestellt und wird im folgenden näher beschrieben. Es zeigenAn embodiment of the invention is shown in the drawing and will be described in more detail below. Show it
Figur 1 eine teilweise Draufsicht auf ein Substrat mit integral angeformten Zähnen im äußeren stirnseitigen Bereich,FIG. 1 shows a partial top view of a substrate with integrally molded teeth in the outer end area,
Figur 2 eine dreidimensionale Darstellung der Zähne gemäß Figur 1, Figur 3 eine teilweise Draufsicht auf ein Substrat mit integral angeformten Zähnen im Bereich einer Aussparung des Substrats,FIG. 2 shows a three-dimensional representation of the teeth according to FIG. 1, FIG. 3 shows a partial top view of a substrate with integrally molded teeth in the region of a recess in the substrate,
Figur 4 die teilweise Draufsicht auf das Substrat gemäß Fi- gur 1 nach dem Auftragen einer Metallisierung und eines Ätzresists,FIG. 4 shows the partial top view of the substrate according to FIG. 1 after the application of a metallization and an etching resist,
Figur 5 die teilweise Draufsicht auf ein Substrat gemäß Figur 4 nach der Laserstrukturierung,5 shows the partial top view of a substrate according to FIG. 4 after the laser structuring,
Figur 6 eine teilweise Draufsicht auf das Substrat gemäß Figur 4 nach dem Abschleifen der Zähne zur Bildung von Querverbindungen und6 shows a partial top view of the substrate according to FIG. 4 after the teeth have been ground to form cross-connections and
Figur 7 eine Seitenansicht des als Polymer Stud Grid Arrays ausgebildeten Substrats.FIG. 7 shows a side view of the substrate designed as a polymer stud grid array.
Gemäß Figur 1 wird von einem Substrat S ausgegangen, welches im äußeren stirnseitigen Bereich eine Vielzahl von im gleichmäßigen Abstand zueinander angeordneten Zähnen Z aufweist . Die Herstellung des Substrats einschließlich der Zähne Z und den später noch anhand der Figur 7 zu erläuternden Höcker H erfolgt durch Spritzgießen, wobei als Substratmaterialien hochtemperaturbeständige Thermoplaste wie Polyetherimid, Po- lyethersulfon oder Polyamid geeignet sind. Die dreidimensionale Darstellung gemäß Figur 2 zeigt, daß die Zähne Z in Form eines Wellenprofils mit ebener Grundfläche ausgebildet sind und sich zwischen der Oberseite 0 und der Unterseite U des Substrats S erstrecken. Im dargestellten Ausführungsbeispiel sind Oberseite 0 und Unterseite U parallel zueinander ausgebildet, d.h. sämtliche Zähne Z, die selbstverständlich auch an die anderen drei Stirnseiten des Substrats S integral an- geformt sein können, sind gleichlang. Figur 3 zeigt, daß die Zähne Z prinzipiell auch im Bereich einer Aussparung A des Substrats S integral an die Stirnflächen der Aussparung A angeformt sein können. Neben der hier dargestellten rechteck- förmigen Aussparung A können auch andere Formen, wie z.B. kreisrunde Formen oder langlochartige Formen geeignet sein. Das durch Spritzgießen hergestellte Substrat S wird zunächst einer Reihe von üblichen Vorbehandlungen unterzogen, insbesondere Beizen, Reinigen, Bekeimen und Aktivieren der Bekei- mung. Anschließend wird gemäß Figur 4 durch außenstromlose chemische Kupferabscheidung und nachfolgende galvanische Kup- ferabscheidung eine Metallisierung M ganzflächig auf das Substrat S aufgebracht . Danach wird durch stromlose oder auch durch galvanische Abscheidung von Zinn ein Ätzresist AR auf die Metallisierung M aufgebracht. Da in Figur 4 nur der hier interessante stirnseitige Bereich des Substrats mit Zähnen Z dargestellt ist, muß darauf hingewiesen werden, daß sowohl die Metallisierung M als auch das Ätzresist AR das gesamte Substrat S ganzflächig überziehen.According to FIG. 1, a substrate S is assumed which has a plurality of teeth Z which are arranged at a uniform distance from one another in the outer end region. The substrate, including the teeth Z and the cusps H to be explained later with reference to FIG. 7, is produced by injection molding, with high-temperature-resistant thermoplastics such as polyetherimide, polyether sulfone or polyamide being suitable as substrate materials. The three-dimensional representation according to FIG. 2 shows that the teeth Z are designed in the form of a wave profile with a flat base area and extend between the upper side 0 and the lower side U of the substrate S. In the exemplary embodiment shown, top 0 and bottom U are formed parallel to one another, ie all teeth Z, which of course can also be integrally formed on the other three end faces of substrate S, are of equal length. FIG. 3 shows that the teeth Z can in principle also be integrally formed on the end faces of the recess A in the region of a recess A of the substrate S. In addition to the rectangular cutout A shown here, other shapes, such as circular shapes or slot-like shapes, may also be suitable. The substrate S produced by injection molding is first subjected to a series of customary pretreatments, in particular pickling, cleaning, seeding and activating the seeding. Then, according to FIG. 4, a metallization M is applied to the entire surface of the substrate S by chemical copper deposition without external current and subsequent galvanic copper deposition. An etching resist AR is then applied to the metallization M by electroless or electrodeposition of tin. Since only the end region of the substrate with teeth Z of interest here is shown in FIG. 4, it must be pointed out that both the metallization M and the etching resist AR cover the entire substrate S over the entire surface.
Nach dem Aufbringen des Ätzresists AR erfolgt gemäß Figur 5 die Strukturierung der Metallisierung M auf der Oberseite 0 und der Unterseite U (vergleiche Figur 2) des Substrats S. Im hier dargestellten Ausführungsbeispiel wird in sämtlichen Bereichen, die nicht dem gewünschten Leitermuster der zu bil- denden Verdrahtungslagen entsprechen, das Ätzresist AR mittels Laserstrahlung wieder entfernt. Weitere Einzelheiten einer derartigen Laserstrukturierung gehen beispielsweise aus der DE-A-37 32 249 hervor. Anschließend werden die nicht geschützten Bereiche der Metallisierung M durch Ätzen bis zur Oberfläche des Substrats S abgetragen. Aus Figur 5 ist ersichtlich, daß mit diesem Strukturierungsvorgang auf beiden Seiten des Substrats S Leiterbahnen L entstehen, die sich jeweils im Bereich zwischen zwei Zähnen Z zum Rand des Substrats S hin erstrecken. Die in Figur 5 dargestellte Trennlinie T dient nur zur Unterscheidung der oberflächlichen Metallisierung M mit den Leiterbahnen L und der stirnseitigen Metallisierung M. Tatsächlich erstreckt sich die Metallisierung M jedoch ohne jegliche Trennung über das Substrat S.After the etching resist AR has been applied, the structuring of the metallization M on the upper side 0 and the lower side U (compare FIG. 2) of the substrate S takes place in accordance with FIG. 5. end of the wiring layers, the etching resist AR is removed again by means of laser radiation. Further details of such a laser structuring can be found, for example, in DE-A-37 32 249. The unprotected areas of the metallization M are then removed by etching up to the surface of the substrate S. It can be seen from FIG. 5 that this structuring process produces conductor tracks L on both sides of the substrate S, each of which extends in the region between two teeth Z towards the edge of the substrate S. The dividing line T shown in FIG. 5 only serves to distinguish the surface metallization M with the conductor tracks L and the end metallization M. In fact, however, the metallization M extends over the substrate S without any separation.
Nach der geschilderten Bildung der Verdrahtungslagen auf Oberseite O und Unterseite U (vergleiche Figur 2) des Substrats S werden die Zähne Z durch Schleifen oder auch durch Schneiden abgetragen. Gemäß Figur 6 entstehen hierdurch im stirnseitigen Bereich der früheren Zahnlücken elektrisch voneinander isolierte Querverbindungen Q.After the described formation of the wiring layers on the top O and bottom U (compare FIG. 2) of the substrate S, the teeth Z are removed by grinding or removed by cutting. According to FIG. 6, cross connections Q which are electrically insulated from one another thereby arise in the end region of the former tooth gaps.
Figur 7 zeigt eine Seitenansicht des Substrats S mit Leiterbahnen L, Querverbindungen Q und mit den bereits erwähnten Höckern H, die auf der Unterseite U flächig angeordnet sind. Auf die Oberseite 0 des Substrats S ist ein Chip C aufgebracht, dessen Kontaktierung entweder in der links darge- stellten Wire-Bond-Technik mit Bonddrähten B oder in der rechts dargestellten Flip-Chip-Technik mit Anschlüssen A erfolgt. Bei der Wire-Bond-Technik ist der Chip C über eine Klebschicht K mit der Oberseite 0 des Substrats S verbunden.FIG. 7 shows a side view of the substrate S with conductor tracks L, cross connections Q and with the bumps H already mentioned, which are arranged flat on the underside U. A chip C is applied to the top side 0 of the substrate S, the contacting of which takes place either in the wire-bond technology shown on the left with bonding wires B or in the flip-chip technology shown on the right with connections A. In the wire bond technology, the chip C is connected to the top side 0 of the substrate S via an adhesive layer K.
Figur 7 zeigt deutlich, daß die einzelnen Anschlüsse desFigure 7 clearly shows that the individual connections of the
Chips C über Leiterbahnen L auf der Oberseite 0, über stirnseitige Querverbindungen Q und über Leiterbahnen L auf der Unterseite U mit zugeordneten Höckern H elektrisch leitend verbunden sind. Auf die Unterseite der metallisierten Höcker H ist eine lötbare Endoberfläche E aufgebracht, die beispielsweise durch eine Schichtenfolge von Nickel und Gold gebildet wird.Chips C are electrically conductively connected to associated bumps H via conductor tracks L on the top 0, via end-side cross connections Q and via conductor tracks L on the bottom U. A solderable end surface E is applied to the underside of the metallized bumps H, which is formed, for example, by a layer sequence of nickel and gold.
Bei dem in Figur 7 dargestellten Gebilde handelt es sich um ein Polymer Stud Grid Array, das insgesamt mit PSGA bezeichnet ist . Weitere Einzelheiten derartiger Polymer Stud Grid Arrays gehen beispielsweise aus der WO-A-96 09646 hervor.The structure shown in FIG. 7 is a polymer stud grid array, which is designated overall by PSGA. Further details of such polymer stud grid arrays can be found, for example, in WO-A-96 09646.
Bei dem in Figur 7 dargestellten Polymer Stud Grid Arrays PSGA sind die Außenabmessungen von Chip C und Substrat S etwa gleich groß. Es handelt sich somit um eine Gehäuseform, die üblicherweise als Chip Scale Package bezeichnet wird. Es ist auch klar zu erkennen, daß die stirnseitigen Querverbindungen Q mit ihrer hohen Strukturfeinheit eine äußerst kompakte Aus- gestaltung des gesamten Polymer Stud Grid Arrays PSGA ermöglichen und damit einen entscheidenden Anteil an der Realisierung des Chip Scale Package haben. In the polymer stud grid array PSGA shown in FIG. 7, the external dimensions of chip C and substrate S are approximately the same size. It is therefore a form of housing, which is usually referred to as a chip scale package. It can also be clearly seen that the cross-connections Q on the end face with their high structural fineness enable an extremely compact design of the entire polymer stud grid array PSGA and thus play a decisive part in the implementation of the chip scale package.

Claims

Patentansprüche claims
1. Verfahren zur Herstellung von elektrisch leitenden Querverbindungen (Q) zwischen zwei Verdrahtungslagen auf der Oberseite (0) und der Unterseite (U) eines Substrats (S) , mit folgenden Schritten: a) Herstellung des Substrats (S) aus einem elektrisch isolierenden Kunststoff durch Spritzgießen, wobei im äußeren stirnseitigen Bereich des Substrats (S) und/oder im Be- reich einer Aussparung (A) des Substrats (S) mehrere im Abstand zueinander angeordnete, sich zwischen Oberseite (O) und Unterseite (U) erstreckende, integrale Zähne (Z) beim Spritzgießen mitgeformt werden; b) Aufbringen einer Metallisierung (M) auf das Substrat (S) ; c) Entfernen der Metallisierung (M) zumindest in den an das gewünschte Leitermuster angrenzenden Bereichen und im stirnseitigen Bereich der Zähne (Z) , derart, daß zwischen den Zähnen (Z) elektrisch voneinander isolierte Querverbindungen (Q) entstehen.1. A method for producing electrically conductive cross connections (Q) between two wiring layers on the top (0) and the bottom (U) of a substrate (S), with the following steps: a) Production of the substrate (S) from an electrically insulating plastic by injection molding, in the outer front area of the substrate (S) and / or in the area of a recess (A) of the substrate (S) several integral, spaced, extending between the top (O) and bottom (U), extending Teeth (Z) are molded during injection molding; b) applying a metallization (M) to the substrate (S); c) Removing the metallization (M) at least in the areas adjacent to the desired conductor pattern and in the front area of the teeth (Z) in such a way that cross-connections (Q) which are electrically insulated from one another are formed between the teeth (Z).
2. Verfahren nach Anspruch 1, dadurch gekennzeichnet , daß im Schritt a) beim Spritzgießen des Substrats (S) Zähne (Z) nach Art eines Wellenprofils geformt werden.2. The method according to claim 1, characterized in that in step a) during the injection molding of the substrate (S) teeth (Z) are shaped in the manner of a wave profile.
3. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß im Schritt a) beim Spritzgießen des Substrats (S) auf dessen Unterseite (U) flächig angeordnete Polymerhöcker (H) mitgeformt werden und daß nach dem Aufbringen der Metallisierung (M) eine lötbare Endoberfläche (E) auf die Polymerhöcker (H) aufgebracht wird.3. The method according to claim 1 or 2, characterized in that in step a) during the injection molding of the substrate (S) on the underside (U) flat polymer bumps (H) are formed and that after the application of the metallization (M) a solderable End surface (E) is applied to the polymer bump (H).
4. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die Metallisierung (M) durch stromlose und galvanische Abscheidung von Kupfer auf das Substrat (S) aufgebracht wird. 4. The method according to any one of the preceding claims, characterized in that the metallization (M) is applied to the substrate (S) by electroless and galvanic deposition of copper.
5. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß nach dem Schritt b) ein Ätzresist (AR) auf die Metallisierung aufgebracht wird, daß das Ätzresist (AR) zumindest in den an das gewünschte Leiter- muster angrenzenden Bereichen mittels Laserstrahlung wieder entfernt wird und daß dann die freiliegenden Bereiche der Metallisierung (M) bis zur Oberfläche des Substrats (S) abgeätzt wird.5. The method according to any one of the preceding claims, characterized in that after step b) an etching resist (AR) is applied to the metallization, that the etching resist (AR) is removed again at least in the areas adjacent to the desired conductor pattern by means of laser radiation and that the exposed areas of the metallization (M) are then etched off to the surface of the substrate (S).
6. Verfahren nach Anspruch 5, dadurch gekennzeichnet , daß das Ätzresist (AR) durch galvanische Abscheidung von Zinn oder Zinn-Blei aufgebracht wird.6. The method according to claim 5, characterized in that the etching resist (AR) is applied by electrodeposition of tin or tin-lead.
7. Verfahren nach einem der vorhergehenden Ansprüche, da- durch gekennzeichnet, daß die Metallisierung (M) im stirnseitigen Bereich der Zähne (Z) mechanisch entfernt wird.7. The method according to any one of the preceding claims, characterized in that the metallization (M) in the end region of the teeth (Z) is removed mechanically.
8. Verfahren nach Anspruch 7, dadurch gekennzeichnet, daß die Metallisierung (M) im stirnseitigen Bereich der Zähne (Z) durch Abschleifen der Zähne (Z) entfernt wird.8. The method according to claim 7, characterized in that the metallization (M) in the end region of the teeth (Z) is removed by grinding the teeth (Z).
9. Verfahren nach Anspruch 7, dadurch gekennzeichnet, daß die Metallisierung (M) im stirnseitigen Bereich der Zähne (Z) durch Abschneiden der Zähne (Z) entfernt wird.9. The method according to claim 7, characterized in that the metallization (M) in the end region of the teeth (Z) is removed by cutting off the teeth (Z).
10. Anwendung des Verfahrens nach einem der Ansprüche 3 bis 9, bei der Herstellung eines Polymer Stud Grid Arrays (PSGA) mit einem auf der Oberseite des Substrats (S) in Wire-Bond- Technik oder in Flip-Chip-Technik angeordneten Chip. 10. Application of the method according to one of claims 3 to 9, in the manufacture of a polymer stud grid array (PSGA) with a chip arranged on the top of the substrate (S) in wire-bond technology or in flip-chip technology.
EP98951303A 1997-08-22 1998-08-18 Method for producing electrically conductive cross connections between two layers of wiring on a substrate Withdrawn EP1005703A1 (en)

Applications Claiming Priority (3)

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DE19736654 1997-08-22
DE19736654 1997-08-22
PCT/EP1998/005251 WO1999010926A1 (en) 1997-08-22 1998-08-18 Method for producing electrically conductive cross connections between two layers of wiring on a substrate

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DE10145348C1 (en) * 2001-09-14 2003-03-27 Siemens Dematic Ag Intermediate carrier for electronic component has suction used for removal of excess solder at foot of contact projections formed integral with plastics carrier body
DE10250621B4 (en) * 2002-10-30 2004-09-02 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. A method of producing encapsulated chips and generating a stack of the encapsulated chips
CN101815409B (en) * 2010-04-23 2012-05-02 陈国富 Method for manufacturing circuit board through injection molding
JP5720278B2 (en) * 2011-02-07 2015-05-20 ソニー株式会社 Conductive element and manufacturing method thereof, information input device, display device, and electronic apparatus

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US3483308A (en) * 1968-10-24 1969-12-09 Texas Instruments Inc Modular packages for semiconductor devices
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DE59508519D1 (en) * 1994-09-23 2000-08-03 Siemens Nv Polymer stud grid array package

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