EP0993723A2

EP0993723A2 - System and method for asynchronous switching of composite cells, and corresponding input port and output port modules

Info

Publication number: EP0993723A2
Application number: EP99901625A
Authority: EP
Inventors: Michel Henrion
Original assignee: Alcatel CIT SA; Alcatel SA
Current assignee: Alcatel Lucent SAS
Priority date: 1998-01-26
Filing date: 1999-01-25
Publication date: 2000-04-19
Also published as: WO1999038293A3; US6807177B2; FR2774242A1; US20030193939A1; WO1999038293A2; AU2167199A; FR2774242B1

Abstract

The invention concerns an asynchronous cell switching system comprising each a header field and a data field. At least some of the input modules comprise means for forming composite cells, for constructing channel data blocks, each comprising a channel data to be transmitted retrieved from the received channel data and at least an synchronous channel identity associated with said channel data to be transmitted, and means for selective multiplexing of channel data blocks intended for a common destination, in the data field of at least one composite cell. At least some of said output modules comprise means for processing said composite cells, including means for retrieving and identifying said received channel data blocks, using said associated synchronous channel identity means and means for transmitting to at least an output connection channel data pertaining to the different channels.

Description

System and method for asynchronous switching of composite cells, and corresponding input port and output port modules.

The field of the invention is that of transfer, and asynchronous switching, of cells. In particular, the invention typically relates to the transfer of synchronous channels (for example 64 kbit / s channels of a digital multiplex), using asynchronous cell switches initially designed to switch broadband services.

In such a situation, an essential condition to be respected is the transfer delay for each synchronous channel through a switching node (for example in ITU Rec. Q-551: average transfer delay 900 μs; with 95% less than or equal to 1500 μs). This is particularly the case in the context of the use of standardized ATM cells, which would imply an assembly time in cell of 6 μs to carry out the grouping of 48 samples (of 8 bits each) of a 64 kbit channel / s.

Several approaches have already been proposed to reduce these assembly times in cells, while ensuring that each cell to be switched does not contain more than one sample from the same channel.

A first category of solutions is based on the use of standardized ATM cells in "composite" mode (that is to say for several channels), so as to reduce the enormous increase in bandwidth when an ATM cell (from 424 bits) is used to transfer a single 8-bit channel sample, which results in 53 times more bandwidth.

A second category of solutions is based on the use of smaller cells to each transfer an individual channel sample. Even in this case, however, the required bandwidth remains high, and the management of switching is complex.

Documents WO 95 34977 and WO 97 33406 describe systems using composite cells, and effecting the switching of channel data between incoming and outgoing channels (on incoming and outgoing multiplex links respectively) by transferring (between incoming and outgoing terminal modules connecting said links) of composite cells, each composite cell The invention has in particular the objective of overcoming these drawbacks which may contain several blocks of channel data. Each of said 'channel data blocks' includes not only channel data to be transmitted, but also an 'address' relating to that channel. - In document WO 95 34977, the system uses a "virtual channel identifier", of ATM type.

- In document WO 97 33406 the system uses a 'connection identity' which differs from the identity of the incoming synchronous channel or the outgoing synchronous channel. These known systems have the drawback of requiring assignment, marking, management and release of the configuration data for each individual connection between the incoming synchronous channel and the outgoing synchronous channel.

A first objective of the invention is to provide a switching system and method implementing a solution offering higher efficiency for reduced complexity.

Another object of the invention is to provide such a system and such a method, improving the existing narrowband switching nodes using conventional synchronous switches (PCM), by replacing these by asynchronous cell switches.

The invention also aims to provide such a system and such a method, integrating broadband and narrowband services in switching nodes implementing asynchronous cell switching techniques. These objectives, as well as others which will appear subsequently, are achieved according to the invention using an asynchronous switching system of cells each comprising a header field and a data field, of the type providing interconnection of incoming and outgoing links, each of said links multiplexing data belonging to at least two channels, said system comprising input port modules and output port modules interconnected by at least one stage of intermediate switching elements, in which:

- at least some of said input modules comprise means for forming composite cells comprising: - means for storing channel data received from the incoming channels on the incoming links of the input port module; means for constructing channel data blocks each comprising channel information to be transmitted extracted from the channel data received and at least one explicit channel identity associated with said channel information to be transmitted; and means for selective multiplexing of channel data blocks intended for a common destination corresponding to at least one and the same destination output port module, in the data field of at least one composite cell to be transmitted to said common destination; - And in which at least some of said output modules comprise means for processing said composite cells, comprising: means for extracting and recognizing said blocks of channel data received in the data field of a composite cell, by means said associated explicit channel identities;

- And means for transmitting to at least one outgoing link the channel data belonging to the different channels, as a function of said associated explicit channel identities; characterized in that said explicit channel identity denotes: - either the address of a synchronous channel entering an input port module;

- either the address of at least one outgoing synchronous channel in an output port module.

The two variants are discussed below. The addition of channel identities designating the address of the synchronous channel entering the input port module or the address of at least one synchronous channel leaving the output port module offers many advantages, as will see it later. In particular, it not only eliminates the need to preconfigure each channel, but also the need to rearrange the channels. In addition, the efficiency of such a system is higher than that of known techniques. In particular when this switching system is self-routing, this system does not require assignment, marking, management or release of configuration data for each individual connection between synchronous incoming channel and synchronous outgoing channel.

According to the embodiments, said channel data blocks can be of fixed and identical length, or of variable length. In the latter case, it can be provided that: the length of each of said channel data blocks is specified by an indicator associated with each of said channel data blocks; or that the length of each of said channel data blocks is fixed for each connection to an outgoing channel, and known to the destination output port module. Advantageously, said variable lengths are multiples of a basic elementary length.

Said selective multiplexing means can dynamically group blocks of channel data in various ways, and in particular: - without following a predetermined order, according to the order of reception of said channel data; according to a pre-established order; according to a pre-established order dynamically modified, at each transmission cycle; - in a random or quasi-random order, modified at each transmission cycle. Preferably, said selective multiplexing means limit the number of channel data blocks to a maximum number of acceptable channel data blocks in the data field of a composite cell. Advantageously, said selective multiplexing means take account of a maximum duration for assembling a composite cell, and ensure the emission of a composite cell which is not completely filled when said maximum duration has elapsed.

According to one embodiment of the invention, it is possible to provide that the length of the data field of said composite cells is variable.

In this case, said length of the data field is advantageously dynamically adapted as a function of the number and / or the length of the channel data blocks that said data field contains.

The invention also relates to the input port modules and the output port modules as such, for an asynchronous switching system as described above.

Such an input module comprising means for forming composite cells comprising: means for storing channel data received from the incoming channels on the incoming links of the input port module; means for constructing channel data blocks each comprising channel information to be transmitted extracted from the channel data received and at least one explicit channel identity associated with said channel information to be transmitted; - and means for selective multiplexing of channel data blocks intended for a common destination corresponding to at least one and the same destination output port module, in the data field of at least one composite cell to be transmitted to said common destination; is characterized in that said explicit channel identity designates: - either the address of a synchronous channel entering an input port module; - either the address of at least one outgoing synchronous channel in an output port module.

Likewise, such an output module comprising means for processing said composite cells, comprising: means for extracting and recognizing said blocks of channel data received in the data field of a composite cell, by means of said identities of explicit associated channels; and means for transmitting to at least one outgoing link the channel data belonging to the different channels, as a function of said associated explicit channel identities; is characterized in that said explicit channel identity denotes:

- either the address of a synchronous channel entering an input port module; - either the address of at least one outgoing synchronous channel in an output port module.

Other characteristics and advantages of the invention will appear more clearly on reading the description of a preferred embodiment of the invention, given by way of simple illustrative and nonlimiting example, and of the appended drawings, among which: Figure 1 illustrates in a simplified manner a switching system to which the invention can be applied; Figure 2 is a functional diagram of an input CCTM according to the invention; - Figures 3A and 3B show two embodiments of the translation table used by the ICRC module of Figure 2; Figure 4 shows the structure of the CCC module of Figure 2; FIG. 5 illustrates the buffer memories used by the CAU module of FIG. 2; - Figures 6A and 6B illustrate the operation of an output CCTM, according to two embodiments. 1 - Glossary In the remainder of this description, the following abbreviations will be used in particular:

ASC: asynchronous switching network;

CCTM: end port module (input or output);

CRI: connection reference identifier;

CHE: channel data block (channel identity + channel sample

NCE: number of channel data blocks in a cell (or

NCHEIC) - NBCHE: number of bytes per channel;

TNCDC: total number of channels per output CCTM;

NCFC: number of cells completely filled;

NARCH: number of channels already received for an output CCTM;

TNCL: total number of cells; - NCHELC: number of channel data blocks in an incomplete cell (last cell);

ICRU: module for receiving input channels;

CTU: cell transmission module;

ICHS: incoming channel sample; - CAU: cell assembly module;

ICHI: incoming channel identity;

ICRC: module for managing the routing of incoming channels

OCLD: outgoing cell data; - CCC: channel grouping control module;

ICHRD: routing data of incoming channels;

CHCI: channel grouping instructions;

ICTT: translation table for incoming channels;

DCCTM: recipient CCTM; - OCHI: identity of the outgoing channel;

CCCM: channel group management memory;

TNCDC: total number of channels per output CCTM; NARCH: number of channels already received; CCCL: channel grouping control logic; CHBM: cell header buffer; DSBM: data buffer; - SLPM: memory of pointers of chained list of intervals;

SLLM: chained list of intervals memory; SSAP: first interval address pointer; LSAP: pointer to last interval address; CHTI: channel type indicator; - CHEP: position of a channel data block in a cell.

2 - State of the art reminders 2- 1 Description of a switching node

As illustrated in FIG. 1, we consider a switching node 1 1 realizing the interconnection of N = PxQ incoming channels 1 2 and outgoing channels 1 3, where:

N is the total number of synchronous channels; P is the maximum number of channels 1 4 per CCTM 1 5; Q is the maximum number of CCTMs 1 5 of switching node 1 1. In practice, a CCTM ends with external interfaces which are multiplex links of several channels, for example links at a primary rate of 2.048 Mbit / s, multiplexing 32 channels at 64 kbit / s. In this case, P represents the product of the number of multiplex lines (p) per CCTM multiplied by the number of channels (c) per multiplex. For example, P = 1024 when p = 32 and c = 32.

The CCTMs are connected to the asynchronous switch (ASC) by means of interfaces 1 6 transferring cells. Each interface between a CCTM and the ASC can in fact correspond to one or more physical links, but globally equivalent to a bit rate of B Mbit / s. 2-2 Known technique using "composite" ATM cells

In such an approach, only standardized ATM cells are used. In this case, the ASC is an ATM switch and the interfaces CCTM / ASC carry fixed length ATM cells of 53 bytes (424 bits) each. As a result, each CCTM can transmit or receive a maximum of B / 424 cells per second (B being the total bit rate available at the ASC interface). The principle of "composite" cells is based on the grouping of several (S) samples of S different channels of the same synchronous multiplex frame (typically 1 25 μs) in the data field ("payload") of each ATM cell, these S channel samples to be transferred to a destination CCTM (consequently, these S incoming channels are channels which must be transferred to at least S outgoing channels all belonging to the same destination CCTM).

In the classic case of 64 kbit / s channels, each channel sample comprises 8 bits, and an ATM cell can transport a maximum of S _MAX = 48 channels, in its 48 byte data field. However, the maximum filling cannot always be obtained, since it depends on the distribution of traffic between the incoming channels and the outgoing channels.

In the case of a strictly uniform distribution, each input CCTM would distribute its P channels equally to Q output CCTM, i.e. it would connect P / Q channels between each pair of CCTMs. entry and exit. We would then obtain a filling at an average rate: for example, a grouping of 8 channels per composite cell when P is 1024 and Q is 1 28; such a grouping makes it possible to use 1 28 cells per frame.

In the other extreme case of a completely unbalanced distribution, the filling would be optimal when all the P channels of an input CCTM must be transferred to the same output CCTM (for example for P = 1024 (and Q = 1 28), 22 cells are required per frame: 21 full cells with 48 channels and 1 cell containing 1 6 channels).

It can be shown that the least favorable traffic distribution case, that is to say leading to the maximum number of "composite" cells per frame, (therefore to the highest load of cell traffic at the CCTM / ASC), corresponds to the case where an input CCTM supports: Q- l cells with only one channel each, respectively to Q- l output CCTM;

C _M additional cells for the remaining P- (Q- l) channels to an output CCTM C _M therefore being the integer value just greater than [P- (Q- l)] / 48.

Still assuming that P = 1 024 and Q = 1 28, the maximum number of cells for a CCTM would then be 1 27 + 1 9, or 1 46, cells per frame in the most unfavorable traffic distribution case.

As illustrated by these few examples of traffic distribution, such a "composite" cell technique leads to a statistically variable number of channels per cell (1 <S <48), depending on the evolution of the distribution of connections between CCTMs. . Consequently, the changes in traffic distribution (due to the establishment and loosening of connections) imply that some cells must be able to contain more channels and that other cells contain fewer channels than before.

This situation, when channels are gradually disconnected, leads to a problem of reallocating channels in other cells, unless the CCTM access interfaces are provided to authorize the maximum number of cells (integer value greater than P / 48) for each output CCTM. Still with the same example (P = 1 024, Q = 1 28), there would be no problem of channel reallocation in other cells if the CCTM is able to support a flow of 22 x 1 28 = 281 6 cells per frame of 1 25 μs (i.e. approximately 22.5 x 10 0 cells per second, i.e. a bandwidth B of the order of

9500 Mbit / s).

However, the case of the most unfavorable distribution identified above requires much fewer cells if rearrangements are carried out, namely 1 46 cells per frame in the example given (that is to say only one band bandwidth B of the order of 495 Mbit / s), that is to say approximately 20 times less than in the hypothesis of a system without channel rearrangements. Existence of situations involving channel rearrangements can be illustrated using a particular example of a change in traffic distribution.

We consider that we start from an unfavorable traffic distribution A in which 1 27 cells each carry a channel to 1 27 output CCTM identified by CCTM # 1 to CCTM # 1 27, and 1 9 cells carry the remaining 897 channels to the remaining CCTM # 1 28. We now consider a change in distribution from distribution A to another unfavorable distribution B in which 1 27 cells each carry a channel to 1 27 output CCTMs which are now CCTM # 2 at CCTM # 1 28, and 1 9 cells carry the remaining 897 channels to the first CCTM # 1.

If no channel rearrangement is carried out during the transition from situation A to situation B: the 1 9 cells intended for CCTM # 1 28 are always used, but for a gradually decreasing number of channels (tending towards S = 0 for most cells); the single cell for CCTM # 1 becomes full and additional cells are gradually needed (tending to 19 cells in total).

On the other hand, if a reorganization of the channels in a reduced number of cells is planned for the cells intended for CCTM # 1 28 (for example by replacing two cells with respectively SI and S2 channels by a single cell as soon as SI + S2 = 48) , then the total number of cells required by CCTM will never exceed the maximum total number (Q - I + C) strictly required for the most unfavorable traffic distribution. Rearrangement algorithms are known for certain types of switches subject to blockages. However, the use of such rearrangement algorithms introduces a non-negligible increase in complexity, in particular for carrying out reallocations with a reduced number of operations while avoiding disturbances to the established connections. 2-3 Known technique with small cells In this case, transferring a single channel sample per cell becomes more efficient as the size of the cells decreases, compared to the size of an ATM cell of 53 bytes.

On the other hand, when the size of the cell decreases, the size of the header of the cells remains fixed and becomes an increasingly predominant portion of the size of the cell, which constitutes an intrinsic limit to this approach.

3 - Principle of the technique of the invention 3- 1 Main characteristic The main characteristic of this approach consists in transferring several (S) channel samples, typically all belonging to S different channels (and therefore only one sample per channel), grouped together ("clustered" in English) in a single cell, but with an explicit channel identification respectively associated with each of the channel samples. As described below, this can be the identification of the input channel in the input CCTM, or the identity of the output channel in the output CCTM.

However, although certain real-time service applications (for example, digital telephony) impose transfer delay constraints such as a single sample of the same channel per cell, the approach proposed is of course generalizable to cases of several (a few) samples of the same channel per cell, therefore on the basis of a periodic process relating to several (a few) successive frames instead of a single frame.

The main difference between this new technique and the known classic technique of "composite" cells is based on the presence of the respective identities of the channels associated with each of the S channel samples grouped in the cell. This not only eliminates the need to define the configuration between channel and cell at each connection and disconnection operation, but also the need for complex rearrangement of configuration of all the channels among the cells.

This essential difference can be illustrated by the following example. We consider the case of fixed size ATM cells and a situation in which 2 CCTM are connected by 22 channels. In the case of "composite" cells without rearrangement, these 22 channels are for example configured in 4 sets of channels: SI = 9 channels in cell 1, S2 = 4 channels in cell, S3 = 6 channels in cell 3 and S4 = 3 channels in cell 4. As long as there is no rearrangement (to group the 22 channels in a single cell), the 4 sets of channels are fixed (not only their number but also their composition, in since a given channel remains associated with the same set, therefore with the same cell).

On the other hand, in the new approach according to the invention, no semi-permanent allocation of a channel to a cell need be made at the initialization of the connection, since each cell between 2 CCTMs contains a non-consecutive structured channel samples with their associated channel identities.

Assuming for example channel identities coded on 10 bits (P = 1024) and 8 bit channel samples, the data field of an ATM cell (48 bytes) can contain up to 21 blocks channel data (1 0 + 8 bits each). At each cycle (typically per 1 25 μs frame), the channel data blocks to be transmitted to a given outgoing CCTM are grouped dynamically according to an optimal mode (as is presented below, several optimal techniques can be envisaged), with the property that this dynamic grouping can always be carried out independently of the groupings carried out in previous cycles.

One possible technique is to consider the total number of channels to switch to each outgoing CCTM to fill ATM cells with the first available input channel samples, and to transmit a cell when it is completely full, or when the it is detected that all the channels expected for the outgoing CCTM in question have been received. In the previous example of 22 channels to be switched to a given CCTM, this type of method would lead to the construction of a first full cell with 21 blocks of channel data, and of a second incomplete cell with a single block of data channel. Let us now consider the case of a disconnection of one of these 22 channels, therefore the passage from 22 to 21 channels to be switched to this outgoing CCTM. In the example using conventional “composite” cells, it could for example be a connection belonging to the fourth set of channels. In this case, cell 4 would now carry S4 = 2 channels, instead of 3.

Using the dynamic (re) grouping technique according to the invention, the removal of this connection would simply lead to a new total number of 21 channels (instead of 22) which would then be automatically grouped into a single cell (whatever the connection that has been disabled).

In fact, the dynamic grouping of channels according to the invention ensures at each cycle an optimal self-adapting assembly of the channels into cells whatever the changes in the traffic distribution, and without requiring any configuration management to associate sets of channels and particular cells.

In view of the above example, one can appreciate the benefits derived from the introduction of explicit channel identities associated with the channel samples, namely: - elimination of the semi-permanent management of the allocation of each channel to a structured set of channels to be assembled in a particular cell; consequently, elimination of any case of blockage requiring channel rearrangements among the various sets of channels structured per cell in the case of conventional "composite" cells.

In practice, this also makes it possible to obtain an optimized match between the number of bits to be transferred per channel in the cells, on the one hand, and a significant reduction in the complexity of the mechanism of (re) grouping ("clustering") on the other hand. 3-2 Optional and variable characteristics

3-2- 1 fixed or variable cell size As mentioned above, in the description of the approach based on conventional "composite" cells, the number of channels per cell (S) is a statistical variable whose value strongly depends on the distribution of traffic between the input CCTMs and the output CCTMs. Up to a certain point, this is also true in the technique according to the invention, as long as cells of fixed size are used. In this case, the ASC transfers fixed-length cells carrying a variable number of channels, some of the cells being used efficiently (fully), while others are not. Due to the principle of the semi-permanent allocation of channels in structured sets of channels, namely cells, the corresponding management in the approach using conventional "composite" cells would become even more complex if we tried to apply it. to the variable cell technique. Conversely, the new technique according to the invention, based on a self-adaptive approach to the dynamic (re) grouping of channels, leads to optimal use of cells of variable size.

In fact, this dynamic (re) grouping mechanism can use a list of channel data blocks (channel sample + channel identity) to assemble cells of variable length, the length of this list being known at each cycle, ie as a fixed length, either as a length derived from the current number of active channels (and possibly other parameters).

Several approaches can be envisaged for choosing the length of the cells, in particular by using either different predetermined lengths, or completely variable lengths. In all cases, this additional improvement makes it possible to better adapt the length of the cells as a function of the effective number of channel data blocks to be transported, and therefore to increase the overall efficiency of the transfer of cells through the ASC switch. 3-2-2 Input or output channel identity The two variants are conceivable, each of them leading to a different switching architecture having its own properties.

Consider the definition of a synchronous connection between an input channel x in an input CCTM x and an output channel y in an output CCTM y. The two variants are:

- variant A: in CCTM x, channel x is known to be connected to channel y in CCTM y; - in the cell transferred between CCTM x and CCTM y, the identification of the outgoing channel (y channel) is used; in the CCTM y, the address of the output channel is directly available, since it is received explicitly.

- variant B: - in CCTM x we know that channel x must be connected to

CCTM y, but it is unclear to which specific outgoing channel; in the cell transferred between the CCTM x and the CCTM y, the identification of the input channel (channel x) is used; in CCTM y, the input channel x of the input CCTM x is known to be connected to the output channel y.

In addition to the different localization of the data defining the association between the input and output channels of the connection (chx / CCTM x to chy / CCTM y) these two architectural variants have the following differences: in variant A , only the output channel identities are required in the cell; in variant B, in addition to the individual identity of each input channel, there must be a direct or indirect indication (see paragraph 3-2-3) of the origin of the cell, namely the CCTM x entry; when the output channel can be freely selected (typically from the free channels of an outgoing multiplex line managed by a CCTM output), the selection of a free output channel takes place, within the framework of variant A, in the CCTM y, and therefore the identity of the selected channel y must be communicated to the CCTM x. Conversely, in variant B, the request can be made by the CCTM x for the input channel x and therefore the CCTM y can locally select an output channel y without having to communicate the identity of the latter to the CCTM x. As a result, the connection establishment time can be reduced; when considering the case of point-to-multipoint connections between an input channel x and several (k) output channels y ₁ , y ₂ , ... y _k possibly belonging to different CCTMs y, variant A as such is not appropriate, because it is desirable to send only a single copy of the channel data to each CCTM concerned therein. On the other hand, variant B is more suitable for point-to-multipoint connections of this type, since: in CCTM x, it is known that the canql x must be connected to at least one channel y in CCTM y _{] ;} y ₂ , ...., y _k . Consequently, the CCTM x makes the necessary copies of the channel x data for the k CCTM y recipients; in each CCTM y concerned, the channel x can also be locally associated with several outgoing channels y _{] t} y _{2 /} , y _; which are known and managed locally.

3-2-3 Switches (ASC) "with connection" or "without connection"

In general, the architecture of asynchronous cell switches (ASC) used to interconnect terminal modules (CCTM) can be of two types, namely:

"with connection", when the prior establishment of a connection path is a necessary condition in the ASC to allow the latter to route cells between incoming and outgoing CCTMs;

"sqns connection" (or "self routing" in English), when it is not necessary to establish connection paths between the CCTMs, each cell being routed individually by itself to the appropriate CCTM of destination. The operation in the CCTMs according to the invention can be described as follows, depending on the type of ASC:

- ASC "with connection"

In this situation, appropriate connections between incoming and outgoing CCTMs (point-to-point or point-to-multipoint) must be established, modified, released, depending on the cell traffic required between the CCTMs (which depends on the traffic distribution between the input and output channels).

Regarding the aspects discussed in paragraph 3-2-2, both variants A and B can be used (i.e. the use of an input or output channel identity in the cells). In the case of variant B, it is not absolutely necessary to provide an explicit identification of the input CCTM x since the connection reference identifier (CRI) can be used to characterize indirectly that the cell was transmitted by the CCTM x (the CRI being implicitly present in the header field of the cell for its routing (for example, the identifier "VCI / VPI" in the case of cells Standardized ATM).

- ASC "without connection"

In this case, the individual cells are routed only on the basis of their destination addresses, that is to say the outgoing CCTMs and there, without connection paths being established beforehand between the CCTMs.

Again, the two variants A and B of paragraph 3-2-2 can be used. However, in the case of variant B, provision must be made to add in the cell the explicit identification of the transmitting CCTM x (since the cell normally provides in this case only the identity of the recipient CCTM y in its field of -head).

3-2-4 Channel grouping techniques in the input CCTM Several channel grouping techniques can be considered to optimize the overall performance and efficiency of the switching node, depending on the characteristics of the UPS used to connect the CCTM. The key parameters are conventionally the load of cell traffics (function of the cell size in the case of an ASC with capacity for managing cells of variable size), the cell transfer time, and the arrival profile of the cells. cells in the output CCTM. The mechanism for dynamic (re) grouping of channels proposed according to the invention offers great flexibility in selecting an optimal method of assembling the channels into cells, due to the absence of any constraints for associating the channels with the cells (since there are no predefined channel sets per cell). For example: - the channel data blocks can be grouped in cells according to their real arrival time, so as to be able to minimize the waiting times in the input CCTM; the number of channel data blocks per cell (as well as the cell length to be used in the case of variable-length cells) can be determined dynamically, based on the current number of input channels to be routed to each CCTM y, so as to minimize the traffic load of the cells; alternatively, the number of blocks of channel data per second, and possibly the length of the cells, can be changed dynamically (i.e. change at each cycle) so as to randomize the start time of a cell to the ASC and thus reduce the time correlation of the arrival of cells in an output CCTM compared to the synchronous arrival of channel data in the input CCTMs.

3-2-5 Frame synchronization between inputs and outputs Depending on the specific layouts and the resulting overall transfer times, correct frame synchronization (i.e. the identification of the synchronous frame at which each sample received channel belongs) can be guaranteed automatically or not.

When variations in the total transfer time do not allow an unambiguous determination of the correct frame, additional frame information can be added to the cell, for example under the form of a bit designating an A or B frame in the uncertain case where a received channel can belong to any one of two consecutive frames.

This technique known in itself can be used in combination with the principle (dynamic) grouping of channels according to the invention, as well with a common frame indicator per cell, when all the channels of a cell belong to the same frame, than with an individual frame indicator per channel sample, if it is more generally planned to transmit in the same cell channel samples belonging to different frames.

4 -Detailed description of an embodiment 4- 1 System definition

We now give a particular embodiment of the invention, for the two variants A and B described above. By way of example, the following conditions are therefore fixed: duration of a cycle (that is to say synchronous frame): 1 25 μs; size of a channel sample: 8 bits; channel identity size: 8 bits (i.e. P = 256 channels per CCTM); which gives channel data blocks (CHE) of 8 + 8 = 1 6 bits number of CCTMs (Q): 256 (i.e. 8 bits for the identity of a CCTM);

ASC "without connection"; cell transport protocol: cells of variable length, of the type of cells with multiple intervals ("multislot"); format of cells with multiple intervals: M intervals of 8 bytes each: first interval: (cell header) containing (at least): - CCTM y of destination (CCTM y of output)

(for self-routing); Original CCTM x (input CCTM x) in version B; number of channel data blocks (NCE) in the cell; other control information conventionally contained in the cell header field; up to 4 channel data blocks (CHE) of 2 bytes each for each subsequent interval.

The table below illustrates the structure of such a variable-length cell in the case of a 5-interval cell (M = 5).

OCTETS: 1 7 8 interval

TABLE I Note that the information required in the cell header

(i.e. the first interval) may not fill the affected 8 bytes.

A further optimization of the cell size would therefore consist in placing (at least) a first channel data block (CHEl) in the first interval of the cell, so that a small cell comprising a single interval may be sufficient to route a single channel data block. This optimization case is not included in the following, for reasons of simplification of description. To illustrate the increased efficiency of dynamic channel grouping in variable length cells compared to ATM cells

Conventional "composites", the table below shows the number of cell bytes required per channel as a function of the number of multiplex channels in a cell (NCHEIC).

TABLE II In the case where the type of cells with multiple intervals described above is used, the number of bytes per channel (NBCHE1), is:

NBCHE1 = ([NCHEIC / 4 J _ru + 1) * 8 / NCHEIC where: NCHEIC is the number of multiplex channels in the cell; ru is the function delivering the first integer greater than or equal to the calculated value.

If conventional ATM "composite" cells are used, the comparable value is:

NBCHE2 - 53 / NCHEIC. Quantitatively, this comparison shows that the technique of dynamic (re) grouping of channels according to the invention (despite the addition of channel identities associated with each channel sample) with variable length cells (even in the simplified embodiment described here) is more efficient than the conventional "composite" ATM cell technique, up to 20 channels per cell. This result is particularly interesting in conventional applications, where the probability of having to route a high number of channels in the same cell is a priori relatively low, in which case the efficiency of the transfer of cells multiplexing a limited number of channels is particularly high. By using the multiple interval cell transport protocol described above, it can be seen that no significant gain is achieved by using cells with longer multiple intervals (having a large number of intervals). Indeed, the efficiency characterized by the NBCHEI report shows that a factor between 2.5 and 3 is obtained with a number of channels per cell between 1 2 and 1 6. We can therefore limit in practice the maximum length d 'such a cell at N = 4 or 5 intervals.

In fact, not using longer cells improves system performance in two ways, namely: the assembly time of the channels is statistically reduced; - the traffic load of cells in the ASC increases its efficiency since the maximum cell size is reduced.

In the following, it is therefore assumed that the maximum length of a cell is 5 intervals (ie 1 6 CHE at most per cell).

Furthermore, it is assumed that a simplified channel grouping technique is used in the following way: the total number of channels per output CCTM y (TNCDC) is known from the input input CCTM x for each CCTM y; the grouping technique is such that dividing TNCDC by 1 6 (always assuming that 1 6 is the maximum number of channel data blocks per cell) gives: a quotient which is the number of completely filled cells (NCFC), that is, each containing 1 6 channel data blocks; a remainder which is the number of channel data blocks conveyed by an additional cell that is incompletely filled (if this remainder is not zero).

This remainder (S _L ) is strictly between 0 and 1 6. For example, if TNCDC is equal to 25 channels, the number of completely full NCFC cells (the quotient) is 1 and an additional cell is necessary (since the rest is not zero) to route S _L = 9 multiplex channel data blocks in a 4-interval cell.

In practice, such a technique supposes knowledge in a CCTM x of the following two parameters for each output CCTM y: TNCDC (as defined above); NARCH: number of channels already received.

Due to the supposed modularity of CCTMs (P = 256 channels), each of the two above parameters can be coded with 8 bits, for the range from 1 to 256 (by convention it is assumed that the value 0 is known in a way separate).

We can therefore structure these parameters as follows, in 2 nibbles of 4 bits each:

TNCDC = TNCL (4 bits), NCHELC (4 bits); - NARCH = X (4 bits), Y (4 bits).

Thus, according to the principles of binary division, TNCL (which can vary from 1 to 1 6) here represents the total number of cells (to be used for the CCTM concerned), and NCHELC (also varying from 1 to 1 6) represents the number of channel data blocks in the last cell. Consequently, it can be noted that, among the TNCL cells, the first TNCL-1 cells are always completely filled and that the last cell comprises NCHELC channel data blocks which are less than or equal to 1 6 (that is that is, the last cell can be a completely or partially filled cell). By using NARCH as the arrival counter for the different channels to be routed to a given CCTM (this counter being incremented each time a channel concerned is received), the above information can be obtained in the following way to determine how the dynamic grouping of a new incoming channel should be treated: if X <TNCL, a cell of maximum size is being constructed, therefore: - if Y <1 6, the channel received is the Y ^th channel to be assembled in the cell under construction, but not the last of a complete cell; if Y = 1 6, the channel received is the 1 6 ^{th β} channel to be assembled in the cell under construction; this is now complete with 1 6 channel data blocks and is therefore ready to be transmitted to the CCTM y via the ASC; if X = TNCL, the last cell is under construction therefore: if Y <NCHELC, the channel received is the Y ^th channel to be assembled in the cell under construction, but not the last of the cell; if Y = NCHELC, the channel received is the last channel expected to complete the last cell, which contains NCHELC channel entries. The last cell is now ready to be transmitted to the destination CCTM and via the ASC.

On this basis, an embodiment of CCTM is now described, respectively for an input CCTM and an output CCTM. 4-2 Input CCTM

4-2- 1 Structure

FIG. 2 is a functional diagram of an exemplary embodiment of an input CCTM (or incoming CCTM), in which the ICRU module

2 1 (module for receiving the input channels) and CTU 22 (cell transmission module) are not, a priori, dependent on the characteristics of the invention.

At each channel time interval (P = 256 channel time intervals per frame of 1 25 μs), the ICRU module delivers an ICHS 23 input channel sample to CAU 24 and an ICHI 25 input channel identity to the ICRC module. In fact, the ICRU 21 modules also provide all the termination functions required with external synchronous channel interfaces.

At output, the CAU module 24 provides outgoing cell data (OCLD) to the CTU module 22 which performs the termination functions with the interface at the cell level, with the switch ASC.

The ICRC module 26 uses the ICHI identity (chx) 25 received to determine the corresponding routing data, that is to say the identity of the destination CCTM (CCTM y) which is transmitted to the CCC module 28 (module channel grouping control), and in the case of version A the identity of the output channel (chy).

Depending on whether version A or B is used, the ICRC module 26 supplies the CAU module 24 with either the identity of the outgoing output channel (chy) or the identity of the input channel (chx = ICHI). Furthermore, the ICRC module 26 receives the routing data of the input channels (ICHRD) 29 from a connection control function (not illustrated in the figure), each time a connection is established or released.

Then, after updating the routing data, the ICRC module 26 updates the total number of channels by destination CCTM (TNCDC) managed by the CCC module 28 by sending TNCDC update information (TNCDCU ) 21 0 to the latter. The CCC module 28 uses the destination CCTM information received (DCCTM) 21 1 to develop the instructions 2 1 1 for appropriate channel grouping (CHCI) for the CAU module 24, according to the technique of (re) grouping of channels described above. .

The CAU module 24 receives the input channel sample 23 (ICHS) as well as the transferred channel identity 21 2 (TCHI), and ensures the necessary assembly of the channel data block in the cell at multiple intervals in function of the instructions CHCI 2 1 1 of the module CCC 28. The module ICRC 26 is organized around a translation table for the input channels (ICTT) as illustrated in FIG. 3A and 3B. The entry of this ICTT 31 table selected by the ICHI data

32 contains the destination CCTMs 33 (DCCTM) to which the input channel is to be routed. In addition, in the context of version A (FIG. 3A), it also contains the identity of the output channel 34 (OCHI). In the context of version B, illustrated in FIG. 3B, it only includes the DCCTM 33.

The CCC module 28 is organized around a memory 41 for channel group management (CCCM) as illustrated in FIG. 4. Each memory line of the CCCM 41 selected by one of the particular CCTMs contains the two TNCDC parameters 42 ( total number of channels per destination CCTM) and NARCH 43 (number of channels already received) as defined above.

The two parameters TNCDC 42 and NARCH 43 are transmitted to a channel grouping control logic (CCCL) after incrementation 45 of the value NARCH 44 when a channel is received (this incremented value is then written in the NARCH field of the address concerned in the CCCM memory).

The module CCCL 44 executes the logic operations required to implement the channel grouping mechanism described above, and generates the instructions 21 1 for assembling the appropriate channels (CHCI) for the module CAU 24.

At the same time, the TNCDC parameter (total number of channels per destination CCTM) must be updated (46), that is to say incremented or decremented, each time information 47 for updating the TNCDC (TNCDU ) is sent by the ICRC 26 module indicating that a channel must be added or removed from the TNCDC for one of the CCTMs (connection establishment or release).

The CAU 24 module is organized around two buffer memories used to assemble cells at multiple intervals, one for cell headers (first intervals) and the other for the cell data field (data intervals) as shown in Figure 5. This particular structure makes it possible to construct the cell header of a new cell while the first channel data block (for this cell) is received, which is stored in the second memory.

The first buffer memory 51 is the header memory (CHBM) which comprises K 64-bit entries, each memory line containing the header of a cell, (that is to say the first interval of a cell), which is constructed when a new cell must be assembled for a destination CCTM. The second buffer memory 52 is the data memory (DSBM) which comprises K _D 64-bit inputs (8 bytes per interval), each data interval containing up to 4 blocks of channel data.

Each buffer memory 51 and 52 (CHBM and DSDM) is managed as a conventional shared buffer memory, in which any available interval memory location can be allocated to a cell by a function for managing the available interval memory locations (the available intervals are typically managed as a FIFO stack or a linked list of available locations).

The size of these buffer memories CHBM 51 and DSDM 52 (that is to say the number of memory locations of intervals K _H and K _D ) is chosen as a function of the probability that there is a need for more than K _H and K _D locations for storing intervals respectively for all the cells simultaneously being assembled or awaiting transmission.

To permanently manage the control of the addresses of CHBM and DSBM intervals for each cell being assembled, a conventional linked list technique is used to chain the addresses of consecutive cell intervals, using two control memories 53 and 54 address of intervals: a memory 53 of the pointers of list of intervals (SLPM); a memory 54 of linked list of intervals (SLLM). The SLPM memory 53 has Q entries, each entry corresponding to a particular destination CCTM (DCCTM) and containing two interval address pointers, namely: the pointer 55 of a first interval address (FSAP) which designates the address of the first interval of the cell (cell header) stored in the memory CHBM 51; the last interval address (LSAP) pointer 56 which designates the address of the last current cell interval stored in the DSDM memory 52.

The SLLM memory 54 has K = K _H + K _D entries, so as to cover the full address range of the two buffer memories 51 and 52 (CHBM and DSDM), each entry containing the address of the next interval of the cell in DSBM memory 52 (since the next interval cannot of course be the first of a cell, it is always a data interval, which is therefore stored in DSBM memory). 4-2-2 Operation

4-2-2- 1 relationships between the CCC and the CAU The CCC module 28 delivers channel grouping instructions to the CAU module 24 each time a new channel is received and must be assembled in a cell. In connection with the cell assembly process, three channel reception situations can be encountered by the CCC 28 module (always assuming that the cell assembly technique is such that the CCC 28 module always knows the number of channels group in each cell): first channel of a cell; intermediate channel of a cell; last channel of a cell. These different types of channels are therefore specified by a channel type indicator (CHTI) which can be coded with 2 bits FCH (first channel) and LCH (last channel):

FCH = 0 and LCH = 0: intermediate channel (neither the first nor the last); - FCH = 0 and LCH = 1: last channel;

FCH = 1, LCH = 0: first channel;

FCH = 1, LCH = 1: first and last channel. In addition, for each channel received, the module CCC 28 provides the following information to the module CAU 24: the identity of the destination CCTM (DCCTM); the position of the channel data block (CHEP) in the cell.

In parallel, when a first channel is received, the CCC module 28 indicates the number of channel data blocks in the cell to the CAU module 24.

4-2-2-2 Operations performed by the CAU module When a new channel is received, the CAU module 24 adds the data block of the corresponding channel in a cell as follows, according to the channel type indicator (CHTI ) given by the CCC 28 module: a - first channel

When it is a first channel, a new cell is created for the destination CCTM concerned, which requires: the allocation of a new first interval (cell header) in the memory CHBM 51; allocating a new data interval in the DSBM memory 52 (for the second interval of the cell). These selected addresses are stored as follows, in interval address control memories: in the entry of the concerned DCCTM of SLPM 53, the first interval supplied is registered as a pointer for first interval address (FSAP) and the data interval is registered as the last interval address (LSAP) pointer; in the SLLM memory 54, the link between the first two intervals is established by writing the address of the data interval (that is to say the second interval) in the memory line corresponding to the first interval. In parallel, the contents of these two intervals are prepared as follows, in the buffer memories: in the memory CHBM 51, the cell header is constructed by writing the information required for the cell, comprising: the identity of the destination CCTM concerned (to which the cell will be routed); - the identity of the issuing CCTM (required only in the case of version B); the number of channel data blocks in the cell (NCHEIC) delivered by the CCC module 28 as part of the channel grouping instructions; - in DSBM memory 52, the data block of the channel received (i.e. the channel sample and the channel identity) is stored in the new data interval provided in the 16 bit field defined by the position of the channel data block (CHEP) provided by the CCC module 28 in the form of part of the channel grouping instructions, namely position # 1 in this case. b - intermediate channel

In the case of an intermediate channel, the CAU module 24 reads the pointers 56 of address of the last interval (LSAP) in the memory SLPM 53 to find the address of the last current data interval where the data block of the channel received channel must be stored in DSBM memory 52 at the position defined by the CHEP pointer supplied by the CCC 28 module.

When a fourth channel entry is entered in a data interval, the latter is completely full and a new data interval is required and allocated to the cell in advance. Consequently, the address of the next data interval is written: in the memory SLPM 53 as an address counter for the last interval (update of the LSAP); in the memory SLLM 54 as a new interval address in the memory line of the interval which has just been completed (update of the linked list), c- last channel In the case of a last channel, the CAU 24 first stores the last block of channel data received in the memory DSBM 52, at the position designated by the pointer CHEP, in the same way as in the case of an intermediate channel. Then, the cell being complete, the latter is transferred to a cell transmission queue to exit the ASC, via the CTI.

To transfer a cell from the preceding assembly phase to the new transmission phase, it is equivalent and simpler, instead of transferring real cells between physical buffers (i.e. - say CHBM and DSBM memories to another output buffer), keep the intervals in the CHBM and BSBM memories unchanged, and transfer only the corresponding cell address pointers (i.e. FSAP and LSAP ) to the cell output queue pointers as follows: the cell output queue is a simple linked list of intervals, such that all the intervals of a cell remain linked to each other, and that the first interval d 'a new cell is linked to the last interval of the previous cell; this list of cells awaiting transmission is managed by two cell output queue pointers: - a first interval address pointer (FQSAP

57); a last interval address pointer (LQSAP 58). when a cell is completely assembled and ready to be transmitted, it is added to this complete list by performing the following operations: writing the cell FSAP as a new interval address in the LQSAP entry of the list; writing the LSAP value as a new LQSAP value.

This cell transfer technique simply using the FSAP and LSAP pointers (without using intermediate links between the intervals of a cell) is possible when the complete list of cells awaiting transmission is controlled by the same linked list memory as that used to link the intervals of each cell, i.e. the SLLM memory . Consequently, the cell transmission technique is ensured by successively reading the cell intervals in the buffer memories (CHBM and DSBM), in the order defined in the complete chained list of cells awaiting transmission, by leaving the interval designated by the pointer FQSAP, and by updating the latter with the new interval address found in the linked list memory SLLM. 4-3 output CCTM

The operation of the output CCTMs is relatively simple, when using the dynamic channel grouping technique presented above, because the latter eliminates the need for any configuration management associating sets of channels with particular cells in the output CCTM.

Due to the presence of explicit channel identities in each cell, the output CCTM simply extracts the different blocks of channel data, and transfers the channel samples to a memory for receiving TSSRM channel samples 61, such as 'illustrated in Figures 6A and 6B, using the associated channel identities as described below depending on whether one implements versions A (Figure 6A) or B (Figure 6B) presented above.

In the case of version A, each channel identity of a data block transmitted in the cell is the output channel CHy (for CHI), and this channel identity can be used directly to address the memory TSSRM to memorize the channel samples received.

In the case of version B, each channel identity of a transmitted data block is that of the input channel CHx (ICHI). A translation is therefore necessary to determine which output channel CHy should be associated with the input channel CHx of the starting CCTM.

The use of a classic translation table would require a very large memory including P x Q entries (i.e. 64 kbytes in the case of the example described), since each CHy output channel must be able to be connected to any Chx input channel of each CCTMx. A more economical technique consists in using an addressable memory 62 (CAM) comprising P memory lines (one per outgoing channel), each line comprising the connected CHx / CCTMx address; such a CAM memory makes it possible to determine which line CHy contains the address of the incoming channel. Then, the output channel CHy delivered by the memory CAM is used in the same way as in the context of version A, to store the sample channel at the address CHy of the memory TSSRM. In version A or B, the TSSRM memory is read synchronously to output the stored channel samples according to the rhythm of the synchronous time frame.

Claims

1. Asynchronous cell switching system each comprising a header field and a data field, of the type ensuring the interconnection of incoming and outgoing links, each of said links multiplexing data oppqrtenqnt to at least two synchronous conqux, said system comprising input port modules and output port modules interconnected by at least one stage of intermediate switching elements, in which:

- at least some of said input modules comprise means for forming composite cells comprising: means for storing channel data received from the incoming channels on the incoming links of the input port module; means for constructing channel data blocks each comprising channel information to be transmitted extracted from the channel data received and at least one explicit channel identity associated with said channel information to be transmitted; and means for selective multiplexing of channel data blocks intended for a common destination corresponding to at least one and the same destination output port module, in the data field of at least one composite cell to be transmitted to said common destination;

- And in which at least some of said output modules comprise means for processing said composite cells, comprising: means for extracting and recognizing said blocks of channel data received in the data field of a composite cell, by means said associated explicit channel identities;

- And means for transmitting to at least one outgoing link the channel data belonging to the different channels, as a function of said associated explicit channel identities; characterized in that said explicit channel identity denotes:

2. System according to claim 1, characterized in that said channel data blocks are of fixed and identical lengths.

3. System according to any one of claims 1 to 2, characterized in that said channel data blocks are of variable lengths.

4. System according to claim 3, characterized in that the length of each of said channel data blocks is specified by an indicator associated with each of said channel data blocks.

5. System according to claim 4, characterized in that the length of each of said channel data blocks is fixed for each connection, and known to the destination output port module.

6. System according to any one of claims 3 to 4, characterized in that said variable lengths are multiples of a basic elementary length.

7. System according to any one of claims 1 to 6, characterized in that said selective multiplexing means dynamically group blocks of channel data, without following a predetermined order, according to the order of reception of said channel data.

8. System according to any one of claims 1 to 7, characterized in that said selective multiplexing means dynamically group blocks of channel data, according to a pre-established order.

9. System according to any one of claims 1 to 8, characterized in that said selective multiplexing means dynamically group blocks of channel data, according to a pre-established order dynamically modified, at each transmission cycle.

1 0. System according to any one of claims 1 to 8, characterized in that said selective multiplexing means dynamically group blocks of channel data according to a random or quasi-random order, modified at each transmission cycle.

1 1. System according to any one of Claims 1 to 10, characterized in that the said selective multiplexing means limit the number of channel data blocks to a maximum number of acceptable channel data blocks in the data field of a cell composite.

12. System according to any one of claims 1 to 1 1, characterized in that said selective multiplexing means take into account a maximum duration for assembling a composite cell, and ensure the emission of a composite cell which is not completely filled. when said maximum duration has elapsed.

13. System according to any one of claims 1 to 1 2, characterized in that the length of the data field of said composite cells is variable.

14. The system as claimed in claim 1 3, characterized in that said length of the data field is dynamically adapted as a function of the number and / or of the length of the channel data blocks that said data field contains.

15. Input port module for an asynchronous cell switching system each comprising a header field and a data field, a system of the type ensuring the interconnection of incoming and outgoing links, each of said links multiplexing data belonging to at least two synchronous channels, said system comprising input port modules and output port modules interconnected by at least one stage of intermediate switching elements; each input module comprising means for forming composite cells comprising: means for storing channel data received from the incoming channels on the incoming links of the input port module; means for constructing channel data blocks each comprising channel information to be transmitted extracted from the channel data received and at least one explicit channel identity associated with said channel information to be transmitted; and means for selective multiplexing of channel data blocks intended for a common destination corresponding to at least one and the same destination output port module, in the data field of at least one composite cell to be transmitted to said common destination; characterized in that said explicit channel identity denotes:

- either the address of a synchronous channel entering an input port module;

1 6. Output port module for asynchronous cell switching system each comprising a header field and a data field, a system of the type ensuring the interconnection of incoming links and outgoing links, each of said links multiplexing data belonging to at least two synchronous channels, said system comprising input port modules and output port modules interconnected by at least one stage of intermediate switching elements, each output module comprising means for processing said data composite cells, comprising: means for extracting and recognizing said blocks of channel data received in the data field of a composite cell, by means of said associated explicit channel identities; and means for transmitting to at least one outgoing link the channel data belonging to the different channels, as a function of said associated explicit channel identities; characterized in that said explicit channel identity denotes:

- either the address of a synchronous channel entering an input port module;

1 7. Method for asynchronous switching of cells each comprising a header field and a data field, using a system ensuring the interconnection of incoming and outgoing links, each said data multiplex links belonging to at least two synchronous channels, said system comprising input port modules and output port modules interconnected by at least one stage of switching elements, characterized in that it comprises the following steps: forming composite cells, in at least some of said input modules, comprising the steps of: memorizing channel data received from the incoming channels on the incoming links of the input port module; - construction of channel data blocks each comprising channel information to be transmitted extracted from the channel data received and at least one explicit channel identity associated with said channel information to be transmitted; and selective multiplexing of channel data blocks intended for a common destination corresponding to at least one and the same destination output port module, in the data field of at least one composite cell to be transmitted to said common destination; processing of said composite cells, in at least some of said output modules, comprising the steps of: - extraction and recognition of said blocks of channel data received in the data field of a composite cell, by means of said associated explicit channel identities; and transmitting to at least one outgoing link the channel data belonging to the different channels, as a function of said associated explicit channel identities; and in that said explicit channel identity denotes:

- either the address of a synchronous channel entering an input port module;