EP0976201A1

EP0976201A1 - Integrated circuit for frequency conditioning in a radio transceiver working in the uhf range, especially a wireless telephone

Info

Publication number: EP0976201A1
Application number: EP99914417A
Authority: EP
Inventors: Stefan Heinen; Stefan Beyer
Original assignee: Siemens AG
Current assignee: Infineon Technologies AG
Priority date: 1998-02-13
Filing date: 1999-02-11
Publication date: 2000-02-02
Also published as: JP3754709B2; WO1999041841A1; DE19805963C2; JP2001523431A; US6738602B1; DE19805963A1; CN1263651A; CN1130841C

Abstract

The designed circuit for time division duplex with frequency hopping technique has a total of only two frequency synthesizers (49, 56) for the transmitter and the receiver paths (48, 62) and only one step-up mixer (54) in the transmitter path. The UHF synthesizer frequency is subjected to frequency division before insertion as superimposed frequency of the allocated mixer in the transmitter and receiver paths enabling its utilization for the UHF frequency synthesizer at different frequencies for the transmitter or receiver slot due to the short settling time. One special field of application of the inventive circuit is wireless telephony.

Description

description

Integrated circuit for frequency processing of a radio transceiver working in the UHF range, in particular a cordless telephone

The invention relates to an integrable circuit according to the preamble of claim 1.

Specified UHF frequency ranges can be used for free radio services in some states if certain, precisely prescribed conditions are observed. For example, in the USA the frequency range between 902 MHz and 928 MHz is available as a so-called ISM (Industrial Scientific and Medical) band.

In this UHF frequency band, radio services, e.g. Cordless phones can be realized. However, the boundary conditions specified by the FCC.Federal Communications Commission) with regard to the channel spacing, the 20 dB bandwidth, the output power, etc. must be observed.

There are essentially three system approaches for realizing a cordless phone. The first of these approaches is a so-called Direct Sequence Spread Spectrum System. The radio signal is modulated with a high bit rate sequence of digital signals, the so-called PN (pseudonoise) code, in such a way that a broadband transmission signal results from the superimposition. Each bit of the message signal to be transmitted is thus encoded in a transmitter with the PN code, which can be decoded again in a receiver to which the PN code is known. 2

The second of the system approaches is the implementation of a so-called low power system. There are no restrictive regulations below a transmission power of approx. 0 dBm.

The third system approach is a so-called frequency hopping spread spectrum system. These systems may e.g. have a maximum channel spacing of 500 kHz for the ISM band mentioned, 99% of the power having to be emitted within this bandwidth. This means that there are at least 50 channels available that are used on the basis of a pseudo random sequence.

Using FIG. 1, a system is explained which was previously used for the radio services mentioned, e.g. a cordless telephone is used. This is a frequency division duplex (FDD) system with low output power (0 dBm).

The transmission path 1 of the in FIG. 1 shown transceiver consists of a UHF frequency synthesis device 2, which contains a voltage controlled oscillator (VCO; Voltage Controlled Oscillator) 3, an amplifier 4, a phase locked loop (PLL) and a low-pass filter 6, a subsequent transmission band filter 7 and a transmission output stage 8. The transmission path 1 is connected to the transmission input of a frequency duplexer 9, which is a frequency-separating filter.

An antenna 10 is connected to the frequency duplexer 9 and is used both for transmitting and for receiving. An input of a down mixer 12 is connected to the receiver connection of the frequency duplexer 9 in the reception path 11 of the transceiver via a low-noise amplifier 13 and a bandpass filter 14. The other input of the down mixer 12 is 3 is supplied by a UHF frequency synthesis device 15 which, in terms of the type of its components, has the same structure as the UHF frequency synthesis device 2 for the transmission path 1.

The output of the down mixer 12 is connected to a demodulator 20 via a first IF filter 16, an IF amplifier 17, a second IF filter 18 and IF amplifier 19. In the example according to FIG. 1 at 10.7 MHz. The modulation in transmission path 1 takes place directly on the local UHF frequency synthesis device 2.

The disadvantages of this embodiment approach lie in the high selectivity of the frequency duplexer 9 required and in the limited range due to the low output power. A modification to a frequency hopping system that can be carried out without great technical effort is not possible because of the low bandwidth of the PLL phase-locked loops of the two UHF frequency synthesis devices 2 and 15.

The transfer of the above and based on FIG. 1 described system approach to a time division duplex (TDD) system, as is required for use of the frequency hopping method, leads to a system as shown in FIG. 2 and is explained in the following. Such a system can be used for the radio services mentioned, for example a cordless telephone. The transmission path 21 of the in FIG. The transceiver shown in FIG. 2 has at its beginning a frequency synthesis device 22 operating at 10.7 MHz, which contains a voltage-controlled oscillator 23, an amplifier 24, a PLL phase-locked loop 25 and a low-pass filter 26. Direct modulation takes place in this frequency synthesis device 22. 4 In the transmission path 21, an input is followed by an up-mixer 27, to the other input of which the output signal of an IF frequency synthesis device 28 operated at 100 MHz is fed as a superposition signal, which, in terms of the type of its components, has the same structure as the frequency synthesis device 22.

The output signal of the up-mixer 27 is fed in a higher IF level of 110.7 MHz via an IF filter 29 to the first input of a further up-mixer 30, at the second input of which the superposition frequency is the output signal of a UHF frequency synthesis device 31, which is in can vary a frequency range between 790 MHz and 820 MHz and is also constructed in the same way as the frequency synthesis device 22 with regard to the type of its components.

The output signal of the up-mixer 27 is fed to a subsequent transmission band filter 32 and a transmission output stage 33. The transmission path 21 is then connected to the transmission input of a time-division duplex switch 34, which is a time-controlled switch and which alternately makes the transmission and reception time slots effective. An antenna 36 is connected to the antenna output of the time-division duplex switch 34 via a band filter 35 for 902 MHz to 928 MHz, which serves both for sending and for receiving.

An input of a down mixer 38 is connected to the receiver connection of the time-division duplex switch 34 in the reception path 37 of the illustrated transceiver via a low-noise amplifier 39 and a bandpass filter 40. The other input of the down mixer 38 is supplied by the UHF frequency synthesis device 31, which is also provided for the transmission path 21. 5 The output of the down mixer 38 is in the higher IF

Level connected via an IF filter 41 for 110.7 MHz to the one input of a down mixer 42, which is supplied at its other input by the IF frequency synthesis device 28, which also serves for the up mixer 27 as a generator of an IF beat frequency of 100 MHz is provided in the transmission path 21.

The down mixer 42 is then connected to a demodulator 47 in a lower IF level via an IF filter 43 for 10.7 MHz, an IF amplifier 44, another IF filter 45 for 10.7 MHz and an amplifier 46. The modulation in the transmission path 21 takes place directly on the first frequency synthesis device 22.

The disadvantage of this design option is the high filter complexity in the transmission path 21. Another disadvantage is that three frequency synthesis devices are required. In addition to the high outlay for the filters on the first transmission or reception intermediate frequency, the additional connections reduce the degree of integration that can be achieved.

The object of the invention is to specify a frequency processing architecture for a freely available UHF radio band, in particular in the 900 MHz range, with which the highest possible degree of integration for a frequency hopping method can be made possible. In particular, an efficient frequency plan must be specified that avoids unwanted mixed products and at the same time enables an optimal time division multiplex (TDMA; Time Division Multiple Access) frame format.

In addition, the smallest possible channel spacing of 200 kHz to 300 kHz should be realized so that channels can be masked dynamically on which strong interference occurs. At the same time, a frame duration of 4 ms should be used 6 must not be exceeded so that echo cancellation can be dispensed with.

This object is achieved in a generic circuit by the features specified in the characterizing part of patent claim 1. In the circuit according to the invention, only two frequency synthesis devices are required. A third frequency synthesis device is therefore not required, which significantly promotes a higher degree of integration. In addition, the concept of the circuit according to the invention allows the use of inexpensive external filters.

By synthesizing the required UHF oscillator signal to at least twice the frequency as in the circuit of FIG. 2, the phase detector reference frequency increases, so that the settling time of the UHF frequency synthesis device can be halved.

This means that two swing-in processes can be accommodated within the same frame duration. This fact enables the UHF frequency synthesis device to be used on different frequencies for the transmission or reception slot, i.e. the frequency offset by the second intermediate frequency is compensated for by the UHF frequency synthesis device.

Appropriate further developments, designs and frequency specifications are specified in the subclaims.

The upward mixing taking place in the transmission path is expediently carried out by an upward mixer with image frequency suppression, the 90 ° phase shift between the input signals being able to be generated by frequency dividers. 7 An embodiment of a circuit according to the invention is described below. Show it:

FIG. 1 shows the block diagram of a circuit with a frequency division duplex (FDD) system with low output power which has already been described and which is to be regarded as disadvantageous,

FIG. 2 shows the block diagram of a circuit with time division duplex (TDD) system and frequency hopping technology, which has also already been described and is to be regarded as disadvantageous, and

FIG. 3 shows the block diagram of a circuit according to the invention with time division duplex (TDD) system and enabling the frequency hopping technique to be carried out.

A circuit designed in accordance with the invention for a time division duplex (TDD) system, as is required for use of the frequency hopping method, is shown in FIG. 3 and is explained below. Such a system can be used for the radio services mentioned, e.g. a cordless phone, find application.

In the example shown, the system operates in an operating frequency range between 902 MHz and 928 MHz with a channel spacing of approx. 200 kHz. The transmission path 48 of the in FIG. 3 has at its beginning a IF frequency synthesis device 49 operating at 99.9 MHz, which contains a voltage-controlled oscillator 50, an amplifier 51, a PLL phase-locked loop 52 and a low-pass filter 53.

In this IF frequency synthesis device 49 there is direct modulation with a vector modulator, the modulation used being a digital frequency modulation, preferably a 8 ne GMSK (Gaussian Minimum Shift Keying) modulation or

GFSK (Gaussian Frequency Shift Keying) modulation.

In the transmission path 48, only a single upmixer 54 is provided, to which the directly modulated output signal of the IF frequency synthesis device 49 with 99.9 MHz as the input frequency and the one divided down via a 1: 2 frequency divider 55 as the UHF beat frequency, before division Output frequency of 1580 MHz to 1660 MHz, which is twice the beat frequency, are fed to a UHF frequency synthesis device 56, which is constructed in the same way with regard to the type of its components as the IF frequency synthesis device 49 already explained.

The up-mixer 54 in the transmission path 48 has a device for image frequency suppression. The 90 ° phase shift between the two input signals of the up-mixer 54 in the transmission path 48 is generated by frequency dividers. The output of the up-mixer 54 is connected via a band filter 57 and a transmit power amplifier stage 58 to the transmit access of a time-division duplex switch 59, which is a time-controlled switch and makes the transmit and receive time slots alternately effective.

An antenna 61 is connected to the time-division duplex switch 59 via a bandpass filter 60 and is used both for transmitting and for receiving.

In the reception path 62 is the reception access of the time-division duplex switch 59 via a low-noise amplifier 63 and

UHF reception filter 64 is connected to the first input of a first down-mixer 65, at the second input of which, as the UHF beat frequency, the output frequency of the UHF frequency synthesis device 56, which is conducted via a corresponding 1: 2 frequency divider 66, is from 1580 MHz to 1660 MHz. The output of the down mixer 65 is connected via an IF band filter 67 of an upper IF level of 110.6 MHz to the one input of a second down mixer 68, at its second input the frequency of 99.9 MHz generated by the IF frequency synthesis device 49 as the beat frequency. The output of the second down mixer 68 of the reception path 62 is to a demodulator 73 via a first IF band filter 69 and a first IF amplifier 70 as well as a second IF band filter 71 and amplifier 72 of a lower IF level of 10.7 MHz connected. The demodulator 73 provided in the reception path 62 is expediently a vector or frequency demodulator.

The table below lists the frequency plan specified with the exemplary embodiment explained above and another advantageous frequency plan which can also be used expediently in a circuit designed in accordance with the invention.

Plan I Plan II

Send and receive band 902 - 928 MHz 902 - 928 MHz

Channel spacing approx. 200 kHz approx. 200 kHz upper IF 110.6 MHz 153.4 MHz lower IF 10.7 MHz 10.7 MHz

UHF synthesizer 1580 - 1660 MHz 1495 - 1575 MHz

IF synthesizer 99.9 MHz 142.7 MHz

Claims

10 claims

1. An integrable circuit for frequency processing of a radio transceiver, in particular at 900 MHz, working in the UHF range, in particular a cordless telephone, for a time division duplex system (TDD; time division duplex) with alternating transmission and reception time slots with each time slot According to a fixed scheme, frequency-assigning frequency hopping technology (FH), with amplifiers, filters and mixers being provided in the transmit path and in the receive path, both of which are alternately connected to a common antenna via a switchable time-duplex switch, and which are used to form intermediate frequencies and the UHF transmit frequency of frequency synthesis devices, each containing a phase locked loop (PLL; phase locked loop) and a phase controlled RF oscillator (VCO; Voltage Controlled Oscillator), are supplied with superposition frequencies, characterized in that only in the transmit path (48) a single upward mix he (54) is provided, which has the directly modulated output signal of an IF frequency synthesis device (49) as an input frequency and the UHF beat frequency which is divided down via a 1: n frequency divider (55) and which is n times the beat frequency before division Output frequency of a UHF frequency synthesis device (56) are supplied and its

Output via a filter (57) and a transmit power amplifier stage (58) is connected to the transmit access of the time duplex switch (59), that in the receive path (62) the receive access of the time duplex switch via a low-noise amplifier (63) and a UHF -Receiver filter (64) is connected to the first input of a first down mixer (65), at whose second input as the UHF beat frequency, the output frequency of the UHF frequency synthesis device (56), which is guided via a corresponding 1: n frequency divider (66), and the - Its output via an IF band filter (67) of an upper IF level 11 is connected to the one input of a second down mixer (68), at the second input of which the frequency generated by the IF frequency synthesis device (49) lies as a beat frequency, and that the output of the second down mixer (68) of the reception path ( 62) is connected to a demodulator (73) via IF band filter (69, 71) and amplifier (70, 72) of a lower IF level.

2. Circuit according to claim 1, characterized in that the up-mixer (54) in the transmission path (48) one

Has device for image frequency suppression.

3. A circuit according to claim 1 or 2, characterized in that the 90 ° phase shift between the two input signals of the up-mixer (54) in the transmission path (48) is generated by frequency dividers.

4. Circuit according to one of the preceding claims, characterized in that the modulator provided for direct modulation in the transmission path (48) is a vector modulator and the demodulator (73) provided in the reception path (62) is a vector or frequency demodulator and in that the modulation used is digital frequency modulation.

5. A circuit according to claim 4, characterized in that the digital frequency modulation used is a GMSK (Gaussian Minimum Shift Keying) modulation.

6. Circuit according to claim 4, characterized in that the digital frequency modulation used a

GFSK (Gaussian Frequency Shift Keying) modulation is.

7. Circuit according to one of the preceding claims, characterized by an application in a Betriebsfre- 12 frequency range between 902 MHz and 928 MHz with a channel spacing of 200 kHz.

8. A circuit according to claim 7, characterized in that the UHF frequency synthesis device (56) generates interchangeable frequencies between 1580 MHz and 1660 MHz, that the IF frequency synthesis device (49) forms frequencies at 99.9 MHz and that the lower IF -Level at a frequency of 10.7 MHz and the upper IF level at a frequency of 110.6 MHz.

9. A circuit according to claim 7, characterized in that the UHF frequency synthesis device (56) generates interchangeable frequencies between 1495 MHz and 1575 MHz, that the IF frequency synthesis device (49) frequencies

142.7 MHz forms and that the lower IF level is at a frequency of 10.7 MHz and the upper IF level at a frequency of 153.4 MHz.