EP0896730B1

EP0896730B1 - Shielded field emission display

Info

Publication number: EP0896730B1
Application number: EP97923607A
Authority: EP
Inventors: Zhongyi Xia; Michael J. Westphal; John K. Lee; Jim J. Browning
Original assignee: Micron Technology Inc
Current assignee: Micron Technology Inc
Priority date: 1996-05-03
Filing date: 1997-05-05
Publication date: 2003-03-26
Anticipated expiration: 2017-05-05
Also published as: DE69720203T2; AU2937297A; KR100424967B1; WO1997042644A1; JP2001501769A; ATE235739T1; EP0896730A1; DE69720203D1; KR20000010738A

Abstract

A field emission display having emitters controlled by an integrated driving circuit. The field emission display includes a charge shield positioned above exposed areas of the substrate to protect driving circuitry integrated into the substrate. The charge shield is a conductive layer within an insulative layer covering the driving circuit. The charge shield is connected to ground or to a low reference potential to bleed away current within the insulative layer, thereby preventing drifting charges from affecting the electrical response of the integrated driving circuit. The charge shield also terminates electric fields within the insulative layer to reduce the effect on the integrated driving circuit of dynamic variations in surface charge. Electrical characteristics of the driving circuit thus remain constant, reducing variations in the current supplied to the emitters, thereby reducing variations in the intensity of light emitted by the display.

Description

Technical Field

This invention relates to a field emission display as defined in the pre-characterized part of claim 1. It also relates to a method of driving an emitting panel of such display.

Background of the Invention

Flat panel displays are widely used in a variety of applications, including computer displays. One type of device suited for such flat panel displays is the field emission display.

Field emission displays typically include a generally planar emitter beneath a display screen. The emitting panel is a substrate having an array of surface discontinuities projecting from an upper surface. In many cases, the surface discontinuities are conical projections, or "emitters" integral to the substrate. Typically, the emitters are grouped into emitter sets where the bases of the emitters in the emitter sets are commonly connected. A conductive extraction grid is positioned above the emitters and driven with a voltage of about 30V-120V. The emitter sets are then selectively activated to produce an electric field extending from the extraction grid to the emitters by providing a current path between the bases of the emitters and ground. In response to the electric field, the emitter sets emit electrons.

The display screen is mounted directly above the extraction grid, and it is coated with a transparent conductive material to form an anode biased to about 1-2kV. The anode attracts the emitted electrons, causing the electrons to pass through the extraction grid. A cathodoluminescent layer covers the anode and faces the extraction grid to intercept the electrons as they travel toward the 1-2kV potential of the anode. The electrons strike the cathodoluminescent layer causing the cathodoluminescent layer to emit light at the impact site. The emitted light then passes through the anode and display screen where it is visible to a viewer.

The brightness of the light produced in response to the emitted electrons depends, in part, upon the rate at which electrons strike the cathodoluminescent layer, which in turn depends upon the amount of current available to provide electrons to the emitter sets. The brightness of each area can then be controlled by controlling the current flow to the respective emitter set. Thus, by selectively controlling the current flow to the emitter sets, the light from each area of the display can be controlled and an image can be produced. The light emitted from each of the areas thus becomes all or part of a picture element or "pixel."

One problem in such field emission displays is consistent control of current to the emitters, especially where driving circuits are integrated into the same substrate as the emitters. Such integrated driving circuits typically include field effect transistors driven by external signals to selectively couple the emitters to ground.

The high impedance of such transistors permits little current leakage through the transistors. Consequently, current leaking into or out of substrate may cause charge accumulation that is not dispersed by the integrated driving circuit. Such charge accumulation can have detrimental effects on the operation of the field emission display. For example, where the integrated transistors are intended to be OFF, charge buildup can affect the biasing of the transistors to allow current to bleed through the transistor channel. Such current bleeding through the transistors may provide electrons to the emitters and cause unwanted emission of light.

In accordance with the pre-characterizing part of claim 1, EP-A-0 496 572 discloses a field emission display having a structure substantially as that outlined hereinabove. The object of the present invention is to avoid the disadvantages of the prior art display device.

This is achieved in accordance with the features of claim 1.

Summary of the Invention

The field emission display according to the invention includes an emitter panel formed from a substrate having several emitters on an upper surface of the substrate. An insulative layer surrounds the emitters and supports an extraction grid. The extraction grid is a conductive layer that encircles the emitters and provides a grid voltage to establish an electric field between the extraction grid and the emitters. If the voltage differential between the emitters and the extraction grid is sufficiently high, the resulting electric field causes the emitters to emit electrons.

A transparent plate covered by a transparent conductive coating forms an anode. The anode is positioned above the emitters and a positive voltage on the order of 1-2 kV is applied to the anode to cause it to attract the emitted electrons. A cathodoluminescent layer covers the transparent conductive anode such that electrons traveling toward the anode strike the cathodoluminescent layer. In response, the cathodoluminescent layer emits light that passes through the transparent plate to be viewed by an observer.

Control of current to the emitters is achieved by driving circuitry integrated into the same substrate that carries the emitters. The integrated driving circuitry includes multiple transistors integrated into the substrate and covered by an insulative layer.

A charge shield covers the insulative layer above the integrated driving circuit to provide a protective barrier for the driving circuit. A passivation layer covers the charge shield to protect and insulate the charge shield. The charge shield provides a conductive ground plane between the passivation layer and the insulative layer to bleed charges to ground, thus preventing the charges from affecting the integrated driving circuitry. Additionally, the charge shield forms a conductive plane that terminates electric field within the passivation layer. By terminating the electric fields, the charge shield reduces the effects of transient changes in surface charge that may otherwise couple to the integrated driving circuitry.

Brief Description of the Figures

Figure 1 is a side elevational view in cross-section of a portion of a conventional field emission display with no charge shield.

Figure 2 is a partial schematic, partial diagrammatic view of the portion of the field emission display of Figure 1.

Figure 3 is a side elevational view in cross-section of a portion of a field emission display according to the invention, including a charge shield.

Detailed Description of the Invention

As shown in Figure 1, a portion of a conventional field emission display 100 includes a section of an emitting panel 102 beneath a screen 104. The emitting panel 102 is formed on a substrate 106 of single crystal, p-type silicon with a pair of emitters 108 projecting upwardly from the upper surface of the substrate 106. The emitters 108 are known electron emitting structures for field emission displays and are fabricated according to conventional fabrication techniques. One skilled in the art will understand that although only two emitters 108 are shown for clarity of presentation, the number of emitters 108 typically will be much larger than two.

Beneath the emitters 108, a first n+ region 110 is formed in the substrate 106 within an n-region 112. The

n regions

110, 112 allow electrical connection to the bases of the emitters 108, as will be described below. An insulative layer 114 of a dielectric material is deposited on the substrate 106. The insulative layer 114 is formed with apertures 113 that surround respective emitters 108. The upper surface of the insulative layer 114 carries a conductive extraction grid 116. The insulative layer 114 and extraction grid 116 are formed according to known fabrication techniques. A passivation layer 120 covers the extraction grid 116 to protect and electrically insulate the extraction grid 116. Within the passivation layer 120 is a conductive line 118 that connects the extraction grid 116 to a grid voltage V_G.

As is typical, the screen 104 is above the emitters 108 and the grid 116. The screen 104 includes a glass plate 150 with its inner surface coated with a conductive, transparent material to form an anode 152. A cathodoluminescent layer 154 coats the exposed surface of the anode 152.

In operation, the extraction grid 116 is biased at a grid voltage V_G of about 30-120V, and the anode 152 is biased at a high voltage V_A, such as 1-2 kV. If the emitters 108 are connected to voltage much lower than the grid voltage, such as ground, the voltage difference between the grid 116 and the emitters 108 produces a sufficiently intense electric field between the emitters 108 and the extraction grid to cause the emitters 108 to emit electrons according to the Fowler-Nordheim equation. The emitted electrons are attracted by the high anode voltage V_A and travel toward the anode 152 where they strike the cathodoluminescent layer 154 causing the cathodoluminescent layer 154 to emit light around the impact site. The emitted light passes through the transparent anode 152 and the glass plate 150 where it is visible to an observer.

The intensity of light emitted by the cathodoluminescent layer 154 depends upon the rate at which electrons emitted by the emitters 108 strike the cathodoluminescent layer 154. The rate at which the emitters 108 emit electrons is controlled, in turn, by controlling current flow to the emitters 108. Thus, the intensity of the emitted light can be controlled by controlling the current flow to the emitters 108.

Current flow to the emitters 108 is controlled by a driving circuit 109 integrated into the substrate 106. The driving circuit 109 is embedded in the substrate 106 beneath the insulative layer 114 which is, in turn, covered by a passivation layer 164 to provide additional protection for the driving circuit 109. The passivation layer 164 is a conventionally formed insulative protective layer.

As will be explained below, the n+ region 110 and n- region 112 beneath the emitters 108, in addition to providing a conductive path to the emitters 108, also form a transistor drain and thus are part of the driving circuit 109. To the right of the n- region 112, a portion of a poly layer 123 covering the substrate 106 extends to a second n+ region 124 to form a gate 125 of a field effect transistor 126 positioned over an insulative layer 122. The drain of the transistor 126 is formed by the n-

type regions

110, 112 and is directly connected to the bases of the emitters 108. The source of the transistor 126 is formed by the second n+ region 124, and is connected to conventional current limiting circuitry (not shown), such as a resistor. A gate voltage is applied to the gate 125 through a conductive line 128 embedded in the insulative layer 114 and a conductive via 130. The equivalent circuit for the transistor 126 and emitters 108 is presented in Figure 2.

Returning to Figure 1, the conductive line 128 extends from the first via 130 to a second via 132 which connects the conductive line 128 to a third n+ region 134. A second section of the poly layer 123 extends from the third n+ region 134 to a fourth n+ region 138. As with the first portion forming the gate 125, the second section of the poly layer 123 forms the gate 136 of a second field effect transistor 140 positioned over an insulative layer 137. The third n+ region 134 is the source of the second transistor 140 and the fourth n+ region 138 is the drain. A buried isolation region 149 of p+ type material electrically isolates the second n+ region 124 from the third n+ region 134 such that the source of the first transistor 126 is electrically isolated from the source of the second transistor 140. The source of the second transistor 140 is electrically connected through the conductive trace 128 and the

vias

130, 132 to the gate 125 of the first transistor 126. The coupling of the

transistors

126, 140 is apparent in the circuit diagram of Figure 2.

Returning again to Figure 1, an externally supplied row voltage V_R, is applied to the gate 136 of the second transistor 140 through a conductive via 142 and a second embedded line 144. The fourth n+ region 138, which is the drain of the second transistor 140, is connected to an image signal V_I by a third embedded line 146.

As can be seen from Figure 2, when the row voltage V_R is high, transistor 140 will be ON and will provide the image signal V_I to the gate of the first transistor 126. The magnitude of current flowing to the emitters 108 then corresponds to the amplitude of the image signal V_I applied to the drain of the second transistor 140.

If the row voltage V_R is low, the second transistor 140 is OFF, and the initially transferred image signal V_I voltage is retained at the source of the second transistor 140 causing the voltage to be continuously applied to the gate of the first transistor 126. If the gate voltage is sufficiently high, the first transistor 126 will continuously provide current to the emitters 108, causing light to be emitted. If the gate voltage is low, the first transistor 126 will be OFF and no light will be emitted. Thus, when the row voltage V_R is high, the intensity of light emission is controlled by the image signal V_I; and, when the row voltage V_R is low, light is emitted at a level corresponding to the voltage of the image signal V_I immediately before the row voltage V_R went low. In typical applications, the image signal V_I is a sample of a video image signal.

The above discussion neglects possible effects on the

transistors

126, 140 of electrons emitted from the emitters 108 and effects of the high anode voltage V_A. Electrons emitted from the emitters 108 can strike the passivation layer 164 and charge the passivation layer negatively. If the electron secondary emission coefficient of the passivation layer 164 is greater than one for the electron impact energy, then the passivation layer can charge positively. The electrons can also cause electron impact ionization of particles either in the gap between the anode 152 and extraction grid 116 or at the surface of the anode 152. These ions will then be collected on the

passivation layer

120 and 164 and cause it to charge positively. Hence, the electrons may directly or indirectly cause a charge to build up on the passivation layer 164. This charge generates an electric field which can affect the operation of the driving circuit 109.

Additionally, as a consequence of the charge buildup, an electric field E₁ is produced within the passivation layer 164 and insulative layer 114. The electric field E₁ can cause migration of charges, such as free electrons or ion impurities, through the insulative layer 114. These charges may cause charge leakage into or out of the substrate 106, especially at regions of the substrate 106 that are uncovered by a metal layer. For example, a portion of the third n+ region at 134 left uncovered by the via 132 is exposed to charge drift through the insulative layer 114.

The electric field E₁ is particularly problematic at the third n+ region 134 when the transistor 140 is intended to be OFF. In this condition, the second transistor 140 presents a very high impedance. Consequently, there is no path to bleed current quickly away from the third n+ region 134. If charge leaks into the n+ region 134, the voltage of the third n+ region 134 may vary, raising the gate voltage of the first transistor 126. In response, the first transistor 126 may no longer be truly OFF, and may allow some current to flow to the emitters 108, thereby causing light to be emitted.

Even if charge leakage into the third n+ region 134 does not cause unwanted light emission, the resulting increase in voltage of the n+ region 134 can be detrimental. For example, during extended operation, the voltage may cause aging or breakdown of the integrated components.

An additional effect of surface charge on the passivation layer 164 arises when the surface charge varies dynamically. Transient conditions, such as an increase in electrons due to activation of a local emitter set 108, can cause dynamic changes in the surface charge density. Such variations in surface charge density can cause electric field variations in the passivation layer 164 and insulative layer 114 which will affect the integrated driving circuit 109. In response, the voltage at the gate of the transistor 126 may vary, causing variations in current flow to the emitters 108.

The present invention, as embodied in the portion of a field emission display 200 shown in Figure 3, addresses the problem of electric fields in the insulative layer 114 and charge leakage into the substrate 106. Several elements of Figure 3 correspond directly to the elements of the display 100 of Figure 1 and are numbered identically. For example, the screen 104, extraction grid 116, emitters 108 and driving circuit 109 are identical to those of the conventional display of Figure 1.

The display 200 of Figure 3 differs from the prior art display 100 of Figure 1 primarily in the use of a charge shield 162 between the passivation layer 164 and the insulative layer 114. The charge shield 162 is formed according to conventional integrated circuit fabrication techniques from a conductive material, such as a metallization layer, deposited atop the insulative layer 114. The addition of the charge shield 162 does not change the interconnection of the elements. Therefore, the equivalent circuit of Figure 2 applies equally to the displays of Figures 1 and 3.

The charge shield 162 is connected to ground and thus provides a continuous ground plane beneath the surface charge buildup on the passivation layer 164. The ground plane of the charge shield 162 terminates the electric field E₂ caused by charge buildup on the surface of the passivation layer 164. Thus, although the electric field E₂ may be high, the electric field E₃ in the insulative layer 114 between the substrate 106 and the charge shield 162 is very small.

Because the charge shield 162 blocks the electric field E₂, any charge drift within the passivation layer 164 caused by the electric field E₂ will be bled to ground. Within the insulative layer 114 beneath the charge shield 162, the charge shift will be minimal due to the low intensity of the electric field E₃ between the charge shield 162 and the substrate 106.

In addition to reducing the effects of charge drift, the charge shield 162 also reduces the effects of dynamic changes in the surface charge by terminating the electric field E₂. Dynamic variations in surface charge within the passivation layer 164 will affect only the electric field E₂, while the electric field E₃ in the insulative layer 114 will be substantially unaffected. Consequently, effects of changes in the electric field E₂ will be directed to the ground plane of the charge shield 162, not the driving circuit 109.

From the foregoing, it will be appreciated that, although an exemplary embodiment of the invention has been described herein for purposes of illustration, various modifications may be made without deviating from the scope of the invention. For example, various alternative driving circuits for controlling emitter currents may benefit from the effects of the charge shield 162. Moreover, although the preferred embodiment has been described as including the passivation layer 164, in some applications the passivation layer 164 may be eliminated. The exposed conductor will then provide a path for removal of any charge on the surface. Also, although the charge shield 162 has been described as being connected to ground in the preferred embodiment, the charge shield 162 may also be connected to a different voltage. Accordingly, the invention is not limited except as by the appended claims.

Claims

A field emission display, comprising:

an emitter (108) carried by a substrate (106);

an integrated electronic driving circuit (109) within or on the substrate (106) and coupled to activate the emitter (108);

an anode (152) positioned above the emitter (108) and the driving circuit (109) and spaced apart from the driving circuit (109); and

a cathodoluminescent layer (154) covering a portion of the anode (152) intermediate the anode (152) and the emitter (108);

characterized by
a charge shield (162) covering the driving circuit (109) intermediate the driving circuit (109) and the anode (152).
The field emission display of claim 1, further including an insulative layer (114) intermediate the driving circuit (109) and the charge shield (162) to electrically isolate the charge shield (162) from the driving circuit (109).
The field emission display of claim 1, further including an insulative passivation layer (164) overlaying the charge shield (162), the passivation layer (164) being positioned between the charge shield (162) and the cathodoluminescent layer (154).
The field emission display of claim 1 wherein the charge shield (162) is a layer of conductive material.
The field emission display of claim 4 wherein the anode (152) is connected to a first voltage (V_A), and wherein the charge shield (162) is electrically coupled to a second voltage, below the first voltage (V_A).
The field emission display of claim 5, further including an insulative passivation layer (164) overlying the charge shield (162) between the charge shield (162) and the cathodoluminescent layer (154).
The field emission display of any of claims 1 to 6, having a plurality of emitters (108) and a grid (116),

wherein said substrate (106) comprises a first type of material;

a conductive layer (144) covers a section of the substrate (106) to provide signals to the section of the substrate (106), the conductive layer (144) including a gap therein to define an exposed section of the substrate;

a layer (134, 138) of a second type of material is provided within the substrate (106), at least a portion of the layer (134, 138) of the second type being within the exposed section of the substrate (106);

an insulative layer (114) covers the portion of the layer (134, 138) of a second type within the exposed portion; and

said conductive charge shield (162) covers the insulative layer (114) above the exposed portion and electrically isolated from the layer (134, 138) of the second type of material by the insulative layer (114).
The field emission display of claim 7, further including an electrical contact extending between the charge shield (162) and a section of the substrate (106) to maintain the charge shield (162) and the section of the substrate (106) at substantially the same voltage.
The field emission display of claim 1, wherein a grid, is provided and said anode is spaced apart from the emitters and grid, the grid being biased to a grid voltage comprising:

said substrate (106) of a first type of material;

said integrated electronic driving circuit having a region of a second type of material within the substrate, at least a portion of the region of the second type being uncoated by metal;

an insulative layer (114) covering the uncoated portion of the region of the second type; and

a conductive layer (144) covering the insulative layer above the uncoated portion and connected to a voltage below the grid voltage to terminate electric fields induced in the insulative layer (114) in response to electrons emitted by the emitters (108).
The field emission display of claim 9, further including an insulative passivation layer (164) overlying the charge shield (162) between the charge shied (162) and the anode (152).
The field emission display of claim 9, further including an electrical contact extending between the charge shield (162) and a section of the substrate to maintain the charge shield (162) and the section of the substrate at substantially the same voltage.
A method of driving an integrated control circuit of an electron emitting panel (109) of a field emission display having an anode (152) spaced apart from the emitting panel and the driving circuitry (109) comprising the steps of positioning a conductive charge shield (162) between the anode (152) and the driving circuit (109), with the charge shield (162) electrically isolated from the driving circuit (109) and the anode (152).