EP0878755A1 - Nonvolatile semiconductor disk device - Google Patents
Nonvolatile semiconductor disk device Download PDFInfo
- Publication number
- EP0878755A1 EP0878755A1 EP97307412A EP97307412A EP0878755A1 EP 0878755 A1 EP0878755 A1 EP 0878755A1 EP 97307412 A EP97307412 A EP 97307412A EP 97307412 A EP97307412 A EP 97307412A EP 0878755 A1 EP0878755 A1 EP 0878755A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- memory
- data
- writing
- memory chips
- chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0625—Power saving in storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0653—Monitoring storage devices or systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Definitions
- the present invention relates to a nonvolatile semiconductor disk device (hereinafter referred to as a "disk card”) as one of peripheral function extender cards of a personal computer (hereinafter abbreviated to a "PC”), etc., and also relates to writing control to this disk card.
- a nonvolatile semiconductor disk device hereinafter referred to as a "disk card”
- PC personal computer
- the disk card as a peripheral device of the PC is stored with data.
- the disk card is capable of holding a content of the storage without requiring a power supply.
- a nonvolatile semiconductor memory such as, e.g., a flash memory is employed as a storage medium of the disk card.
- This nonvolatile semiconductor memory is stored with the data in such a form as to be formatted to a fixed size called a sector as in the case of the disk device like a flexible disk and a hard disk.
- the disk card in a name card size becomes, with increases by leaps in storage capacity of the semiconductor memory, capable of storing the data of several tens of Mega bytes.
- This disk card is used for storing data about a picture photographed by, e.g., a digital camera in the way of utilizing merits of being small in size but large in capacity and of the storage content being held even when switching off the power supply.
- the disk card with a completion of the photography is taken out of the digital camera and set in the PC, and the image data stored thereon can be read and digitally processed.
- FIG. 1 is a diagram showing one example of a conventional disk card.
- This disk card includes an interface unit 10 connected to a host 1 such as the digital camera and the PC, a central processing unit (hereinafter abbreviated to a "CPU") 20 for executing whole control within the disk card by transmitting and receiving a variety of control signals to and from this host 1, a disk control unit 30 for controlling a transfer of the data to the host 1, an internal bus 40 through which to transfer the data inwardly the disk card, and a storage unit 50 for storing the data.
- a host 1 such as the digital camera and the PC
- CPU central processing unit
- the disk control unit 30 has a buffer memory 31 for temporarily holding sector-basis data given from the host 1.
- the sector contains e.g., 536-bytes data in such a fixed format that a header portion containing data about a validity, etc. of this sector and a correction code for correcting an error are added to, e.g., 512-bytes data.
- the disk control unit 30 incorporates a function to write sector-basis data to the corresponding storage unit 50 via the internal bus 40 on the basis of an address signal given via the interface unit 10, and to read the sector-basis data stored in the storage unit 50.
- the storage unit 50 is constructed of a plurality (e.g., 15 pieces) of memory chips 50a, 50b, ..., 50n connected in common to the internal bus 40.
- each of the memory chips 50a - 50n has the same construction, and includes a buffer memory 51 for temporarily holding the sector-basis data and a nonvolatile semiconductor memory 52 for storing the sector-basis data.
- the nonvolatile semiconductor memory 52 is capable of holding a content of the storage even if a supply of the power supply is stopped.
- Each of the memory chips 50a - 50n has a memory control unit 53 for controlling a transfer of the sector-basis data between the buffer memory 51 and the nonvolatile semiconductor memory 52.
- the write data is temporarily held in the buffer memory 31 within the disk control unit 30 via the interface unit 10.
- the data held in the buffer memory 51 in the memory chip 50i is written to a predetermined storage area in the nonvolatile semiconductor memory 52 under the control of the memory control unit 53.
- a transfer time of the data transferred from the host 1 to the buffer memory via the interface unit 10 and the buffer memory 31, is on the order of several hundred ⁇ s.
- the storage unit 50 is divided into a plurality of memory chips 50a - 50n, and each memory chip, e.g., 50a is provided with the buffer memory 51 and the nonvolatile semiconductor memory 52.
- the data is independently written to the nonvolatile semiconductor memory 52 from each of the buffer memories 51. With this operation, there can be substantially equivalently executed the writing process to the disk card from the host 1.
- the sector-basis data is read from the corresponding storage area in the nonvolatile semiconductor memory 52.
- the thus read data is temporarily held in the buffer memory 51 and thereafter held in the buffer memory 31 within the disk control unit 30 via the internal bus 40.
- the data written to the buffer memory 31 is further transferred to the host 1 via the interface unit 10.
- the storage unit 50 is divided into the plurality of memory chips 50a - 50n in order to substantially equivalently hold an access speed for high-velocity writing and reading processes in the interface unit 10.
- each of the memory chips 50a - 50n is provided with the buffer memory 51.
- the disk card is capable of equivalently executing the writing operations at the high speed by executing the writing operations to the memory chips 50a - 50n in parallel.
- An electric current necessary for the writing operation per memory chip is on the order of, e.g., 15 mA.
- the storage unit 50 requires a current of approximately 150 mA when ten pieces of memory chips 50i are in the simultaneous writing operations.
- the host 1 must include a power supply having a current capacity allowing for it.
- the thus constructed disk card is used not only simply as a peripheral device of the PC but also for storing data about photographed picture in such a way as to be attached to, e.g., a digital camera.
- the digital camera is driven by a battery and therefore has a limit in terms of being supplied with a large current when writing the image data.
- a nonvolatile semiconductor disk device is a disk card comprising an interface unit for transferring data given from outside, a plurality of memory chips each including a nonvolatile semiconductor memory for storing data and a buffer memory for temporarily holding the data to write the data to the semiconductor memory, and a control unit for outputting the data transferred via the interface unit, reading the data from a corresponding memory chip in accordance with a designation given from outside and outputting the data to the interface unit.
- the control unit monitors the number of simultaneous writing processes that are simultaneously being executed in the plurality of memory chips, and controls the outputs of the data given from outside to the corresponding memory chips so that the number of simultaneous writing processes does not exceed a predetermined number.
- control unit has a function added thereto, to output the data to the memory chips and thereafter to start monitoring a completion of the writing processes to the memory chips after an elapse of a fixed time substantially corresponding to a necessary writing time in the memory chips.
- the nonvolatile semiconductor disk device is so constructed as to take a card-like configuration as a disk card and to be attachable and detachable to the processor through the interface unit.
- the nonvolatile semiconductor disk device since the disk card is constructed as described above, exhibits the following operations.
- the control unit when the data is transferred from the processor via the interface unit, checks the number of memory chips that are now in the process of the writing operations.
- control unit outputs the data to the relevant memory chips if the number of the memory chips in the writing processes is less than a predetermined number.
- the control unit if the number of the memory chips in the writing processes is the predetermined number, does not output the data to the relevant memory chips till the number of the simultaneous writing processes becomes less than the predetermined number.
- control unit outputs the data to the memory chips just when the number of the simultaneous writing processes becomes less than the predetermined number.
- the nonvolatile semiconductor disk device exhibits the following operations.
- the control unit checks the number of the memory chips that are now in the writing processes when the data is transferred from the processor via the interface unit.
- control unit if the number of the memory chips in the writing processes is less than the predetermined number, outputs the data to the relevant memory chips.
- control units After an elapse of a fixed time substantially corresponding to a necessary write time, starts monitoring whether or not the writing processes are completed.
- control unit if the number of the memory chips in the writing processes, does not output the data to the relevant memory chips till the number of the simultaneous operations becomes less than the predetermined number.
- control unit if the number of the simultaneous writing operations is less than the predetermined number as a result of monitoring the completion of the writing processes, outputs the data to the memory chips, and the data is written to the semiconductor memory in the memory chip.
- FIG. 2 is a diagram showing a construction of a disk card in a first embodiment of the present invention.
- This disk card takes a card-like configuration in a name card size enough to be attachable to a digital camera, etc..
- the disk card includes an interface module (e.g., an interface unit) 10, control modules (e.g., a CPU 20 and a disk control unit 30A), an internal bus and a storage unit 50.
- an interface module e.g., an interface unit
- control modules e.g., a CPU 20 and a disk control unit 30A
- internal bus e.g., a USB bus
- storage unit 50 e.g., a storage unit 50.
- the interface unit 10 is, as in the case of the prior art disk card, connected to a host 1 such as a digital camera and a PC.
- the interface unit 10 pursuant to, for example, the ATA (Advanced Technology Attachment) Standards defined as hard disk standards proposed by IBM in U.S.A., is connected to the host 1 and transmits and receives data and a variety of control signals.
- ATA Advanced Technology Attachment
- a CPU 20 for controlling the whole units within the disk card and a disk control unit 30A incorporating functions different from those in the prior art, are connected to the interface unit 10 in the same way with the prior art.
- This disk control unit 30A includes a buffer memory 31, having storage capacity for a plurality of sectors, for temporarily storing sector-basis data (e.g., 536 bytes) given from the host 1.
- sector-basis data e.g., 536 bytes
- the disk control unit 30A is capable of inputting the sector-basis data from the host irrespective of an operating status of the storage unit 50.
- the disk control unit 30A monitors the number of simultaneous operations of memory chips 50a - 50n in the storage unit 50 in addition to the conventional functions described above.
- the number-of-chips managing unit 32 has, e.g., three pieces of unillustrated registers 32a for registering addresses of the memory chips 50i that are in the process of writing operations.
- the internal bus 40 is a common bus for transferring the data between the disk control unit 30A and the storage unit 50.
- the internal bus 40 is constructed of an address line, a data line and a control line.
- the storage unit 50 consists of a plurality (e.g., 15 pieces) of memory chips 50a - 50n connected in common via the internal bus in the same way with the prior art.
- These memory chips 50a - 50n to which addresses different from each other are allocated, each take the same configuration, and respectively have a buffer memory 51 for temporarily storing the sector-basis data and a nonvolatile semiconductor memory 52 for storing the sector-basis data.
- Each nonvolatile semiconductor memory 52 has a storage capacity of, e.g., an 8M bits, and contents of the storage are held even if a supply of the power supply is stopped.
- each of the memory chips 50a- 50n has a memory control unit 53 for controlling a transfer of the sector-basis data between the buffer memory 51 and the nonvolatile semiconductor memory 52.
- Write data is, when the host 1 issues a command to write the data, temporarily written to the buffer memory 31 in the disk control unit 30A via the interface unit 10.
- the three registers 32a within the number-of-chips managing unit 32 are registered with the addresses of the memory chips 50i in the process of the writing operations.
- the number-of-chips managing unit 32 checks contents of these three registers 32a when the data writing command is given thereto.
- the disk control unit 30A After outputting the write data, the disk control unit 30A periodically monitors statuses of the memory chips 50i in the process of the writing operations, the addresses of which are registered in the three registers 32a, thereby monitoring a completion of the writing operation.
- a reading command is issued to the memory chip 50i, and, if a response therefrom is a BUSY status, it is judged that the writing operation is uncompleted.
- the output of the write data to the memory chip 50i from the disk control unit 30A remains stopped till a completion of the writing operations to the memory chips 50i the addresses of which are registered in the three registers 32a.
- the addresses of the memory chips 50i are registered to the empty registers 32a, and the writing command is given to the memory chips 50i.
- the disk control unit 30A in the disk card in accordance with the first embodiment incorporates the number-of-chips managing unit 32 for monitoring the number of the memory chips 50a - 50n which operate simultaneously, whereby it never happens that the memory chips 50i exceeding the number of chips that is preset by the number-of-chips managing unit 32 simultaneously perform the writing operations.
- a consumption electric current of the storage unit 50 that is needed when writing the data to the memory chips 50i comes to a maximum value corresponding to the number of chips which is set by the number-of-chips managing unit 32.
- the power supply having a large capacity is not required to be prepared for the processor 1 such as, e.g., a digital camera, etc..
- the disk control unit 30A includes the buffer memory 31 capable of temporarily holding plural pieces of data given from the host 1, and therefore, even when the writing operations to the memory chips 50i are limited, it is feasible to receive the data from the host 1. An influence on the processing on the side of the host 1 is thus reduced.
- FIG. 3 is a diagram showing a construction of the disk control unit in the disk card in a second embodiment of the present invention.
- a disk control unit 30B is substitute for the disk control unit 30A in FIG. 1.
- the disk control unit 30B is constructed by adding a memory control timer 33 to the disk control unit 30A.
- the memory control timer 33 has a count timer 33a for counting a necessary write time in the memory chip 50i.
- the count timer 33a is a timer, when the disk card executes the writing operation for the first time, for counting the time needed for this writing operation.
- An output side of the count timer 33a is connected to a time storage register 33b for storing the time counted by the count timer 33a as a time substantially corresponding to the necessary write time.
- the countdown timers 33c - 33e count down the necessary write time loaded from the time storage register 33b with an elapse of time.
- the count-down timers 33c - 33e when values thereof come to "0", start monitoring the completion of the writing operations to the relevant memory chips 50i.
- the write data is temporarily written to the buffer memory 31 in the disk control unit 30B via the interface unit 10.
- the disk control unit 30B When a value of the count-down timer 33j comes to "0", the disk control unit 30B is informed of this purport, and the disk control unit 30B monitors a status of the relevant memory chip 50i.
- the disk control unit 30 incorporates the memory control timer 33, and just when the writing process is completed, this memory control timer 33 gives a notification.
- control module for restricting the simultaneous writing operations to the memory chips by managing the output of the write data to the plurality of memory chips. It is therefore possible to prevent the power supply from making a large current flow momentarily therefrom and to thereby reduce the capacity of the power supply.
- the second invention after the necessary write time of the memory chip has elapsed, the completion of the writing operation to that memory chip is monitored. Therefore, the unnecessary operation for monitoring is eliminated, which leads to a decrease in the consumption electric power.
- the disk card is formed in the card-like shape and can be connected via the interface module to the host such as the digital camera, etc..
- the disk card is, when in use, suitably attached to the portable host having a small capacity of the power supply.
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
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Abstract
Description
Claims (10)
- A nonvolatile semiconductor disk device comprising:interface means for transferring data to an outside device;a plurality of memory chips each including a nonvolatile semiconductor memory for storing data transferred from or to said interface means, and a buffer memory for temporarily holding the data to write the data to said nonvolatile semiconductor memory; andcontrol means for outputting the data transferred from said outside device via said interface means to said memory chip, reading the data from said memory chip and outputting the data to said interface means,
wherein said control means monitors the number of writing processes that are simultaneously being executed in said plurality of memory chips, and controls the outputs of the data to said memory chips so that the number of simultaneous writing processes does not exceed a predetermined value. - A nonvolatile semiconductor disk device according to claim 1, wherein said control means outputs the data to said memory chips and thereafter starts monitoring whether or not the writing processes to said memory chips are completed after an elapse of a fixed time substantially corresponding to a necessary writing time in said memory chips.
- A nonvolatile semiconductor disk device according to claim 1, wherein said control means further includes registers for registering addresses of said memory chips in the process of the writing operation, and controls the outputs to said memory chips so that the number of simultaneous writing operations does not exceed a predetermined value on the basis of the addresses registered in said registers.
- A nonvolatile semiconductor disk device according to claim 1, wherein said control means further includes a memory control timer for counting the time needed for writing to said memory chips, and starts monitoring whether or not the writing operations to said memory chips are completed, with a write time counted by said memory control timer serving as a trigger.
- A non-volatile memory device comprising: interface means (10) for transferring data to and from the device; a plurality of non-volatile memory circuit devices (50a..50n) for storing data transferred thereto from said interface means; and control means (30a) for controlling the transfer of the data to the memory circuit devices characterised in that the control means includes means (32) which in use monitors the number of data writing processes that are concurrently being executed in said plurality of memory circuit devices, and controls the transfer of the data to the memory circuit devices so that the number of concurrent writing processes does not exceed a predetermined value.
- A memory device according to claim 5, which comprises a card for insertion into an expansion slot of a personal computer.
- A memory device according to claim 5 or 6 wherein the memory circuits comprise non-volatile memory chips (50a..50n).
- A memory according to any one of claims 5 to 7 wherein the control means includes a buffer memory (31) to receive data from the interface means (10) and transfer the data to the memory circuit devices.
- A memory device according to claim 8 including a bus (40) coupling the buffer memory (31) to all of the memory circuit devices (50a..50n).
- A computer fitted with a memory device according to any one of claims 5 to 9.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP126150/97 | 1997-05-16 | ||
JP12615097A JP3821536B2 (en) | 1997-05-16 | 1997-05-16 | Nonvolatile semiconductor disk device |
JP12615097 | 1997-05-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0878755A1 true EP0878755A1 (en) | 1998-11-18 |
EP0878755B1 EP0878755B1 (en) | 2004-05-12 |
Family
ID=14927925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP97307412A Expired - Lifetime EP0878755B1 (en) | 1997-05-16 | 1997-09-23 | Nonvolatile semiconductor disk device |
Country Status (6)
Country | Link |
---|---|
US (1) | US6370628B2 (en) |
EP (1) | EP0878755B1 (en) |
JP (1) | JP3821536B2 (en) |
KR (1) | KR100367322B1 (en) |
CN (2) | CN1099678C (en) |
DE (1) | DE69729070T2 (en) |
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KR100738172B1 (en) * | 1999-12-03 | 2007-07-10 | 캐논 가부시끼가이샤 | Electronic device for managing removable storage medium, method and storage medium therefor |
EP2275914A3 (en) * | 2001-09-28 | 2011-05-11 | Lexar Media, Inc. | Non-volatile memory control |
WO2012015793A1 (en) * | 2010-07-26 | 2012-02-02 | Apple Inc. | Methods and systems for dynamically controlling operations in a non-volatile memory to limit power consumption |
US8522055B2 (en) | 2010-07-26 | 2013-08-27 | Apple Inc. | Peak power validation methods and systems for non-volatile memory |
US8645723B2 (en) | 2011-05-11 | 2014-02-04 | Apple Inc. | Asynchronous management of access requests to control power consumption |
US8826051B2 (en) | 2010-07-26 | 2014-09-02 | Apple Inc. | Dynamic allocation of power budget to a system having non-volatile memory and a processor |
WO2015167919A1 (en) * | 2014-04-29 | 2015-11-05 | Sandisk Enterpprise Ip Llc | Throttling command execution in non-volatile memory systems based on power usage |
US9575677B2 (en) | 2014-04-29 | 2017-02-21 | Sandisk Technologies Llc | Storage system power management using controlled execution of pending memory commands |
US9703700B2 (en) | 2011-02-28 | 2017-07-11 | Apple Inc. | Efficient buffering for a system having non-volatile memory |
US9847662B2 (en) | 2014-10-27 | 2017-12-19 | Sandisk Technologies Llc | Voltage slew rate throttling for reduction of anomalous charging current |
US9880605B2 (en) | 2014-10-27 | 2018-01-30 | Sandisk Technologies Llc | Method and system for throttling power consumption |
US9916087B2 (en) | 2014-10-27 | 2018-03-13 | Sandisk Technologies Llc | Method and system for throttling bandwidth based on temperature |
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US6426893B1 (en) * | 2000-02-17 | 2002-07-30 | Sandisk Corporation | Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks |
JP4078010B2 (en) | 2000-03-03 | 2008-04-23 | 株式会社日立グローバルストレージテクノロジーズ | Magnetic disk apparatus and information recording method |
DE10026003A1 (en) * | 2000-05-25 | 2001-12-06 | Bosch Gmbh Robert | stator |
US6684352B1 (en) * | 2000-07-12 | 2004-01-27 | Sun Microsystems, Inc. | Read control system and method for testing word oriented SRAM with macros |
JP4694040B2 (en) * | 2001-05-29 | 2011-06-01 | ルネサスエレクトロニクス株式会社 | Semiconductor memory device |
JP4575059B2 (en) * | 2004-07-21 | 2010-11-04 | 株式会社日立製作所 | Storage device |
JP4817836B2 (en) * | 2004-12-27 | 2011-11-16 | 株式会社東芝 | Card and host equipment |
KR100621631B1 (en) * | 2005-01-11 | 2006-09-13 | 삼성전자주식회사 | Solid state disk controller apparatus |
JP2006195569A (en) * | 2005-01-11 | 2006-07-27 | Sony Corp | Memory unit |
KR101257848B1 (en) * | 2005-07-13 | 2013-04-24 | 삼성전자주식회사 | Data storing apparatus comprising complex memory and method of operating the same |
US7793059B2 (en) * | 2006-01-18 | 2010-09-07 | Apple Inc. | Interleaving policies for flash memory |
JP4996277B2 (en) * | 2007-02-09 | 2012-08-08 | 株式会社東芝 | Semiconductor memory system |
KR101006748B1 (en) * | 2009-01-29 | 2011-01-10 | (주)인디링스 | Solid state disks controller of controlling simultaneously switching of pads |
JP5226722B2 (en) * | 2010-03-26 | 2013-07-03 | 株式会社バッファロー | Storage device |
CN104102599A (en) * | 2013-04-11 | 2014-10-15 | 华邦电子股份有限公司 | Flash memory device and data transmission method |
KR102229970B1 (en) | 2014-06-27 | 2021-03-22 | 삼성전자주식회사 | Solid state drive including nonvolatile memory, random access memory and memory controller |
WO2016064554A1 (en) * | 2014-10-20 | 2016-04-28 | Sandisk Enterprise Ip Llc | Storage system power management using controlled execution of pending memory commands |
KR20210013845A (en) | 2019-07-29 | 2021-02-08 | 삼성전자주식회사 | Method of operating storage device for improving qos latency and storage device performing the same |
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1997
- 1997-05-16 JP JP12615097A patent/JP3821536B2/en not_active Expired - Fee Related
- 1997-09-15 US US08/929,423 patent/US6370628B2/en not_active Expired - Fee Related
- 1997-09-23 EP EP97307412A patent/EP0878755B1/en not_active Expired - Lifetime
- 1997-09-23 DE DE69729070T patent/DE69729070T2/en not_active Expired - Fee Related
- 1997-11-12 KR KR1019970059490A patent/KR100367322B1/en not_active IP Right Cessation
- 1997-12-16 CN CN97125525A patent/CN1099678C/en not_active Expired - Fee Related
- 1997-12-16 CN CNA021558795A patent/CN1516115A/en active Pending
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US5517241A (en) * | 1991-01-11 | 1996-05-14 | Fuji Photo Film Co., Ltd. | EEPROM memory card for an electronic still camera |
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Cited By (21)
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Also Published As
Publication number | Publication date |
---|---|
CN1516115A (en) | 2004-07-28 |
EP0878755B1 (en) | 2004-05-12 |
JP3821536B2 (en) | 2006-09-13 |
CN1199899A (en) | 1998-11-25 |
DE69729070D1 (en) | 2004-06-17 |
US20010011319A1 (en) | 2001-08-02 |
CN1099678C (en) | 2003-01-22 |
US6370628B2 (en) | 2002-04-09 |
DE69729070T2 (en) | 2004-10-14 |
JPH10320512A (en) | 1998-12-04 |
KR100367322B1 (en) | 2003-04-21 |
KR19980086416A (en) | 1998-12-05 |
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