EP0872789A2 - Internal supply voltage generating circuit - Google Patents

Internal supply voltage generating circuit Download PDF

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Publication number
EP0872789A2
EP0872789A2 EP98105983A EP98105983A EP0872789A2 EP 0872789 A2 EP0872789 A2 EP 0872789A2 EP 98105983 A EP98105983 A EP 98105983A EP 98105983 A EP98105983 A EP 98105983A EP 0872789 A2 EP0872789 A2 EP 0872789A2
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EP
European Patent Office
Prior art keywords
voltage
supply voltage
internal supply
circuit arrangement
reference voltage
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
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EP98105983A
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German (de)
French (fr)
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EP0872789B1 (en
EP0872789A3 (en
Inventor
Gerhard Dr. Müller
Jörg Weller
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Infineon Technologies AG
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Siemens AG
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/465—Internal voltage generators for integrated circuits, e.g. step down generators
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is dc characterised by reference voltage circuitry, e.g. soft start, remote shutdown

Definitions

  • the invention relates to a circuit arrangement for generation an internal supply voltage, with the integrated Circuits are operable.
  • the higher integration density leads to that in comparison to store the lower integration density the electrical Field strength on the individual components of the integrated Circuit, for example on the gate oxides of transistors, is bigger.
  • the stress on the Components is exercised and leads to an increase in the number of failures.
  • the cell fields of Semiconductor memories with an internal supply voltage operated This is usually below the external one Supply voltage with which the outside of the cell fields external circuit is operated.
  • the voltage of the outer circuit reduced from 5 V to the internal supply voltage of 3.3 V.
  • a voltage generator is known from DE 42 26 048 A1, the as long as the external supply voltage is below a certain value, a regulated and constant internal Supply voltage supplies. Exceeds the external supply voltage this particular value, so the internal grows Supply voltage with the external supply voltage on. This is achieved by having the internal supply voltage generating control loop, depending on whether the external Supply voltage below or above this determined Value is either a constant reference voltage or the external supply voltage is supplied.
  • this voltage generator is relatively elaborate device for burn-in test in the semiconductor memory to be checked with this voltage generator, necessary is. Because around the semiconductor memory a defined Suspending stress requires the external supply voltage at a very specific value that is as constant as possible should be kept.
  • the object of the present invention is therefore a circuit arrangement to generate an internal supply voltage specify with which a defined in a simple manner excessive internal supply voltage is provided.
  • the invention has the advantage that the excessive internal supply voltage against fluctuations in the external supply voltage is insensitive. Testing the semiconductor memory, in which the circuit arrangement according to the invention is integrated, puts on a test device, for. B. for Execution of the burn-in test, only minor requirements.
  • Embodiments of the invention are characterized in the subclaims.
  • Figures 1a and 1b show typical courses of the internal Supply voltage of voltage generators according to the state technology depending on the external supply voltage. After a linear rise in the internal supply voltage this remains within a certain range of external supply voltage constant. From a certain The value of the external supply voltage follows the internal supply voltage the external supply voltage. It is it is possible that from this value, as shown in Figure 1a, the internal supply voltage with the external supply voltage is identical or, as shown in Figure 1b, linear increases with the external supply voltage.
  • FIG. 2 shows a possible embodiment of the circuit arrangement according to the invention for generating the internal supply voltage V CCint .
  • a reference voltage V reference which a reference voltage generator RG generates, and the external supply voltage V CCext are fed to a comparison device VE .
  • the output of the comparison device VE is connected to the control connection of a controllable resistor P10.
  • the controllable resistor P10 is also connected to the external supply voltage V CCext and to a connection from which the internal supply voltage V CCint can be tapped.
  • the external supply voltage V CCext is compared with the reference voltage V reference and the controllable resistor P10 is controlled so that the internal supply voltage V CCint takes the value of the reference voltage V reference or a value which is proportional to the reference voltage V reference .
  • the reference voltage generator RG has a first voltage source VREF1 and a second voltage source VREF2. Both voltage sources VREF1, VREF2 are connected to the external supply voltage V CCext . For example, they are each constructed from a double current mirror circuit.
  • the output of the first voltage source VREF1 is connected to the one channel-side connection of a first switching transistor P1.
  • the output of the second voltage source VREF2 is also connected to the one channel-side connection of a second switching transistor N1.
  • the other channel-side connections of the switching transistors N1 and P1 are connected together and form the output of the reference voltage generator RG.
  • the reference voltage V reference is present at this output.
  • the control connections of the switching transistors N1 and P1 are connected to one another and connected to the output of an inverter INV.
  • the input of the inverter INV is at a first circuit node K1.
  • a resistor R lies between the circuit node K1 and a reference potential V SS .
  • This resistor R can be formed, for example, by a field-effect transistor.
  • the channel side of a third switching transistor P2 is connected between the external supply voltage V CCext and the first circuit node K1.
  • the control input of the third switching transistor P2 is connected to a second circuit node K2.
  • a diode chain DK lies between the second circuit node K2 and the reference potential V SS .
  • the diode chain DK consists of at least one diode.
  • the diode chain 6 comprises transistors connected as diodes (P3 to P8).
  • the second circuit node K2 is also connected to the external supply voltage V CCext via the channel side of a fourth switching transistor P9.
  • the control contact of the fourth switching transistor P9 is connected to the first voltage source VREF1.
  • a voltage proportional to the external supply voltage V CCext which is provided in the first voltage source VREF1, is applied to the control terminal of the fourth switching transistor P9.
  • the circuit node K2 If the amount of the supply voltage V CCext is below a certain limit value, for example on the usual operating voltage of the memory, the circuit node K2 is at a low potential.
  • the switching transistor P2 switches through and the circuit node K1 assumes a higher potential than the reference potential V SS .
  • This is equivalent to the fact that a signal value HIGH is present at the input of the inverter INV.
  • the output of the inverter INV consequently assumes the signal value LOW, as a result of which the first switching transistor P1 is switched on and the second switching transistor N1 is blocked.
  • the reference voltage V reference thus takes on the value of the voltage of the first voltage source VREF1.
  • the switching transistor P2 blocks and the circuit node K1 assumes a potential that is only slightly above the reference potential V SS . This corresponds to a signal value LOW at the input of the inverter INV. The output of the inverter INV becomes HIGH. Thus, the second switching transistor N1 turns on and the first switching transistor P1 blocks.
  • the reference voltage V reference now takes on the value of the voltage of the second voltage source VREF2.
  • the first voltage source VREF1 can now be designed such that the reference voltage V reference assumes a value which is suitable for regulating the internal supply voltage V CCint to the value customary for operating the memory field via the comparison device VE and the controllable resistor P10.
  • the second voltage source VREF2 can accordingly be designed in such a way that the internal supply voltage V CCint assumes a higher value than is customary for operating the cell array. This excessive internal supply voltage then serves to carry out the burn-in test.
  • the circuit arrangement according to the invention thus allows two different voltage levels of the internal supply voltage V CCint to be selected solely via the external supply voltage V CCext .
  • FIG. 3 shows the dependency of the internal supply voltage V CCint and the reference voltage V reference on the external supply voltage V CCext in the circuit arrangement according to the invention.
  • the internal supply voltage V CCint takes on two defined, different values depending on the level of the external supply voltage V CCext .

Abstract

An internal supply voltage (Vccint) generation circuit arrangement including a reference voltage generator (RG) which detects a voltage proportional to the external supply voltage (Vccext) and then generates a reference voltage (Vref) in dependence of the amplitude of this voltage, the reference voltage serving to control the internal supply voltage (Vccint) generating device. At least two constant voltage values of the reference voltage (Vref) can be generated from the reference voltage generator (RG), the latter comprising at least two voltage sources (VREF1,VREF2), one of which is designed with a double current-mirror circuit.

Description

Die Erfindung betrifft eine Schaltungsanordnung zur Erzeugung einer internen Versorgungsspannung, mit der integrierte Schaltungen betreibbar sind.The invention relates to a circuit arrangement for generation an internal supply voltage, with the integrated Circuits are operable.

Mit zunehmender Integrationsdichte bei integrierten Schaltungen nehmen die Abmessungen der integrierten Bauteile immer kleinere Werte an. Insbesondere bei Halbleiterspeichern, bei denen die Speicherkapazität und damit die Anzahl der Speicherzellen immer weiter vorangetrieben wird, ist ein geringer Platzbedarf pro Speicherzelle von großer Bedeutung.With increasing integration density in integrated circuits always take the dimensions of the integrated components smaller values. Particularly in the case of semiconductor memories which the storage capacity and thus the number of memory cells progress is always a small one Space requirement per memory cell of great importance.

Die höhere Integrationsdichte führt jedoch dazu, daß im Vergleich zu Speichern geringerer Integrationsdichte die elektrische Feldstärke an den einzelnen Bauteilen der integrierten Schaltung, zum Beispiel an den Gateoxiden von Transistoren, größer ist. Somit steigt auch der Streß, der auf die Bauteile ausgeübt wird und führt zu einem Anwachsen der Ausfallzahlen. Um dies zu vermeiden, werden die Zellenfelder von Halbleiterspeichern mit einer internen Versorgungsspannung betrieben. Diese liegt in der Regel unterhalb der externen Versorgungsspannung, mit der die außerhalb der Zellenfelder liegende äußere Schaltung betrieben wird. So wird beispielsweise für das Zellenfeld die Spannung der äußeren Schaltung von 5 V auf die interne Versorgungsspannung von 3,3 V herabgesetzt. Zur Herabsetzung der Spannung sind verschiedene Schaltungen bekannt.However, the higher integration density leads to that in comparison to store the lower integration density the electrical Field strength on the individual components of the integrated Circuit, for example on the gate oxides of transistors, is bigger. Thus, the stress on the Components is exercised and leads to an increase in the number of failures. To avoid this, the cell fields of Semiconductor memories with an internal supply voltage operated. This is usually below the external one Supply voltage with which the outside of the cell fields external circuit is operated. For example for the cell field, the voltage of the outer circuit reduced from 5 V to the internal supply voltage of 3.3 V. There are several ways to lower the tension Circuits known.

Die Abhängigkeit der Lebensdauer des Zellenfeldes von der anstehenden internen Versorgungsspannung und dem daraus resultierenden elektrischen Feld macht man sich beim sogenannten Burn-In-Test zunutze. Dabei wird das Zellenfeld mit einer höheren Spannung als der zum ordnungsgemäßen Betrieb verwendeten internen Versorgungsspannung betrieben. Durch die sich ergebenden Ausfälle der Speicher ist eine Qualitätskontrolle möglich.The dependence of the lifespan of the cell field on the pending one internal supply voltage and the resulting electric field you make yourself with the so-called Use burn-in test. Thereby the cell field with a higher one Voltage than that used for proper operation internal supply voltage operated. By yourself resulting failure of the memory is a quality control possible.

Von außen kann an den Halbleiterspeicher nur die externe Versorgungsspannung angelegt werden. Die interne Versorgungsspannung, die möglichst konstant und unabhängig von äußeren Störeinflüssen sein soll, wird von einem eigens dafür vorgesehenen Spannungsgenerator erzeugt. Da die interne Versorgungsspannung von dem Spannungsgenerator auf einen bestimmten Wert geregelt wird, führt eine Erhöhung der externen Versorgungsspannung nicht gleichfalls zu einer Erhöhung der internen Versorgungsspannung. Mit herkömmlichen Spannungsgeneratoren ist deshalb die Durchführung des Burn-In-Tests nicht möglich.Only the external supply voltage can be connected to the semiconductor memory from the outside be created. The internal supply voltage, the most constant and independent of external Interference should be provided by a specially designed Voltage generator generated. Because the internal supply voltage from the voltage generator to a specific one Value is regulated, the external supply voltage increases not also to an increase in internal Supply voltage. With conventional voltage generators it is therefore not possible to carry out the burn-in test.

Aus der DE 42 26 048 A1 ist ein Spannungsgenerator bekannt, der, solange die externe Versorgungsspannung unterhalb eines bestimmten Wertes liegt, eine geregelte und konstante interne Versorgungsspannung liefert. Überschreitet die externe Versorgungsspannung diesen bestimmten Wert, so wächst die interne Versorgungsspannung mit der externen Versorgungsspannung an. Das wird dadurch erreicht, daß einem die interne Versorgungsspannung erzeugenden Regelkreis, je nach dem, ob die externe Versorgungsspannung unterhalb oder oberhalb dieses bestimmten Wertes liegt, entweder eine konstante Vergleichsspannung oder die externe Versorgungsspannung zugeführt wird.A voltage generator is known from DE 42 26 048 A1, the as long as the external supply voltage is below a certain value, a regulated and constant internal Supply voltage supplies. Exceeds the external supply voltage this particular value, so the internal grows Supply voltage with the external supply voltage on. This is achieved by having the internal supply voltage generating control loop, depending on whether the external Supply voltage below or above this determined Value is either a constant reference voltage or the external supply voltage is supplied.

Nachteil dieses Spannungsgenerators ist es, daß eine relativ aufwendige Vorrichtung zum Burn-In-Test, in der Halbleiterspeicher mit diesem Spannungsgenerator geprüft werden sollen, notwendig ist. Denn um die Halbleiterspeicher einem definierten Streß auszusetzen, muß die externe Versorgungsspannung auf einem ganz bestimmten Wert, der dazu möglichst konstant sein soll, gehalten werden. The disadvantage of this voltage generator is that it is relatively elaborate device for burn-in test in the semiconductor memory to be checked with this voltage generator, necessary is. Because around the semiconductor memory a defined Suspending stress requires the external supply voltage at a very specific value that is as constant as possible should be kept.

Aufgabe der vorliegenden Erfindung ist es daher, eine Schaltungsanordnung zur Erzeugung einer internen Versorgungsspannung anzugeben, mit der auf einfache Weise eine definierte überhöhte interne Versorgungsspannung bereitgestellt wird.The object of the present invention is therefore a circuit arrangement to generate an internal supply voltage specify with which a defined in a simple manner excessive internal supply voltage is provided.

Diese Aufgabe wird bei einer Anordnung der eingangs genannten Art durch die kennzeichnenden Merkmale des Patentanspruches 1 gelöst.This object is achieved with an arrangement of the aforementioned Art by the characterizing features of claim 1 solved.

Die Erfindung hat den Vorteil, daß die überhöhte interne Versorgungsspannung gegenüber Schwankungen der externen Versorgungsspannung unempfindlich ist. Die Prüfung der Halbleiterspeicher, in die die erfindungsgemäße Schaltungsanordnung integriert ist, stellt an eine Prüfvorrichtung, z. B. zur Durchführung des Burn-In-Tests, nur geringe Anforderungen.The invention has the advantage that the excessive internal supply voltage against fluctuations in the external supply voltage is insensitive. Testing the semiconductor memory, in which the circuit arrangement according to the invention is integrated, puts on a test device, for. B. for Execution of the burn-in test, only minor requirements.

Ausgestaltungen der Erfindung sind in Unteransprüchen gekennzeichnet.Embodiments of the invention are characterized in the subclaims.

Die Erfindung wird nachstehend anhand der Zeichnung näher erläutert. Es zeigen:

  • Figur 1 den Verlauf der internen Versorgungsspannung bei bekannten Schaltungsanordnungen,
  • Figur 2 eine mögliche Ausführungsform der erfindungsgemäßen Schaltungsanordnung und
  • Figur 3 den Verlauf der internen Versorgungsspannung und der Referenzspannung bei der erfindungsgemäßen Schaltungsanordnung,
    • The invention is explained below with reference to the drawing. Show it:
  • FIG. 1 shows the course of the internal supply voltage in known circuit arrangements,
  • Figure 2 shows a possible embodiment of the circuit arrangement according to the invention and
  • FIG. 3 shows the course of the internal supply voltage and the reference voltage in the circuit arrangement according to the invention,

    • Die Figuren 1a und 1b zeigen typische Verläufe der internen Versorgungsspannung von Spannungsgeneratoren nach dem Stand der Technik in Abhängigkeit von der externen Versorgungsspannung. Nach einem linearen Anstieg der internen Versorgungsspannung bleibt diese innerhalb eines gewissen Bereiches der externen Versorgungsspannung konstant. Ab einem bestimmten Wert der externen Versorgungsspannung folgt die interne Versorgungsspannung der externen Versorgungsspannung. Dabei ist es möglich, daß ab diesem Wert, wie in Figur 1a dargestellt, die interne Versorgungsspannung mit der externen Versorgungsspannung identisch ist oder, wie in Figur 1b gezeigt, linear mit der externen Versorgungsspannung ansteigt.Figures 1a and 1b show typical courses of the internal Supply voltage of voltage generators according to the state technology depending on the external supply voltage. After a linear rise in the internal supply voltage this remains within a certain range of external supply voltage constant. From a certain The value of the external supply voltage follows the internal supply voltage the external supply voltage. It is it is possible that from this value, as shown in Figure 1a, the internal supply voltage with the external supply voltage is identical or, as shown in Figure 1b, linear increases with the external supply voltage.

    Figur 2 zeigt eine mögliche Ausführungsform der erfindungsgemäßen Schaltungsanordnung zur Erzeugung der internen Versorgungsspannung VCCint. Einer Vergleichseinrichtung VE werden eine Referenzspannung VReferenz, die ein Referenzspannungsgenerator RG erzeugt, und die externe Versorgungsspannung VCCext zugeführt.
    Der Ausgang der Vergleichseinrichtung VE ist mit dem Steueranschluß eines steuerbaren Widerstandes P10 verbunden. Der steuerbare Widerstand P10 ist zudem an der externen Versorgungsspannung VCCext und an einem Anschluß, an dem die interne Versorgungsspannung VCCint abgreifbar ist, angeschlossen.
    Die externe Versorgungsspannung VCCext wird mit der Referenzspannung VReferenz verglichen und der steuerbare Widerstand P10 so angesteuert, daß die interne Versorgungsspannung VCCint den Wert der Referenzspannung VReferenz oder einen Wert, der der Referenzspannung VReferenz proportional ist, annimmt.    FIG. 2 shows a possible embodiment of the circuit arrangement according to the invention for generating the internal supply voltage V CCint . A reference voltage V reference , which a reference voltage generator RG generates, and the external supply voltage V CCext are fed to a comparison device VE .
    The output of the comparison device VE is connected to the control connection of a controllable resistor P10. The controllable resistor P10 is also connected to the external supply voltage V CCext and to a connection from which the internal supply voltage V CCint can be tapped.
    The external supply voltage V CCext is compared with the reference voltage V reference and the controllable resistor P10 is controlled so that the internal supply voltage V CCint takes the value of the reference voltage V reference or a value which is proportional to the reference voltage V reference .

    Der Referenzspannungsgenerator RG weist eine erste Spannungsquelle VREF1 und eine zweite Spannungsquelle VREF2 auf. Beide Spannungsquellen VREF1, VREF2 sind mit der externen Versorgungsspannung VCCext verbunden. Sie sind beispielsweise jeweils aus einer Doppelstromspiegelschaltung aufgebaut. Der Ausgang der ersten Spannungsguelle VREF1 ist mit dem einen kanalseitigen Anschluß eines ersten Schalttransitors P1 verbunden. Ebenso ist der Ausgang der zweiten Spannungsquelle VREF2 mit dem einen kanalseitigen Anschluß eines zweiten Schalttransitors N1 verbunden. Die anderen kanalseitigen Anschlüsse der Schalttransistoren N1 und P1 sind zusammengeschaltet und bilden den Ausgang des Referenzspannungsgenerators RG. An diesem Ausgang steht die Referenzspannung VReferenz an. The reference voltage generator RG has a first voltage source VREF1 and a second voltage source VREF2. Both voltage sources VREF1, VREF2 are connected to the external supply voltage V CCext . For example, they are each constructed from a double current mirror circuit. The output of the first voltage source VREF1 is connected to the one channel-side connection of a first switching transistor P1. The output of the second voltage source VREF2 is also connected to the one channel-side connection of a second switching transistor N1. The other channel-side connections of the switching transistors N1 and P1 are connected together and form the output of the reference voltage generator RG. The reference voltage V reference is present at this output.

    Die Steueranschlüsse der Schalttransistoren N1 und P1 sind miteinander verbunden und an den Ausgang eines Inverters INV angeschlossen. Der Eingang des Inverters INV liegt an einem ersten Schaltungsknoten K1. Zwischen dem Schaltungsknoten K1 und einem Bezugspotential VSS liegt ein Widerstand R. Dieser Widerstand R kann beispielsweise durch einen Feldeffekt-Transistor gebildet werden. Zwischen der externen Versorgungsspannung VCCext und dem ersten Schaltungsknoten K1 ist die Kanalseite eines dritten Schalttransistors P2 geschaltet. Der Steuereingang des dritten Schalttransistors P2 ist mit einem zweiten Schaltungsknoten K2 verbunden. Zwischen dem zweiten Schaltungsknoten K2 und dem Bezugspotential VSS liegt eine Diodenkette DK. Die Diodenkette DK besteht aus wenigstens einer Diode. Im vorliegenden Ausführungsbeispiel umfaßt die Diodenkette 6 als Dioden geschaltete Transistoren (P3 bis P8).
    Der zweite Schaltungsknoten K2 ist zudem über die Kanalseite eines vierten Schalttransistors P9 mit der externen Versorgungsspannung VCCext verbunden. Der Steuerkontakt des vierten Schalttransistors P9 ist mit der ersten Spannungsguelle VREF1 verbunden. Dem Steueranschluß des vierten Schalttransistors P9 ist eine der externen Versorgungsspannung VCCext proportionale Spannung aufgeschaltet, die in der ersten Spannungsquelle VREF1 bereitgestellt ist.    The control connections of the switching transistors N1 and P1 are connected to one another and connected to the output of an inverter INV. The input of the inverter INV is at a first circuit node K1. A resistor R lies between the circuit node K1 and a reference potential V SS . This resistor R can be formed, for example, by a field-effect transistor. The channel side of a third switching transistor P2 is connected between the external supply voltage V CCext and the first circuit node K1. The control input of the third switching transistor P2 is connected to a second circuit node K2. A diode chain DK lies between the second circuit node K2 and the reference potential V SS . The diode chain DK consists of at least one diode. In the present exemplary embodiment, the diode chain 6 comprises transistors connected as diodes (P3 to P8).
    The second circuit node K2 is also connected to the external supply voltage V CCext via the channel side of a fourth switching transistor P9. The control contact of the fourth switching transistor P9 is connected to the first voltage source VREF1. A voltage proportional to the external supply voltage V CCext , which is provided in the first voltage source VREF1, is applied to the control terminal of the fourth switching transistor P9.

    Die Funktionsweise der erfindungsgemäßen Schaltungsanordnung wird nachfolgend anhand von zwei Fällen, die sich aus verschiedenen Werten für VCCext ergeben, erläutert.The mode of operation of the circuit arrangement according to the invention is explained below using two cases that result from different values for V CCext .

    Liegt der Betrag der Versorgungsspannung VCCext unterhalb eines bestimmten Grenzwertes, beispielsweise auf der üblichen Betriebsspannung des Speichers, so liegt der Schaltungsknoten K2 auf niedrigem Potential. Der Schalttransistor P2 schaltet durch und der Schaltungsknoten K1 nimmt ein höheres Potential an, als das Bezugspotential VSS. Das ist gleichbedeutend damit, daß am Eingang des Inverters INV ein Signalwert HIGH anliegt. Der Ausgang des Inverters INV nimmt folglich den Signalwert LOW an, wodurch der erste Schalttransistor P1 durchgeschaltet und der zweite Schalttransistor N1 gesperrt wird. Die Referenzspannung VReferenz nimmt somit den Wert der Spannung der ersten Spannungsquelle VREF1 an.If the amount of the supply voltage V CCext is below a certain limit value, for example on the usual operating voltage of the memory, the circuit node K2 is at a low potential. The switching transistor P2 switches through and the circuit node K1 assumes a higher potential than the reference potential V SS . This is equivalent to the fact that a signal value HIGH is present at the input of the inverter INV. The output of the inverter INV consequently assumes the signal value LOW, as a result of which the first switching transistor P1 is switched on and the second switching transistor N1 is blocked. The reference voltage V reference thus takes on the value of the voltage of the first voltage source VREF1.

    Steigt die externe Versorgungsspannung VCCext weiter an, so wächst auch das Potential am Schaltungsknoten K2 an. Erreicht die externe Versorgungsspannung VCCext den Grenzwert, so sperrt der Schalttransistor P2 und der Schaltungsknoten K1 nimmt ein Potential an, das nur wenig über dem Bezugspotential VSS liegt. Das entspricht einem Signalwert LOW am Eingang des Inverters INV. Der Ausgang des Inverters INV wird HIGH. Somit schaltet der zweite Schalttransistor N1 durch und der erste Schalttransistor P1 sperrt. Die Referenzspannung VReferenz nimmt nun den Wert der Spannung der zweiten Spannungsquelle VREF2 an.If the external supply voltage V CCext continues to increase, the potential at the circuit node K2 also increases. If the external supply voltage V CCext reaches the limit value, the switching transistor P2 blocks and the circuit node K1 assumes a potential that is only slightly above the reference potential V SS . This corresponds to a signal value LOW at the input of the inverter INV. The output of the inverter INV becomes HIGH. Thus, the second switching transistor N1 turns on and the first switching transistor P1 blocks. The reference voltage V reference now takes on the value of the voltage of the second voltage source VREF2.

    Es ist also allein von der Höhe der externen Versorgungsspannung VCCext abhängig, ob die Referenz VReferenz von der ersten Spannungsquelle VREF1 oder der zweiten Spannungsquelle VREF2 bestimmt wird. Die erste Spannungsguelle VREF1 kann nun so ausgelegt werden, daß die Referenzspannung VReferenz einen Wert annimmt, der geeignet ist, daß über die Vergleichseinrichtung VE und den steuerbaren Widerstand P10 die interne Versorgungsspannung VCCint auf den zum Betrieb des Speicherfeldes üblichen Wert geregelt wird. Die zweite Spannungsguelle VREF2 kann dementsprechend so ausgelegt werden, daß die interne Versorgungsspannung VCCint einen höheren Wert annimmt, als es zum Betrieb des Zellenfeldes üblich ist. Diese überhöhte interne Versorgungsspannung dient dann zur Durchführung des Burn-In-Tests.It is therefore solely dependent on the level of the external supply voltage V CCext whether the reference V reference is determined by the first voltage source VREF1 or the second voltage source VREF2. The first voltage source VREF1 can now be designed such that the reference voltage V reference assumes a value which is suitable for regulating the internal supply voltage V CCint to the value customary for operating the memory field via the comparison device VE and the controllable resistor P10. The second voltage source VREF2 can accordingly be designed in such a way that the internal supply voltage V CCint assumes a higher value than is customary for operating the cell array. This excessive internal supply voltage then serves to carry out the burn-in test.

    Die erfindungsgemäße Schaltungsanordnung erlaubt es also, zwei unterschiedliche Spannungsniveaus der internen Versorgungsspannung VCCint allein über die externe Versorgungsspannung VCCext auszuwählen. The circuit arrangement according to the invention thus allows two different voltage levels of the internal supply voltage V CCint to be selected solely via the external supply voltage V CCext .

    In Figur 3 ist die Abhängigkeit der internen Versorgungsspannung VCCint und der Referenzspannung VReferenz von der externen Versorgungsspannung VCCext bei der erfindungsgemäßen Schaltungsanordnung dargestellt. Die interne Versorgungsspannung VCCint nimmt je nach Höhe der externen Versorgungsspannung VCCext zwei definierte, unterschiedliche Werte an.FIG. 3 shows the dependency of the internal supply voltage V CCint and the reference voltage V reference on the external supply voltage V CCext in the circuit arrangement according to the invention. The internal supply voltage V CCint takes on two defined, different values depending on the level of the external supply voltage V CCext .

    Claims (7)

    Schaltungsanordnung mit Mitteln zur Erzeugung einer internen Versorgungsspannung (VCCint), die zum Betrieb einer integrierten Schaltung aus einer externen Versorgungsspannung (VCCext) abgeleitet ist, mit einem Referenzspannungsgenerator (RG) der eine zu der externen Versorgungsspannung (VCCext) proportionale Spannung erfaßt und in Abhängigkeit von der Höhe dieser Spannung eine Referenzspannung (VReferenz) erzeugt, die die Mittel zur Erzeugung der internen Versorgungsspannung (VCCint) steuert,
    dadurch gekennzeichnet, daß
    von dem Referenzspannungsgenerator (RG) wenigstens zwei konstante Spannungswerte der Referenzspannung (Vreferenz) erzeugbar sind.    Circuit arrangement with means for generating an internal supply voltage (V CCint ), which is derived for operating an integrated circuit from an external supply voltage (V CCext ), with a reference voltage generator (RG) which detects a voltage proportional to the external supply voltage (V CCext ) and Depending on the level of this voltage, a reference voltage (V reference ) is generated which controls the means for generating the internal supply voltage (V CCint )
    characterized in that
    at least two constant voltage values of the reference voltage (V reference ) can be generated by the reference voltage generator (RG).         Schaltungsanordnung nach Anspruch 1,
    dadurch gekennzeichnet, daß
    der Referenzspannungsgenerator (RG) mindestens zwei Spannungsquellen (VREF1, VREF2) aufweist.    Circuit arrangement according to claim 1,
    characterized in that
    the reference voltage generator (RG) has at least two voltage sources (VREF1, VREF2).         Schaltungsanordnung nach Anspruch 1,
    dadurch gekennzeichnet, daß
    der Referenzspannungsgenerator (RG) einen über einen Schaltungsknoten (K1) mit einer Diodenkette (DK) in Reihe geschalteten steuerbaren Widerstand (P9) aufweist.    Circuit arrangement according to claim 1,
    characterized in that
    the reference voltage generator (RG) has a controllable resistor (P9) connected in series via a circuit node (K1) with a diode chain (DK).         Schaltungsanordnung nach Anspruch 2,
    dadurch gekennzeichnet, daß
    wenigstens eine der Spannungsquellen (VREF1, VREF2) mit einer Doppelstromspiegelschaltung aufgebaut ist.    Circuit arrangement according to claim 2,
    characterized in that
    at least one of the voltage sources (VREF1, VREF2) is constructed with a double current mirror circuit.         Schaltungsanordnung nach Anspruch 3,
    dadurch gekennzeichnet, daß
    eine Schalteinrichtung (P2, R, INV, N1, P1) in Abhängigkeit vom Potential am Schaltungsknoten (K1) so steuerbar ist, daß eine der Spannungsquellen (VREF1, VREF2) die Referenzspannung (VReferenz) bestimmt.    Circuit arrangement according to claim 3,
    characterized in that
    a switching device (P2, R, INV, N1, P1) can be controlled as a function of the potential at the circuit node (K1) so that one of the voltage sources (VREF1, VREF2) determines the reference voltage (V reference ).         Schaltungsanordnung nach Anspruch 3,
    dadurch gekennzeichnet, daß
    der steuerbare Widerstand (P9) kanalseitig zum einen mit der externen Versorgungsspannung (VCCext), zum anderen mit dem einen Ende der Diodenkette (DK) verbunden ist.    Circuit arrangement according to claim 3,
    characterized in that
    the controllable resistor (P9) on the channel side is connected on the one hand to the external supply voltage (V CCext ) and on the other hand to one end of the diode chain (DK).         Schaltungsanordnung nach Anspruch 1,
    dadurch gekennzeichnet, daß
    die interne Versorgungsspannung (VCCint) proportional dem Spannungswert der Referenzspannung (VReferenz) ist.    Circuit arrangement according to claim 1,
    characterized in that
    the internal supply voltage (V CCint ) is proportional to the voltage value of the reference voltage (V reference ).
    EP98105983A 1997-04-18 1998-04-01 Circuit arrangement for generating an internal supply voltage Expired - Lifetime EP0872789B1 (en)

    Applications Claiming Priority (2)

    Application Number Priority Date Filing Date Title
    DE19716430 1997-04-18
    DE19716430A DE19716430A1 (en) 1997-04-18 1997-04-18 Circuit arrangement for generating an internal supply voltage

    Publications (3)

    Publication Number Publication Date
    EP0872789A2 true EP0872789A2 (en) 1998-10-21
    EP0872789A3 EP0872789A3 (en) 1999-04-14
    EP0872789B1 EP0872789B1 (en) 2001-03-14

    Family

    ID=7827031

    Family Applications (1)

    Application Number Title Priority Date Filing Date
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    US (1) US6194953B1 (en)
    EP (1) EP0872789B1 (en)
    JP (1) JPH10301649A (en)
    KR (1) KR100468065B1 (en)
    CN (1) CN1197320A (en)
    DE (2) DE19716430A1 (en)
    TW (1) TW371329B (en)

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    * Cited by examiner, † Cited by third party
    Publication number Priority date Publication date Assignee Title
    EP1439443B9 (en) * 2003-01-14 2016-01-20 Infineon Technologies AG Circuit for the voltage supply and method for producing a supply voltage
    KR100800489B1 (en) 2006-12-21 2008-02-04 삼성전자주식회사 Reference voltage providing means of semiconductor integrated circuit
    JP5127434B2 (en) * 2007-12-27 2013-01-23 三菱電機株式会社 Reference power supply device and control device

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    US5530640A (en) * 1992-10-13 1996-06-25 Mitsubishi Denki Kabushiki Kaisha IC substrate and boosted voltage generation circuits
    US5566185A (en) * 1982-04-14 1996-10-15 Hitachi, Ltd. Semiconductor integrated circuit

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    KR930009148B1 (en) * 1990-09-29 1993-09-23 삼성전자 주식회사 Source voltage control circuit
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    EP0063483A2 (en) * 1981-04-17 1982-10-27 Hitachi, Ltd. Semiconductor integrated circuit
    US5566185A (en) * 1982-04-14 1996-10-15 Hitachi, Ltd. Semiconductor integrated circuit
    US5272393A (en) * 1987-11-24 1993-12-21 Hitachi, Ltd. Voltage converter of semiconductor device
    US5530640A (en) * 1992-10-13 1996-06-25 Mitsubishi Denki Kabushiki Kaisha IC substrate and boosted voltage generation circuits
    DE4332452A1 (en) * 1992-10-28 1994-05-05 Mitsubishi Electric Corp Semiconductor storage system with supply voltage junction receiving supply voltage - has boosting system for producing boost signal on boost line with level higher than supply voltage and terminal system has levels for setting voltage on boost line

    Also Published As

    Publication number Publication date
    CN1197320A (en) 1998-10-28
    US6194953B1 (en) 2001-02-27
    DE59800515D1 (en) 2001-04-19
    EP0872789B1 (en) 2001-03-14
    JPH10301649A (en) 1998-11-13
    TW371329B (en) 1999-10-01
    KR19980081441A (en) 1998-11-25
    DE19716430A1 (en) 1998-11-19
    KR100468065B1 (en) 2005-04-14
    EP0872789A3 (en) 1999-04-14

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