EP0851359A1 - Speicher mit lesegeschützten Zonen - Google Patents

Speicher mit lesegeschützten Zonen Download PDF

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Publication number
EP0851359A1
EP0851359A1 EP97402869A EP97402869A EP0851359A1 EP 0851359 A1 EP0851359 A1 EP 0851359A1 EP 97402869 A EP97402869 A EP 97402869A EP 97402869 A EP97402869 A EP 97402869A EP 0851359 A1 EP0851359 A1 EP 0851359A1
Authority
EP
European Patent Office
Prior art keywords
memory
codes
access
processing unit
central processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP97402869A
Other languages
English (en)
French (fr)
Other versions
EP0851359B1 (de
Inventor
Jean-Marie Gaultier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA, SGS Thomson Microelectronics SA filed Critical STMicroelectronics SA
Publication of EP0851359A1 publication Critical patent/EP0851359A1/de
Application granted granted Critical
Publication of EP0851359B1 publication Critical patent/EP0851359B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism

Definitions

  • the invention relates to the memories associated with the units. microcomputer processing centers and more particularly in such memories a architecture and a device that allow protect certain areas of memory against unauthorized readings.
  • Microcomputers are used in many applications such as bank cards with "chip” and mobile phone handsets.
  • the possibilities offered to users are variable from one user to another according to the characteristics of the subscription purchased and the price of a subscription depends on the possibilities to which it gives access.
  • microcomputers also called microcontrollers, which are implemented in such applications are provided to realize all possibilities or functions available but access to these functions is limited depending on the type of subscription purchased, the limitation intervening at the end of the manufacturing process in prohibiting access to certain areas of the memory which correspond to functions not subscribed in the subscription.
  • Areas of memory that correspond to subscription subscription functions can be identified by codes C1, C2, C3 ?? CN so that, schematically, a code C1 corresponds to benefit from the basic functions while a CN code corresponds to benefiting from all the functions available.
  • An object of the present invention is therefore to achieve a memory associated with a central processing unit microcomputer or microcontroller in which all or only certain areas of memory are protected against unauthorized reading.
  • Step (c) may consist of recording a part of the zone codes defined by step (b) in the first memory, said codes stored corresponding to the zones to which access must be authorized other unregistered codes corresponding to free access areas.
  • Step (d) is carried out by the central processing unit treatment at each start-up or initialization of the central processing unit.
  • step (d) the central processing unit processing must have a memory to save the codes corresponding to the protected areas to which this unit must have access to carry out the planned functions.
  • a memory 10 associated with a unit central unit 18 of a microcomputer includes addressing circuits 12 of the cells or memory cells 10 and read circuits 14 signals from cells or cells selected by the addressing circuits 12.
  • the addressing circuits 12 essentially comprise an address register 16 to receive the code for addressing the memory supplied by the central unit processing 18 and selection circuits 20 which consist of code decoding circuits addressing.
  • the reading circuits 14 essentially comprise read amplifiers 22 which amplify the signals provided by the selected cells or cells and a read register 24 which records in the form binary the signals read.
  • the binary content of the register of reading 24 or data is transmitted to the central unit processing 18 via a bus unidirectional 26, output amplifiers 28 and an input / output circuit 30.
  • the input / output circuit 30 is the required passage data contained in the reading register 24 as we just described but also codes address and is therefore connected to the unit central processing unit 18 by a bidirectional bus 32.
  • Memory 10 is also associated with circuits recording cells or memory boxes which are not shown or described because they are not involved in the present invention which only concerns the reading of memory 10.
  • the circuits 12 must be modified and supplemented by a device 34 which includes a first memory 36 of memory area codes 10, a second memory 38 and a comparator 40.
  • the first memory 36 of permanent type, can be made up of as many registers as area or sector codes of the memory 10. Each register includes terminals for output which are connected to a first set of comparator 40 input terminals. It includes also not shown input terminals, which used to store codes of memory areas 10 by any known means.
  • the second memory 38 can be also consists of registers and has input terminals which are connected to the central processing unit 18 via the input / output circuit 30.
  • the second memory 38 also includes terminals for output which are connected to a second set of comparator 40 input terminals.
  • Comparator 40 has an output terminal 42 which is connected to the addressing circuits 12.
  • Each register of memory 36 contains a code of memory area or sector 10, this code can clearly match the most significant of the memory address codes 10 or match an encryption of these most significant in order to increase security against the frauds.
  • Some of these codes or keys correspond to areas of memory 10 which are assigned to the execution of conventional functions or base while others are assigned to execution particular functions.
  • these particular functions can be the speed dialing, reception and registration message, receiving and recording a fax, etc ...
  • these areas corresponding to these specific functions will only be accessible by the central processing unit 10 only if the latter provides the corresponding keys.
  • these keys are transmitted by the central processing unit to each system startup and are recorded in the second memory 38. These keys thus transmitted are compared to the keys in memory 36 in comparator 40 which then supplies on the terminal output 42 as many signals as there are codes identical, each signal having the effect of releasing access to the memory area 10 corresponding to that key.
  • the keys, transmitted by the central processing unit 10, are "entered” in the latter at the time of the system customization according to functions to which the user is entitled as a result of the subscription taken out.
  • This key entry in the central unit of treatment 10 can be performed via a memory card 44 or by any other means. These keys must be present in the central unit of treatment 10 during each start-up and, from this done, should be permanently saved there or be introduced to it at each start-up by the memory card 44.
  • Using the memory keys described above allows access to memory 10 only if the central unit processing unit 10 transmits, at each start-up or initialization of the system, the keys of the zones which must be used for proper operation of the system. In the absence of recognition of these keys, the system cannot function properly.
  • the first memory 36 is provided for not recording that the codes which correspond to zones whose access must be granted to carry out certain functions, the other zone codes which correspond to authorized basic functions are not stored in this memory 36.
  • step (d) for recording the codes in the second memory 38 is obtained by providing that step (d) for recording the codes in the second memory 38 be performed each time the unit is started central (18) during system initialization.
  • the central unit (18) must memorize permanently the codes that it transmits to the second memory 38, and this memorization is performed when customizing the unit control unit 18 to take account of the functions permitted the user.
  • This customization can be obtained by a memory card 44 whose content is "loaded” in the central unit 18 at each start-up.
  • the two memories 36 and 38 can be produced at using registers but these registers must be of permanent type for memory 36 and volatile type for memory 38, the volatile term meaning that the content of the registers disappears in the absence power supply.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Mobile Radio Communication Systems (AREA)
EP97402869A 1996-12-24 1997-11-28 Leseverfahren und Lesevorrichtung eines Speichers mit lesegeschützten Zonen Expired - Lifetime EP0851359B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9615931A FR2757654B1 (fr) 1996-12-24 1996-12-24 Memoire avec zones protegees en lecture
FR9615931 1996-12-24

Publications (2)

Publication Number Publication Date
EP0851359A1 true EP0851359A1 (de) 1998-07-01
EP0851359B1 EP0851359B1 (de) 1999-06-09

Family

ID=9499067

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97402869A Expired - Lifetime EP0851359B1 (de) 1996-12-24 1997-11-28 Leseverfahren und Lesevorrichtung eines Speichers mit lesegeschützten Zonen

Country Status (4)

Country Link
US (1) US6002619A (de)
EP (1) EP0851359B1 (de)
DE (1) DE69700263T2 (de)
FR (1) FR2757654B1 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000026866A1 (en) * 1998-10-30 2000-05-11 Motus Technologies Inc. Secure memory expansion of an ic portable device
EP1052833A2 (de) * 1999-05-11 2000-11-15 Robert Bosch Gmbh Mobilfunkgerät mit geschütztem Speicherbereich

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006524001A (ja) * 2003-04-17 2006-10-19 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ ディジタル権利を管理する方法及びシステム
DE10360998B4 (de) * 2003-12-23 2008-09-04 Infineon Technologies Ag Schutz von Chips gegen Attacken
WO2006038173A1 (en) * 2004-10-08 2006-04-13 Koninklijke Philips Electronics N.V. Method and circuit for saving power

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4683553A (en) * 1982-03-18 1987-07-28 Cii Honeywell Bull (Societe Anonyme) Method and device for protecting software delivered to a user by a supplier
EP0326053A2 (de) * 1988-01-28 1989-08-02 National Semiconductor Corporation Datensicherungsverfahren für einen programmierbaren Speicher
FR2667714A1 (fr) * 1990-10-09 1992-04-10 Gemplus Card Int Procede pour repartir la memoire d'un circuit integre entre plusieurs applications.
EP0540095A1 (de) * 1991-10-30 1993-05-05 Philips Composants Et Semiconducteurs Mikroschaltung für eine Chipkarte mit einem geschützten, programmierbaren Schalter
EP0651394A1 (de) * 1993-10-28 1995-05-03 STMicroelectronics S.A. Integrierte Schaltung mit einem geschützten Speicher und geschütztes System das diese integrierte Schaltung verwendet

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60160491A (ja) * 1984-01-31 1985-08-22 Toshiba Corp Ｉｃカードとｉｃカード発行装置
US4975878A (en) * 1988-01-28 1990-12-04 National Semiconductor Programmable memory data protection scheme
FR2667417B1 (fr) * 1990-10-02 1992-11-27 Gemplus Card Int Carte a microprocesseur concue pour recevoir des programmes multiples en memoire programmable.
DE4205567A1 (de) * 1992-02-22 1993-08-26 Philips Patentverwaltung Verfahren zum steuern des zugriffs auf einen speicher sowie anordnung zur durchfuehrung des verfahrens
FR2732487B1 (fr) * 1995-03-31 1997-05-30 Sgs Thomson Microelectronics Procede de protection de zones de memoires non volatiles
US5754762A (en) * 1997-01-13 1998-05-19 Kuo; Chih-Cheng Secure multiple application IC card using interrupt instruction issued by operating system or application program to control operation flag that determines the operational mode of bi-modal CPU

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4683553A (en) * 1982-03-18 1987-07-28 Cii Honeywell Bull (Societe Anonyme) Method and device for protecting software delivered to a user by a supplier
EP0326053A2 (de) * 1988-01-28 1989-08-02 National Semiconductor Corporation Datensicherungsverfahren für einen programmierbaren Speicher
FR2667714A1 (fr) * 1990-10-09 1992-04-10 Gemplus Card Int Procede pour repartir la memoire d'un circuit integre entre plusieurs applications.
EP0540095A1 (de) * 1991-10-30 1993-05-05 Philips Composants Et Semiconducteurs Mikroschaltung für eine Chipkarte mit einem geschützten, programmierbaren Schalter
EP0651394A1 (de) * 1993-10-28 1995-05-03 STMicroelectronics S.A. Integrierte Schaltung mit einem geschützten Speicher und geschütztes System das diese integrierte Schaltung verwendet

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000026866A1 (en) * 1998-10-30 2000-05-11 Motus Technologies Inc. Secure memory expansion of an ic portable device
EP1052833A2 (de) * 1999-05-11 2000-11-15 Robert Bosch Gmbh Mobilfunkgerät mit geschütztem Speicherbereich
EP1052833A3 (de) * 1999-05-11 2003-08-06 Robert Bosch Gmbh Mobilfunkgerät mit geschütztem Speicherbereich

Also Published As

Publication number Publication date
EP0851359B1 (de) 1999-06-09
FR2757654B1 (fr) 1999-02-05
DE69700263D1 (de) 1999-07-15
FR2757654A1 (fr) 1998-06-26
US6002619A (en) 1999-12-14
DE69700263T2 (de) 2000-01-20

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