EP0842461A1 - Circuitry for supplying the base bias voltage of current source transistors in bipolar ic circuits - Google Patents

Circuitry for supplying the base bias voltage of current source transistors in bipolar ic circuits

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Publication number
EP0842461A1
EP0842461A1 EP96924768A EP96924768A EP0842461A1 EP 0842461 A1 EP0842461 A1 EP 0842461A1 EP 96924768 A EP96924768 A EP 96924768A EP 96924768 A EP96924768 A EP 96924768A EP 0842461 A1 EP0842461 A1 EP 0842461A1
Authority
EP
European Patent Office
Prior art keywords
resistor
circuit
resistance
voltage
reference circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP96924768A
Other languages
German (de)
French (fr)
Other versions
EP0842461B1 (en
Inventor
Reinhold Unterricker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
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Siemens AG
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Application granted granted Critical
Publication of EP0842461B1 publication Critical patent/EP0842461B1/en
Anticipated expiration legal-status Critical
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Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/22Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only
    • G05F3/222Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only with compensation for device parameters, e.g. Early effect, gain, manufacturing process, or external variations, e.g. temperature, loading, supply voltage
    • G05F3/227Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only with compensation for device parameters, e.g. Early effect, gain, manufacturing process, or external variations, e.g. temperature, loading, supply voltage producing a current or voltage as a predetermined function of the supply voltage

Definitions

  • Bandgap reference circuits e.g. from Tietze, Schenk: Semiconductor circuit technology, 5th ed. Berlin Heidelberg New York 1980, Figs. 16.29 and 16.30, and 9th ed., Berlin Heidelberg New York Tokyo 1991, Figs. 18.29 to 18.31, are known per se a constant voltage of, for example, about 1.2 V regardless of the temperature and resistance tolerances.
  • a base bias is required for current source transistors, which has a certain dependency with regard to the temperature and the resistance tolerances, namely in such a way that the current supplied by the current sources causes a constant voltage drop across the load resistors through which this current flows.
  • Such a dependency is brought about in practice with the aid of a correspondingly modified bandgap reference circuit.
  • the base bias voltage is routed to the individual circuit blocks via distributor circuits. This circuit principle, which is common in practice, is shown in FIG. 1, in which the modified bandgap reference circuit is denoted by B and two distributor circuits by V.
  • the distributor circuit V outlined in FIG. 2 essentially consists of an input stage E, a of variations in the supply voltage independent inverter J and an output driver A.
  • the input stage E is formed with ei ⁇ nem with the input voltage applied Uj_ n transistor T 4 and an upstream him in a series circuit chen same transistor T3.
  • the inverter J (known in principle from DE-C3-2 533 199, FIG. 1) is provided with a series connection of a first transistor T 1 and the same, provided with a collector resistor R; L and an emitter resistor R 2 second transistor T2 formed.
  • The known in principle e.g. from DE-C3-2 849 231 and DE-C2-2 849 153)
  • Output driver A is formed with an emitter follower Tg, Rg and an identical transistor T5 connected in series with its transistor Tg.
  • the distributor circuit V is an input voltage U in an equally large output voltage U out at:
  • UgEj denotes the base-emitter voltage of a jth transistor Tj.
  • U EI U BE2
  • U BE3 U BE 4 un ⁇ ⁇
  • U B E 5 U B E 6
  • resistors Different types are available in modern semiconductor technologies. For example, in Siemens B6HF technology, three different types of resistance with different surface resistances can be used, which behave differently depending on the temperature and which can have different variations during manufacture. If one adapts a modified band gap circuit to such a resistance type, then the Voltage drop (URQ, URE in FIG D may be constant on resistors of this type, but on resistors of the other types may depend on the temperature and on parameter variations due to production process fluctuations.
  • URQ Voltage drop
  • U n base voltage
  • the invention shows a way to supply a base bias for current source transistors in bipolar IC circuits without having to set up a separate bandgap reference circuit for each type of resistor.
  • the invention relates to a circuit arrangement for the basic bias supply of current source transistors in bipolar IC circuits, with a bandgap reference circuit for supplying a base bias dependent on the temperature and resistance tolerances in such a way that the current supplied by the current source transistors arrives load resistors through which this current causes a constant voltage drop, and at least one downstream distribution circuit with an input stage, an output driver and a corresponding intermediate inverter, which is formed with a series circuit of a first transistor, a first resistor, a second transistor and a second resistor connected to the supply voltage;
  • This circuit arrangement according to the invention is characterized in that for the base bias supply of current source transistors of a different type of resistor than the one for which the bandgap reference circuit is designed, in the associated distributor or, in other words, conversion circuit, the second resistor is of the resistance type for which the bandgap reference circuit is designed, and the first resistance is formed by the series connection of a resistance of this same resistance type and a resistance of the other resistance type.
  • FIG. 1 shows a basic circuit diagram of a circuit arrangement for basic bias supply of current source transistors in bipolar IC circuits
  • FIG. 2 shows a simplified circuit diagram of one contained therein
  • FIG. 3 shows a basic circuit diagram of a circuit arrangement for basic bias voltage supply of current source transistors of different resistance types; 4 illustrates the structure of resistances, and FIG. 5 shows simulation results.
  • the distributor circuit V sketched in FIG. 2 essentially consists of an input stage E formed with a transistor T 4 , which is supplied with the input voltage u in, and an identical transistor T 3 connected upstream of it in a series circuit , one with two identical transistors T] _, T 2 , the second transistor T 2 of which is provided with a collector resistor R j and an emitter resistor R 2 , formed and independent of fluctuations in the supply voltage inverter J and one with an emitter follower Tg, Rg and one Output driver A formed in series with the same transistor T5 connected to the same transistor Tg.
  • a conventional distributor circuit V is then used, as is outlined in FIG. set which has the structure outlined in FIG. 2 and which supplies a base bias U p with which the voltage drop across p-doped resistors (PRc / PRE) fluctuates as little as possible.
  • a distributor or conversion circuit V which supplies a base bias voltage U n with which the voltage drop occurs n-doped resistors ( n Rc, ⁇ RE) change as little as possible.
  • the voltage drop URI becomes greater than the voltage drop UR 2 ; the voltage U n is therefore in accordance with Eq. Be (3) is smaller al ⁇ up, so that with the thus reduced base bias voltage of the current sources (Q n) with n-doped Wider ⁇ stands (n Rc, ⁇ RE) d i e at these sloping kon ⁇ stresses remain constant. The same stabilizing effect occurs when the n-doped resistors scatter to smaller values.
  • the voltage U & 2 becomes greater than the voltage UJ Q because the resistance value of the resistor R 2 increases more than the resistance value of the resistor Ri.
  • the voltage becomes U n should therefore be greater than the voltage U p , which is reduced to larger values by the bandgap circuit because of the scattering of the p-doped resistors. With appropriate dimensioning, the voltage U n then remains constant.
  • the modified band gap reference circuit B is dimensioned for current sources with p-doped resistors and generates a base voltage U p for current sources with p-doped resistors;
  • the temperature response of the resistors should be disregarded in the following consideration, since it is implicit in the scatter.
  • the distributor circuit or, in other words, converter circuit V generates the voltage U n from the voltage U p in accordance with
  • dU n dU p + ⁇ dT + - ⁇ dx p + ⁇ dx n (7) ⁇ T öx p dx n
  • condition (10b) means that the conversion circuit V cancels the voltage correction caused by a scatter (x p ) of p-doped resistors, and with the fulfillment of the
  • Condition (10c) is a voltage correction caused by a scattering ( ⁇ n ) of n-doped resistors.
  • the bias voltage U v can advantageously be derived from a plurality of base-emitter voltages, so that the term (U v - 2 -ÜBE) can be expressed by m-UßE, a practical value for m i ⁇ t 2.5 .
  • the resistance Ri which is made to a fraction (1- ⁇ ) of p-doped silicon and the fraction ⁇ of n-doped silicon, scatters according to the relationship
  • R 1 [(l- ⁇ ) x p + ⁇ x n ] R. (14)
  • U n is consequently a function of Up, x p , x n and - via the temperature dependence of the base-emitter voltage - also of T.
  • the resistance Ri of the distribution or conversion circuit V in the exemplary embodiment considered here must therefore consist of 4% of the material for which the modified band gap Reference circuit B is not designed and to which it must therefore be adapted by means of the conversion circuit V. If polysilicon resistors with different doping materials are involved, the resistor Ri must be implemented with two resistors of the two types connected in series. In order not to form any asymmetries with regard to the contact holes, the resistor R 2 should also be constructed from a series connection of two resistors, both of which consist of the resistance material of the band gap reference circuit B.
  • resistor Ri can be very easily with the aid of a Mask, which covers only part of the resistance, as a series circuit of a high (p + ) and a low (p ⁇ ) p-doped resistor. This can also be seen from FIG.
  • the respective mask is designated by M.
  • the resistor Ri is then heavily p-doped in its right part and has a sheet resistance value of, for example, 60 ohms / square, while it is weakly p-doped in its left part (just like the entire resistor R 2 ) and has a sheet resistance value of, for example 1000 ohms / square.
  • FIG. 5 also shows a simulation result in two diagrams, the voltage drop across a heavily p-doped resistor (p + resistor) in the upper diagram and the voltage drop across a weakly p-doped resistor in the lower diagram (p ⁇ - Resistance) above the scatter factor of the p + resistance value for various temperatures (temp) and scatter values (xr) of the (in the bandgap reference circuit B
  • temp temperatures
  • xr scatter values

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Control Of Electrical Variables (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

In order to supply the base bias voltage of bipolar IC current source transistors with a band gap reference circuit that supplies a temperature-dependent and resistance tolerance-dependent base bias voltage so that the current supplied by the current source transistors causes a constant voltage drop in the load resistances through which the current flows, the base bias voltage is supplied by a distributor circuit connected downstream of the load resistances and having an input stage, an output driver and an intermediate inverter composed of a first transistor, a first resistance, a second transistor and a second resistance mounted in series and connected to the supply voltage. In order to supply the base bias voltage to current source transistors having another type of resistance than that for which the band gap reference circuit is designed, the corresponding distributor or converter circuit has a second resistance of the same type as that of the resistance for which the band gap reference circuit is designed, and a first resistance composed of a resistance of this same type connected in series to the other type of resistance.

Description

Beschreibungdescription
Schaltungsanordnung zur Basisvorspannungsversorgung von Stromquellentransistoren in Bipolar-IC-SchaltungenCircuit arrangement for the basic bias supply of current source transistors in bipolar IC circuits
Für Stromquellentransistoren, wie sie in integrierten Bipo¬ larschaltungen häufig vorkommen, wird die erforderliche Ba- sisvorSpannung vielfach mit Hilfe einer Bandgap-Referenz- Schaltung gewonnen. Bandabstands-Referenz-Schaltungen, wie sie z.B. aus Tietze, Schenk: Halbleiter-Schaltungstechnik, 5. Aufl. Berlin Heidelberg New York 1980, Abb. 16.29 und 16.30, und 9. Aufl., Berlin Heidelberg New York Tokyo 1991, Abb. 18.29 bis 18.31, bekannt sind, erzeugen an sich eine unabhängig von der Temperatur und von Widerstandstoleranzen konstante Spannung von beispielsweise ca. 1,2 V. In inte¬ grierten Bipolarschaltungen wird allerdings für Stromquellen¬ transistoren eine BasisvorSpannung benötigt, die bezüglich der Temperatur und der Widerstandstoleranzen eine bestimmte Abhängigkeit besitzt, nämlich derart, daß der von den Strom- quellen gelieferte Strom an den von diesem Strom durchflosse¬ nen Lastwiderständen einen konstanten Spannungsabfall hervor¬ ruft. Eine solche Abhängigkeit wird in der Praxis mit Hilfe einer entsprechend modifizierten Bandgap-Referenz-Schaltung bewirkt. Um dann einzelne mit der Basisvorspannung versorgte Schaltungsteile voneinander zu entkoppeln und um die Bandgap- Schaltung nicht zu sehr zu belasten, wird die Basisvorspan¬ nung über Verteilerschaltungen an die einzelnen Schaltungs- blocke geführt. Dieses in der Praxis übliche Schaltungsprin¬ zip ist in FIG 1 dargestellt, worin die modifizierte Bandgap- Referenz-Schaltung mit B und zwei Verteilerschaltungen mit V bezeichnet sind.For current source transistors, as are often found in integrated bipolar circuits, the required base bias is often obtained with the aid of a bandgap reference circuit. Bandgap reference circuits, e.g. from Tietze, Schenk: Semiconductor circuit technology, 5th ed. Berlin Heidelberg New York 1980, Figs. 16.29 and 16.30, and 9th ed., Berlin Heidelberg New York Tokyo 1991, Figs. 18.29 to 18.31, are known per se a constant voltage of, for example, about 1.2 V regardless of the temperature and resistance tolerances. In integrated bipolar circuits, however, a base bias is required for current source transistors, which has a certain dependency with regard to the temperature and the resistance tolerances, namely in such a way that the current supplied by the current sources causes a constant voltage drop across the load resistors through which this current flows. Such a dependency is brought about in practice with the aid of a correspondingly modified bandgap reference circuit. In order to then decouple individual circuit parts supplied with the base bias voltage and to avoid stressing the bandgap circuit too much, the base bias voltage is routed to the individual circuit blocks via distributor circuits. This circuit principle, which is common in practice, is shown in FIG. 1, in which the modified bandgap reference circuit is denoted by B and two distributor circuits by V.
Eine solche Verteilerschaltung kann die in FIG 2 skizzierte SchaltungsStruktur haben, wobei in FIG 2 einige zusätzliche, für das weitere Verständnis unwesentliche Widerstände nicht dargestellt sind. Die in FIG 2 skizzierte Verteilerschaltung V besteht im wesentlichen aus einer Eingangsstufe E, einem von Schwankungen der Speisespannung unabhängigen Inverter J und einem Ausgangstreiber A. Die Eingangsstufe E ist mit ei¬ nem mit der EingangsSpannung Uj_n beaufschlagten Transistor T4 und einem ihm in einer Reihenschaltung vorgeschalteten glei- chen Transistor T3 gebildet. Der (im Prinzip etwa aus der DE- C3-2 533 199, Fig.l, bekannte) Inverter J ist mit einer Rei¬ henschaltung eines ersten Transistors T^ und eines gleichen, mit einem Kollektorwiderstand R;L und einem Emitterwiderstand R2 versehenen zweiten Transistors T2 gebildet. Der (im Prin- zip z.B. aus DE-C3-2 849 231 und DE-C2-2 849 153 bekannte)Such a distributor circuit can have the circuit structure outlined in FIG. 2, some additional resistances which are not essential for further understanding not being shown in FIG. The distributor circuit V outlined in FIG. 2 essentially consists of an input stage E, a of variations in the supply voltage independent inverter J and an output driver A. The input stage E is formed with ei¬ nem with the input voltage applied Uj_ n transistor T 4 and an upstream him in a series circuit chen same transistor T3. The inverter J (known in principle from DE-C3-2 533 199, FIG. 1) is provided with a series connection of a first transistor T 1 and the same, provided with a collector resistor R; L and an emitter resistor R 2 second transistor T2 formed. The (known in principle e.g. from DE-C3-2 849 231 and DE-C2-2 849 153)
Ausgangstreiber A ist mit einem Emitterfolger Tg, Rg und ei¬ nem in Reihe zu dessen Transistor Tg geschalteten gleichen Transistor T5 gebildet. Die Verteilerschaltung V setzt eine EingangsSpannung Uin in eine gleich grosse AusgangsSpannung Uout um:Output driver A is formed with an emitter follower Tg, Rg and an identical transistor T5 connected in series with its transistor Tg. The distributor circuit V is an input voltage U in an equally large output voltage U out at:
Es ist einerseitsIt is on the one hand
Uv=UBE1+UR1+UBE6+U0Ut (1)U v = U BE1 + U R1 + U BE6 + U 0Ut (1)
und andererseitsand on the other hand
Uv=UBE5+UBE3+UBE2+UR2-UBE4+1^ ; (2)U v = U BE5 + U BE3 + U BE2 + U R2 -U BE4 + 1 ^; (2)
worin mit UgEj die Basis-Emitter-Spannung eines j-ten Transi- εtors Tj bezeichnet wird. Unter den durch entsprechende Di- menεionierung der Transistoren und der Widerstände (R^ = R2) zu erfüllenden Bedingungen U EI = UBE2, UBE3 = UBE4 unα^ U BE5 = U BE6 sowie UR1 = UR2 ergibt sich hieraus Uout = Uin.where UgEj denotes the base-emitter voltage of a jth transistor Tj. Under the conditions U EI = U BE2, U BE3 = U BE 4 unα ^ U B E 5 = U B E 6 and U R1 = U, which must be met by appropriate dimensioning of the transistors and resistors (R ^ = R 2 ) R2 results from U out = U in .
In modernen Halbleitertechnologien stehen unterschiedliche Widerstandstypen zur Verfügung. So können beispielsweise in Siemens-B6HF-Technologie drei unterschiedliche Widerstands¬ typen mit verschiedenen Flächenwiderständen zum Einsatz kom¬ men, die sich in Abhängigkeit von der Temperatur unterschied- lieh verhalten und die bei der Herstellung unterschiedliche Streuungen aufweisen können. Paßt man eine modifizierte Band¬ gap-Schaltung an einen solchen Widerstandstyp an, so wird der Spannungsabfall (URQ, URE in FIG D an Widerständen dieses Typs konstant sein, an Widerständen der anderen Typen aber von der Temperatur und von herstellungsprozeßschwankungs- bedingten Parameterstreuungenen abhängig sein.Different types of resistors are available in modern semiconductor technologies. For example, in Siemens B6HF technology, three different types of resistance with different surface resistances can be used, which behave differently depending on the temperature and which can have different variations during manufacture. If one adapts a modified band gap circuit to such a resistance type, then the Voltage drop (URQ, URE in FIG D may be constant on resistors of this type, but on resistors of the other types may depend on the temperature and on parameter variations due to production process fluctuations.
Um dem zu begegnen, kann man für jeden Widerstandstyp eine eigene Bandgap-Schaltung vorsehen, also beispielsweise eine für Widerstände in p-dotiertem Polysilizium ausgelegte Band¬ gap-Referenz-Schaltung, die eine Basisspannung Uout = Up für Stromquellen mit p-dotierten Widerständen erzeugt, und eine für Widerstände in n-dotiertem Polysilizium ausgelegte Band¬ gap-Referenz-Schaltung, die eine Basisspannung Un für Strom¬ quellen mit n-dotierten Widerständen erzeugt. Dabei wird al¬ lerdings einerseits mehr Chipfläche für die zusätzlichen Schaltungen benötigt und andererseits durch diese auch mehr Leistung verbraucht. Ein solcher erhöhter Leiεtungsverbrauch ist insbesondere bei Widerständen mit niedrigem Flächenwider¬ stand wesentlich, weil hier hohe Ströme fließen, sofern die Widerstände nicht außergewöhnlich große Abmessungen annehmen sollen, - was indessen wiederum teure Chipfläche kosten wür¬ de.To counter this, a separate bandgap circuit can be provided for each type of resistor, for example a band gap reference circuit designed for resistors in p-doped polysilicon, which has a base voltage U out = U p for current sources with p-doped Generates resistors, and a band gap reference circuit designed for resistors in n-doped polysilicon, which generates a base voltage U n for current sources with n-doped resistors. However, on the one hand, more chip area is required for the additional circuits and, on the other hand, more power is also consumed by them. Such an increased power consumption is particularly important in the case of resistors with a low sheet resistance, because high currents flow here, provided the resistors are not to have exceptionally large dimensions, which would in turn cost expensive chip area.
Die Erfindung zeigt demgegenüber einen Weg zu einer Basisvor- spannungsversorgung von Stromquellentransistoren in Bipolar- IC-Schaltungen, ohne für jeden Widerstandsyp eine eigene Bandgap-Referenz-Schaltung aufbauen zu müssen.The invention, on the other hand, shows a way to supply a base bias for current source transistors in bipolar IC circuits without having to set up a separate bandgap reference circuit for each type of resistor.
Die Erfindung betrifft eine Schaltungsanordnung zur Basisvor¬ spannungsversorgung von Stromquellentransistoren in Bipolar- IC-Schaltungen, mit einer Bandgap-Referenz-Schaltung zur Lie¬ ferung einer von der Temperatur und von Widerstandstoleranzen in der Weise abhängigen Basisvorspannung, daß der von den Stromquellentransistoren gelieferte Strom an von diesem Strom durchflossenen Lastwiderständen einen konstanten Spannungsab- fall hervorruft, und wenigstens einer ihr nachgeschalteten, die jeweilige BasisvorSpannung abgebenden Verteilerschaltung mit einer Eingangsstufe, einem Ausgangstreiber und einem da- zwischenliegenden Inverter, der mit einer an der Speisespan¬ nung liegenden Reihenschaltung eines ersten Transistors, ei¬ nes ersten Widerstands, eines zweiten Transistors und eines zweiten Widerstands gebildet ist; diese Schaltungsanordnung iεt erfindungsgemäß dadurch gekennzeichnet, daß zur Basis- vorspannungsversorgung von Stromquellentransistoren eines anderen Widerstandεtyps als desjenigen, für den die Bandgap- Referenz-Schaltung ausgelegt ist, in der zugehörigen Vertei¬ ler- bzw., anders gesagt, Umsetzschaltung der zweite Wider- stand von demjenigen WiderStandstyp ist, für den die Bandgap- Referenz-Schaltung ausgelegt ist, und der erste Widerstand durch die Reihenschaltung eines Widerstands ebendieses Wider- εtandεtyps und eines Widerstands des anderen Widerεtandstyps gebildet ist.The invention relates to a circuit arrangement for the basic bias supply of current source transistors in bipolar IC circuits, with a bandgap reference circuit for supplying a base bias dependent on the temperature and resistance tolerances in such a way that the current supplied by the current source transistors arrives load resistors through which this current causes a constant voltage drop, and at least one downstream distribution circuit with an input stage, an output driver and a corresponding intermediate inverter, which is formed with a series circuit of a first transistor, a first resistor, a second transistor and a second resistor connected to the supply voltage; This circuit arrangement according to the invention is characterized in that for the base bias supply of current source transistors of a different type of resistor than the one for which the bandgap reference circuit is designed, in the associated distributor or, in other words, conversion circuit, the second resistor is of the resistance type for which the bandgap reference circuit is designed, and the first resistance is formed by the series connection of a resistance of this same resistance type and a resistance of the other resistance type.
Dadurch, daß in der Verteilungsschaltung für die Basisvor¬ spannung ein Widerstand aus zwei Teilwiderständen kombiniert wird, deren einer aus den Widerstandsmaterialien der eigent¬ lichen Bandgap-Schaltung gebildet iεt und deren anderer aus den Widerstandεmaterialien der in den Transistorstromquellen verwendeten Widerstände gebildet ist, wird die Basisvorspan- nung für dieεe Stromquellen in der Verteilungs- bzw. Umsetzschaltung so umgesetzt, daß Parameterstreuungen und unterschiedliche Temperaturgänge der verwendeten Wider- standstypen ausgeglichen werden.The fact that a resistor made up of two partial resistors is combined in the distribution circuit for the base bias voltage, one of which is formed from the resistive materials of the actual bandgap circuit and the other of which is made up of the resistive materials of the resistors used in the transistor current sources Base bias for these current sources implemented in the distribution or conversion circuit in such a way that parameter variations and different temperature characteristics of the resistance types used are compensated for.
Weitere Besonderheiten der Erfindung werden aus der nachfol¬ genden näheren Erläuterung der Erfindung anhand der Zeichnun¬ gen ersichtlich. Dabei zeigen FIG 1 ein Prinzipschaltbild einer Schaltungsanordnung zur Ba- sisvorspannungsversorgung von Stromquellentransistoren in Bipolar-IC-Schaltungen, FIG 2 ein vereinfachtes Schaltbild einer darin enthaltenenFurther special features of the invention will become apparent from the following detailed explanation of the invention with reference to the drawings. 1 shows a basic circuit diagram of a circuit arrangement for basic bias supply of current source transistors in bipolar IC circuits, FIG. 2 shows a simplified circuit diagram of one contained therein
Verteiler- bzw. Umsetzschaltung und FIG 3 ein Prinzipschaltbild einer Schaltungsanordnung zur Ba- sisvorspannungεversorgung von Stromquellentransistoren unterschiedlicher Widerεtandεtypen; FIG 4 verdeutlicht den Aufbau von Widerεtänden, und FIG 5 zeigt Simulationsergebnisse.Distributor or converter circuit and FIG. 3 shows a basic circuit diagram of a circuit arrangement for basic bias voltage supply of current source transistors of different resistance types; 4 illustrates the structure of resistances, and FIG. 5 shows simulation results.
In der in FIG 1 schematisch in einem Blockschaltbild darge- stellten Schaltungsanordnung zur Basisvorspannungsversorgung von Stromquellentransistoren in Bipolar-IC-Schaltungen sind einer im eingangs erläuterten Sinne modifizierten Bandgap- Referenz-Schaltung B zwei Verteilerschaltungen V nachgeschal¬ tet, über die, wie dies in FIG 1 für zwei Stromquellentransi- storschaltungen Q dargestellt ist, solche Stromquellentransi- storschaltungen mit einer BasisvorSpannung versorgt werden, so daß der von den Stromquellen Q gelieferte Strom an den von ihm durchflossenen Lastwiderεtänden RQ , RE einen konεtanten Spannungsabfall hervorruft. Dieε wurde eingangs bereits er- läutert; weitere Erläuterungen dazu an dieser Stelle sind für das Verständnis der Erfindung nicht erforderlich.In the circuit arrangement for basic bias supply of current source transistors in bipolar IC circuits, shown schematically in a block diagram in FIG. 1, a bandgap reference circuit B modified in the sense explained at the outset is followed by two distributor circuits V via which, as shown in FIG 1 for two current source transistor circuits Q, such current source transistor circuits are supplied with a base bias, so that the current supplied by the current sources Q causes a constant voltage drop at the load resistors R Q , RE through which they flow. This has already been explained at the beginning; Further explanations at this point are not necessary for understanding the invention.
Wie eingangε ebenfallε bereitε erläutert wurde, beεteht die in FIG 2 skizzierte Verteilerschaltung V im wesentlichen aus einer mit einem Transiεtor T4, der mit der EingangsSpannung uin beaufschlagt ist, und einem ihm in einer Reihenschaltung vorgeschalteten gleichen Transistor T3 gebildeten Eingangs¬ stufe E, einem mit zwei gleichen Transiεtoren T]_, T2, deren zweiter Tranεiεtor T2 mit einem Kollektorwiderstand Rj und einem Emitterwiderstand R2 versehen ist, gebildeten und von Schwankungen der Speiseεpannung unabhängigen Inverter J und einem mit einem Emitterfolger Tg, Rg und einem in Reihe zu deεεen Tranεiεtor Tg geεchalteten gleichen Tranεiεtor T5 gebildeten Ausgangstreiber A.As was also explained at the beginning, the distributor circuit V sketched in FIG. 2 essentially consists of an input stage E formed with a transistor T 4 , which is supplied with the input voltage u in, and an identical transistor T 3 connected upstream of it in a series circuit , one with two identical transistors T] _, T 2 , the second transistor T 2 of which is provided with a collector resistor R j and an emitter resistor R 2 , formed and independent of fluctuations in the supply voltage inverter J and one with an emitter follower Tg, Rg and one Output driver A formed in series with the same transistor T5 connected to the same transistor Tg.
Es sei nun zum Beispiel angenommen, daß die modifizierte Bandgap-Referenz-Schaltung B für Widerstände in p-dotiertem Polysilizium ausgelegt ist und eine Basiεspannung Uout = Up für Stromquellen mit p-dotierten Widerständen erzeugt. Zur Versorgung von Stromquellen PQ, in welchen p-dotierte Wider¬ stände PRc, P^E eingesetzt werden, wird dann, wie dies in FIG 3 skizziert iεt, eine herkömmliche Verteilerschaltung V ein- geεetzt, die die in FIG 2 skizzierte Struktur aufweist und die eine Basisvorspannung Up liefert, mit welcher der Span¬ nungsabfall an p-dotierten Widerständen (PRc/ PRE) möglichst wenig schwankt. Zur Versorgung von Stromquellen nQ, in wel- chen n-dotierte Widerstände nRQ , nR-£ eingesetzt werden, wird demgegenüber eine Verteiler- bzw. Umsetzschaltung V einge¬ setzt, die eine Baεiεvorεpannung Un liefert, mit welcher der Spannungsabfall an n-dotierten Widerständen (nRc, ΠRE) sich möglichst wenig ändert. In der Verteiler- bzw. Umsetzschal- tung V , die wiederum die in FIG 2 skizzierte Struktur auf¬ weist, werden die Tranεiεtoren Ti und T2, T3 und T4 εowie T5 und Tg wiederum paarweiεe gleich dimensioniert, so daß εich durch Gleichsetzen der in Gl. (1) und Gl. (2) stehenden Aus¬ drücke und mit Uj_n = Up, Uout = Un die BeziehungIt is now assumed, for example, that the modified bandgap reference circuit B is designed for resistors in p-doped polysilicon and generates a base voltage U out = U p for current sources with p-doped resistors. To supply current sources PQ, in which p-doped resistors PRc, P ^ E are used, a conventional distributor circuit V is then used, as is outlined in FIG. set which has the structure outlined in FIG. 2 and which supplies a base bias U p with which the voltage drop across p-doped resistors (PRc / PRE) fluctuates as little as possible. In contrast, for supplying current sources n Q, in which n-doped resistors n RQ, n R-£ are used, a distributor or conversion circuit V is used, which supplies a base bias voltage U n with which the voltage drop occurs n-doped resistors ( n Rc, Π RE) change as little as possible. In the distributor or conversion circuit V, which in turn has the structure outlined in FIG. 2, the transistors Ti and T 2 , T3 and T 4 and T5 and Tg are again dimensioned identically in pairs, so that by equating them in Eq. (1) and Eq. (2) standing expressions and with Uj_ n = U p , U ou t = U n the relationship
Un=Up+(UR2 -UR1) (3)U n = U p + (U R2 -U R1 ) (3)
ergibt.results.
Im Gegensatz zur herkömmlichen Verteilerschaltung V wird in der Umsetzεchaltung V die Differenz der an den Widerständen Rl und R2 abfallenden Spannungen zur Anpassung der Basisvor- εpannung an die verεchiedenen Widerstandstypen verwendet. Dies geschieht im Beispiel dadurch, daß der Widerstand R2 vollεtändig auε p-dotiertem Silizium und der Widerεtand Ri in einer Reihenschaltung teilweise aus p-dotiertem Silizium und teilweise aus n-dotiertem Silizium hergestellt wird. Bei ver¬ schwindenden Abweichungen beider Widerstandstypen von ihren Zielwerten sind Ri und R2 gleich, so daß nach Gl . (3)In contrast to the conventional distribution circuit V the difference in the dropping at the resistors Rl and R2 for adjusting the voltages Basisvor- εpannung used to verεchiedenen resistor types in the Umsetzεchaltung V. In the example, this is done in that the resistor R 2 is made entirely of p-doped silicon and the resistor Ri is made in a series circuit partly from p-doped silicon and partly from n-doped silicon. If deviations of both resistance types from their target values vanish, Ri and R 2 are the same, so that according to Eq. (3)
Un = Up (3a)U n = U p (3a)
wird.becomes.
Streuen allein die n-dotierten Widerstände beispielsweise zu höheren Werten, so wird der Spannungsabfall URI größer als der Spannungsabfall UR2 ; die Spannung Un wird daher gemäß Gl. (3) kleiner alε Up sein, so daß mit der so verminderten Basisvorspannung der Stromquellen (nQ) mit n-dotierten Wider¬ ständen (nRc, ΠRE) die an diesen abfallenden Spannungen kon¬ stant bleiben. Derselbe stabilisierende Effekt tritt ein, wenn die n-dotierten Widerstände zu kleineren Werten streuen. Streuen dagegen allein die p-dotierten Widerstände zu höheren Werten, so wird die Spannung U&2 größer alε die Spannung UJQ, weil der Widerstandεwert des Widerstandε R2 εtärker zunimmt als der Widerstandswert des Widerstands Ri. Nach Gl.(3) wird die Spannung Un also größer sein alε die Spannung Up, die we¬ gen der Streuung der p-dotierten Widerstände zu größeren Wer¬ ten von der Bandgap-Schaltung reduziert wird. Damit bleibt dann bei entsprechender Dimensionierung die Spannung Un kon¬ stant.If the n-doped resistors alone scatter, for example, to higher values, the voltage drop URI becomes greater than the voltage drop UR 2 ; the voltage U n is therefore in accordance with Eq. Be (3) is smaller alε up, so that with the thus reduced base bias voltage of the current sources (Q n) with n-doped Wider¬ stands (n Rc, Π RE) d i e at these sloping kon¬ stresses remain constant. The same stabilizing effect occurs when the n-doped resistors scatter to smaller values. If, on the other hand, the p-doped resistors scatter to higher values, the voltage U & 2 becomes greater than the voltage UJ Q because the resistance value of the resistor R 2 increases more than the resistance value of the resistor Ri. According to Eq. (3) the voltage becomes U n should therefore be greater than the voltage U p , which is reduced to larger values by the bandgap circuit because of the scattering of the p-doped resistors. With appropriate dimensioning, the voltage U n then remains constant.
Der gleiche stabilisierende Effekt wird bei anderen Kombi¬ nationen von Widerstandsstreuungen (beide Widerstandstypen streuen in gleicher oder in entgegengesetzter Richtung) er¬ zielt; inhärent werden damit auch unterschiedliche Tempera- turgänge der beiden Widerstandεtypen ausgeglichen.The same stabilizing effect is achieved with other combinations of resistance scattering (both types of resistance scatter in the same or in the opposite direction); Therewith different temperature changes of the two types of resistance are inherently compensated.
Zu der folgenden, tiefergehenden Betrachtung der Schaltungs¬ anordnung sei wiederum angenommen, daß die modifizierte Band¬ gap-Referenzschaltung B für Stromquellen mit p-dotierten Wi- derständen dimensioniert ist und eine Baεiεεpannung Up für Stromquellen mit p-dotierten Widerεtänden erzeugt; die er¬ zeugte Baεiεvorεpannung Up ist dann von der Temperatur und von Schwankungen der p-dotierten Widerstände abhängig, so daß man Up = Up(T, xp) schreiben kann, worin T die Temperatur ist und der Faktor xp die Streuung der p-dotierten Widerstände ausdrückt. Der Temperaturgang der Widerstände soll bei der folgenden Betrachtung außer Betracht bleiben, da er implizit in den Streuungen enthalten ist. Das vollständige Differential der Basisvorεpannung Up iεtFor the following, in-depth consideration of the circuit arrangement, it is again assumed that the modified band gap reference circuit B is dimensioned for current sources with p-doped resistors and generates a base voltage U p for current sources with p-doped resistors; The generated base bias U p then depends on the temperature and on fluctuations of the p-doped resistors, so that Up = U p (T, x p ) can be written, in which T is the temperature and the factor x p is the scatter of the p-doped resistors. The temperature response of the resistors should be disregarded in the following consideration, since it is implicit in the scatter. The complete differential of the base bias U p iεt
Aufgrund der Dimensionierung der Bandgap-Schaltung B bleiben die Spannungsabfälle an p-dotierten Widerständen bei Änderun¬ gen der Temperatur und bei Widerεtandsstreuungen konstant; die partiellen Differentiale εeien in diesem Fall Due to the dimensioning of the bandgap circuit B, the voltage drops across p-doped resistors remain constant with changes in temperature and with resistance scattering; the partial differentials in this case
und and
(5b)(5b)
In üblichen Bipolartechnologien hat k-p einen Wert von etwa -1...-2 mV/K und kx einen Wert von etwa -25...-30 mV. Damit die Spannung am Emitterwiderstand konstant bleibt, muß sich der Emitterstrom bei einer Widerstandsänderung dx um dl = -I dx ändern. Mit dem Exponentialgesetz für den Emitter¬ strom I = IΞ-e(u/uτ) ist dl = (I/Uτ) -dU, somit du = -Uτ-dx. Die Verteilerschaltung bzw., anders gesagt, Umsetzerschaltung V erzeugt aus der Spannung Up die Spannung Un gemäßIn common bipolar technologies, kp has a value of approximately -1 ...- 2 mV / K and k x a value of approximately -25 ...- 30 mV. So that the voltage at the emitter resistor remains constant, the emitter current must change by a change in resistance dx by dl = -I dx. With the exponential law for the emitter current I = I Ξ -e (u / u τ ) dl = (I / U τ ) -dU, thus du = -U τ -dx. The distributor circuit or, in other words, converter circuit V generates the voltage U n from the voltage U p in accordance with
Un=Up+f(T,xp,xn), (6)U n = U p + f (T, x p , x n ), (6)
woraus sich daε vollständige Differentialwhich results in complete differential
dUn=dUp+^dT+-^dxp+^dxn (7) δT öxp dxn dU n = dU p + ^ dT + - ^ dx p + ^ dx n (7) δT öx p dx n
ergibtresults
Sollen nun auch die Spannungsabfälle an n-dotierten Wider ständen bei Änderungen der Temperatur und bei Widerstands Streuungen konstant sein, so muß auch für Un geltenIf the voltage drops at n-doped resistors should also be constant with changes in temperature and resistance scattering, then U n must also apply
dUn=kτdT+kxdxn. (8) Setzt man die Ausdrücke von Gl. (7) und Gl. (8) einander gleich und verwendet Gl. (4) mit Gl. (5a) und Gl. (5b) , so erhält mandU n = k τ dT + k x dx n . (8th) If one puts the expressions of Eq. (7) and Eq. (8) equal to each other and uses Eq. (4) with Eq. (5a) and Eq. (5b), we get
Diese Gleichung wird erfüllt bei Erfüllung folgender Bedin¬ gungen:This equation is fulfilled if the following conditions are met:
1F = 0' (10a) 1F = 0 ' (10a)
—-^=-kx, (10b) dxp —- ^ = - k x , (10b) dx p
-^-=+kx. (10c) dxn - ^ - = + k x . (10c) dx n
Die Bedingung (10a) bedeutet, daß der Temperaturgang derCondition (10a) means that the temperature response of the
Stromquellentransiεtoren allein mit der Bandgap-Schaltung B (und nicht mit der Umεetzεchaltung V) kompenεiert wird; die Bedingung (10b) bedeutet, daß die Umsetzschaltung V die durch eine Streuung (xp) von p-dotierten Widerständen bewirk- te Spannungskorrektur rückgängig macht, und mit Erfüllung derCurrent source transistors are compensated only with the bandgap circuit B (and not with the conversion circuit V); condition (10b) means that the conversion circuit V cancels the voltage correction caused by a scatter (x p ) of p-doped resistors, and with the fulfillment of the
Bedingung (10c) wird eine Spannungskorrektur durch eine Streuung (χn) von n-dotierten Widerständen bewirkt.Condition (10c) is a voltage correction caused by a scattering (χ n ) of n-doped resistors.
Es sei nun eine Umsetzschaltung V (in FIG 3) der in FIG 2 skizzierten Struktur betrachtet, in welcher der Widerstand Ri aus einem p-dotierten Widerstand und einem n-dotierten Wider¬ stand zusammengesetzt iεt. Um die Spannungεdifferenz UR2-URI in Gl . (3) berechnen zu können, muß man den durch die Widerεtände Ri und R2 fliessenden Strom kennen. Er ergibt sich aus der Masche Uv - T5 - T3 - Tg - U2 - T4 - U-j_n bei uin = up zu T UV-3UBE-(UP-UBE) HK2) - - (11)Let us now consider a conversion circuit V (in FIG. 3) of the structure outlined in FIG. 2, in which the resistor R i is composed of a p-doped resistor and an n-doped resistor. The voltage difference UR 2 -URI in Eq. (3) To be able to calculate, one must know the current flowing through the resistors Ri and R 2 . It results from the mesh U v - T 5 - T 3 - Tg - U 2 - T 4 - U-j_ n with u in = u p z u T U V -3U BE - (U P -U BE ) HK2) - - (11)
Damit erhält man aus Gl . (3)With this one obtains from Eq. (3)
R,-RR, -R
".-f"p+ 1(UV-2UBE). (12)".-f" p + 1 (U V -2U BE ). (12)
Die Vorspannung Uv kann vorteilhaft aus einer Mehrzahl von Basiε-Emitter-Spannungen abgeleitet werden, εo daß der Term (Uv - 2 -ÜBE) durch m-UßE auεgedrückt werden kann,- ein prakti- scher Wert für m iεt 2,5.The bias voltage U v can advantageously be derived from a plurality of base-emitter voltages, so that the term (U v - 2 -ÜBE) can be expressed by m-UßE, a practical value for m iεt 2.5 .
Der Widerstand R2 aus p-dotiertem Polysilizium streut mit dem Faktor Xp:The resistor R 2 made of p-doped polysilicon scatters with the factor Xp:
R2 = Xp-R; (13)R 2 = Xp-R; (13)
der Widerstand Ri, der zu einem Bruchteil (1-μ) aus p-dotier¬ tem Silizium und zu dem Bruchteil μ aus n-dotiertem Silizium hergestellt iεt, streut nach der Beziehungthe resistance Ri, which is made to a fraction (1-μ) of p-doped silicon and the fraction μ of n-doped silicon, scatters according to the relationship
R1=[(l-μ)xp+μxn]R. (14)R 1 = [(l-μ) x p + μx n ] R. (14)
In G1 . ( 12 ) eingesetzt ergibt sich damitIn G1. (12) used results in
Un ist folglich bei gegebenem Aufteilungsverhältnis μ eine Funktion von Up, xp, xn und - über die Temperaturabhängigkeit der Basis-Emitter-Spannung - auch von T.U n is consequently a function of Up, x p , x n and - via the temperature dependence of the base-emitter voltage - also of T.
Der Dimensionierung der Schaltung liegen die Zielwerte xn = l und Xp = l zugrunde, bei welchen die Kompensation exakt sein soll; dieser Punkt xn = 1, xp = 1 heisst auch Entwicklungs¬ punkt .The dimensioning of the circuit is based on the target values x n = 1 and Xp = 1, at which the compensation should be exact; this point x n = 1, x p = 1 is also called the development point.
Im Entwicklungspunkt xn = l, xp = 1 lasεen sich die partiel¬ len Differentiale nach Gl. (10a, 10b, 10c) jetzt schreiben als ÖUg δUAt the development point x n = 1, x p = 1, the partial differentials can be calculated according to Eq. (10a, 10b, 10c) now write as ÖU g δU
= μ -0 BE (16a) dτ dτ= μ -0 BE (16a) dτ dτ
5- = +μ(Up - mUBE) ( 16c) dxn 5 - = + μ (U p - mU BE ) (16c) dx n
ab , so daß im allgemeinen —-=(l-μ)+μ—≠l ist; im Entwicklungs- dUp xp punkt ist j edoch wegen — = 1 das Differential — - = (l- μ)+μ- = l xp dUp 1 und damit so, wie es (in Gl. (6)) gefordert wird. [Bei —≠loff, so that in general —- = (l-μ) + μ— ≠ l; in the development dU p x p point, however, because of - = 1, the differential is - - = (l- μ) + μ- = lx p dU p 1 and thus as it is required (in Eq. (6)) . [At - ≠ l
Xp wird diese Forderung nicht mehr exakt erfüllt; die Umsetz¬ schaltung arbeitet um so genauer, je besser die Bedingung er¬ füllt ist.] Die partielle Ableitung nach der Temperatur ist Null, was der Forderung auε Gl. (lθa) entεpricht. Um die Be¬ dingungen der Gl. (10b, 10c) zu erfüllen, muß μ zuXp this requirement is no longer exactly met; the conversion circuit works the more precisely the better the condition is fulfilled.] The partial derivative according to the temperature is zero, which is the requirement from Eq. (lθa) corresponds. In order to meet the conditions of Eq. (10b, 10c) must satisfy μ
μ= K (17)μ = K (17)
Up-mUBE U p -mU BE
gewählt werden. Nimmt man für den Auεdruck Up - mUgE einen Wert von ca. -0,75 V an und setzt kx = -30 mV, so muß μ = 0,04 sein. Dies kann mit einem Widerstand Ri erreicht werden, der mit einer Reihenεchaltung von 4 % n-dotiertem Widerstandεmaterial und 96 % p-dotiertem Widerεtandεmaterial realiεiert ist.to get voted. If one assumes a value of approx. -0.75 V for the expression Up - mUgE and sets k x = -30 mV, then μ = 0.04. This can be achieved with a resistor Ri, which is realized with a series connection of 4% n-doped resistor material and 96% p-doped resistor material.
Der Widerstand Ri der Verteil- bzw. Umsetzschaltung V muß im hier betrachteten Ausführungsbeispiel also zu 4 % aus demjeni¬ gen Material bestehen, für welches die modifizierte Bandgap- Referenz-Schaltung B nicht ausgelegt ist und an welche sie da¬ her durch die Umsetzschaltung V anzupassen ist. Handelt es sich um Polysiliziumwiderstände mit verschiedenen Dotiermaterialien, so muß der Widerstand Ri mit zwei in Reihe geschalteten Widerständen der beiden Typen realisiert sein. Um keine Asymmetrien bezüglich der Kontaktlöcher zu bilden, soll¬ te auch der Widerstand R2 aus einer Reihenschaltung von zwei Widerständen aufgebaut sein, die beide aus dem Widerstands- material der Bandgap-Referenz-Schaltung B bestehen.The resistance Ri of the distribution or conversion circuit V in the exemplary embodiment considered here must therefore consist of 4% of the material for which the modified band gap Reference circuit B is not designed and to which it must therefore be adapted by means of the conversion circuit V. If polysilicon resistors with different doping materials are involved, the resistor Ri must be implemented with two resistors of the two types connected in series. In order not to form any asymmetries with regard to the contact holes, the resistor R 2 should also be constructed from a series connection of two resistors, both of which consist of the resistance material of the band gap reference circuit B.
In der Siemens-B6HF-Technologie kann auch ein weiterer Wider- standstyp aus stark p-dotiertem Polysilizium hergeεtellt wer¬ den, indem bei der Herstellung eine Maske, welche über im Vergleich dazu schwach zu dotierende Widerstände gelegt wird, weggelassen wird. Wird die Bandgap-Referenz-Schaltung B mit schwach (p~) p-dotierten Widerständen aufgebaut und soll die BaεisvorSpannung mittels einer Umsetzschaltung V an Strom¬ quellen mit stark p-dotierten Widerständen angepaßt werden, so kann der Widerstand Ri sehr einfach mit Hilfe einer Maske, die nur einen Teil des Widerstandes abdeckt, alε Serienschal¬ tung eines hoch (p+) und eines niedrig (p~) p-dotierten Wi- derstandes aufgebaut werden. Dies wird auch aus FIG 4 er¬ sichtlich, in der bei den beiden mit Kontakten K versehenen Widerständen Ri und R2 die jeweilige Maεke mit M bezeichnet ist. Der Widerstand Ri ist dann in seinem rechten Teil stark p-dotiert und weiεt einen Flächenwiderεtandswert von z.B. 60 Ohm/Square auf, während er in seinem linken Teil (ebenso wie der ganze Widerstand R2 ) schwach p-dotiert ist und einen Flächenwiderstandεwert von z.B. 1000 Ohm/Square aufweiεt.In Siemens B6HF technology, another type of resistor can also be produced from heavily p-doped polysilicon by omitting a mask which is placed over resistors which are weakly doped by comparison. If the bandgap reference circuit B is constructed with weakly (p ~ ) p-doped resistors and the base bias is to be adapted to current sources with heavily p-doped resistors by means of a conversion circuit V, the resistor Ri can be very easily with the aid of a Mask, which covers only part of the resistance, as a series circuit of a high (p + ) and a low (p ~ ) p-doped resistor. This can also be seen from FIG. 4, in which, in the case of the two resistors R 1 and R 2 provided with contacts K, the respective mask is designated by M. The resistor Ri is then heavily p-doped in its right part and has a sheet resistance value of, for example, 60 ohms / square, while it is weakly p-doped in its left part (just like the entire resistor R 2 ) and has a sheet resistance value of, for example 1000 ohms / square.
FIG 5 zeigt noch in zwei Diagrammen ein Simulationsergebnis, wobei im oberen Diagramm der Spannungsabfall an einem stark p-dotierten Widerstand (p+-Widerstand) und im unteren Dia¬ gramm der Spannungεabfall an einem εchwach p-dotierten Wider- εtand (p~-Widerstand) über dem Streuungsfaktor des p+-Wider- standεwerts für verschiedene Temperaturen (temp) und Streu¬ ungswerte (xr) des (in der Bandgap-Referenz-Schaltung B ein- „„,„„,„ PCT/DE96/01364 O 97/05537FIG. 5 also shows a simulation result in two diagrams, the voltage drop across a heavily p-doped resistor (p + resistor) in the upper diagram and the voltage drop across a weakly p-doped resistor in the lower diagram (p ~ - Resistance) above the scatter factor of the p + resistance value for various temperatures (temp) and scatter values (xr) of the (in the bandgap reference circuit B „„, „„, „PCT / DE96 / 01364 O 97/05537
13 gesetzen) schwach p-dotierten Widerstandεmaterials (p~-Wider¬ stand) dargestellt iεt. Der Spannungsabfall εchwankt um weni¬ ger als 12 mV, wobei zu bemerken ist, daß der Spannungsabfall an den schwach p-dotierten Widerständen, bereits aufgrund von Unzulänglichkeiten der Bandgap-Referenz um 8 mV schwankt. 13)) weakly p-doped resistance material (p ~ resistance) is shown. The voltage drop fluctuates by less than 12 mV, it should be noted that the voltage drop across the weakly p-doped resistors fluctuates by 8 mV due to inadequacies in the bandgap reference.

Claims

Patentansprüche claims
1. Schaltungsanordnung zur Basisvorspannungεverεorgung von1. Circuit arrangement for basic bias supply of
Stromque1lentransistoren in Bipolar-IC-Schaltungen, mit einer Bandgap-Referenz-Schaltung (B) zur Lieferung einer von der Temperatur und von Widerstandstoleranzen in der Weise abhän¬ gigen BasisvorSpannung, daß der von den Stromquellentransi- stören gelieferte Strom an von diesem durchflossenen Lastwi- derεtänden einen konεtanten Spannungεabfall hervorruft, und wenigstens einer ihr nachgeschalteten, die jeweilige Basiε- vorεpannung abgebenden Verteilerschaltung (V) mit einer Ein¬ gangsstufe (E) , einem Ausgangstreiber (A) und einem dazwischen¬ liegenden Inverter (J) , der mit einer an der Speisespannung liegenden Reihenschaltung eines ersten Tranεiεtors (Ti) , eines ersten Widerstandε (Ri) , eines zweiten Transistors (T2) und eines zweiten Widerstands (R2) gebildet ist, dadurch gekennzeichnet, daß zur Basisvorεpannungsversorgung von Stromquellentranεi- εtoren eines anderen Widerεtandεtypε als desjenigen, für den die Bandgap-Referenz-Schaltung (B) ausgelegt ist, in der zu¬ gehörigen Verteiler- bzw. Umsetzεchaltung (V) der zweite Wi¬ derstand (R2) von demjenigen Widerstandstyp ist, für den die Bandgap-Referenz-Schaltung (B) ausgelegt ist, und der erste Widerstand (Ri) durch die Reihenschaltung eines Widerstandε ebendieεeε Widerεtandεtyps und eines Widerstands des anderen Widerstandstyps gebildet ist.Current source transistors in bipolar IC circuits, with a bandgap reference circuit (B) for supplying a base bias voltage which is dependent on the temperature and resistance tolerances in such a way that the current supplied by the current source transistors disturbs the load current flowing through it. which causes a constant voltage drop, and at least one downstream circuit (V) with an input stage (E), an output driver (A) and an interposed inverter (J) connected to it and supplying the respective base bias voltage the supply voltage-connected series circuit of a first transistor (Ti), a first resistor (R i ), a second transistor (T 2 ) and a second resistor (R 2 ) is formed, characterized in that for the basic bias voltage supply of current source transistors of another type of resistor than that for which the bandgap reference circuit (B) is designed i st, in the associated distributor or converter circuit (V) the second resistor (R 2 ) is of the type of resistor for which the bandgap reference circuit (B) is designed, and the first resistor (Ri) is formed by the series connection of a resistor of this type of resistor and a resistor of the other type of resistor.
2. Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet, daß der erste Widerstand (RD ZU einem Bruchteil μ=—2. Circuit arrangement according to claim 1, characterized in that the first resistor (RD TO a fraction μ = -
Uw-m-UBE U w -mU BE
[worin kx das partielle Differential der von der modifizierten[where k x is the partial differential of that of the modified
Bandgap-Referenz-Schaltung (B) erzeugten Basisvorεpannung nach dem Streufaktor des Widerstandεmaterialε der modifiziertenBandgap reference circuit (B) generated base bias according to the scattering factor of the resistance material of the modified
Bandgap-Referenz-Schaltung (B) iεt, Uw die von der modifizier- ten Bandgap-Referenz-Schaltung (B) erzeugte Baεiεvorspannung iεt und m-UgE die mit einem Faktor m multiplizierte Baεiε- Emitter-Spannung der Eingangεschaltungs- und Ausgangεtreiber- transistoren der Verteiler- bzw. Umsetzεchaltung (V) iεt,] auε demjenigen Material besteht, für welches die modifizierte Bandgap-Referenz-Schaltung (B) nicht auεgelegt ist.Bandgap reference circuit (B) iεt, U w is the base bias generated by the modified bandgap reference circuit (B) iεt and m-UgE the base multiplied by a factor m The emitter voltage of the input circuit and output driver transistors of the distributor or converter circuit (V) is made of the material for which the modified band gap reference circuit (B) is not designed.
3. Schaltungsanordnung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß der zweite Widerstand (R2) durch die Reihenschaltung zweier Widerstände desjenigen Widerstandεtyps gebildet ist, für den die Bandgap-Referenz-Schaltung (B) ausgelegt ist. 3. Circuit arrangement according to claim 1 or 2, characterized in that the second resistor (R 2 ) is formed by the series connection of two resistors of the resistance type for which the bandgap reference circuit (B) is designed.
EP96924768A 1995-08-01 1996-07-24 Circuitry for supplying the base bias voltage of current source transistors in bipolar ic circuits Expired - Lifetime EP0842461B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19528209A DE19528209C1 (en) 1995-08-01 1995-08-01 Base bias voltage supply circuit for bipolar IC current source transistors
DE19528209 1995-08-01
PCT/DE1996/001364 WO1997005537A1 (en) 1995-08-01 1996-07-24 Circuitry for supplying the base bias voltage of current source transistors in bipolar ic circuits

Publications (2)

Publication Number Publication Date
EP0842461A1 true EP0842461A1 (en) 1998-05-20
EP0842461B1 EP0842461B1 (en) 1999-05-12

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP96924768A Expired - Lifetime EP0842461B1 (en) 1995-08-01 1996-07-24 Circuitry for supplying the base bias voltage of current source transistors in bipolar ic circuits

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EP (1) EP0842461B1 (en)
AT (1) ATE180067T1 (en)
CA (1) CA2228387A1 (en)
DE (2) DE19528209C1 (en)
ES (1) ES2134629T3 (en)
WO (1) WO1997005537A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103905028A (en) * 2012-12-25 2014-07-02 中芯国际集成电路制造(上海)有限公司 Signal receiver and signal transmitting device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2533199C3 (en) * 1975-07-24 1981-08-20 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for generating an auxiliary voltage that is independent of changes in the supply voltage
DE2849153C2 (en) * 1978-11-13 1982-08-19 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for generating a constant auxiliary DC voltage
DE2849231C3 (en) * 1978-11-13 1981-12-03 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for compensating the internal resistance of a voltage source formed by an emitter follower
DE3213838A1 (en) * 1982-04-15 1983-10-27 Philips Patentverwaltung Gmbh, 2000 Hamburg INTEGRATED CIRCUIT ARRANGEMENT WITH A VOLTAGE CURRENT TRANSFORMER
US4808908A (en) * 1988-02-16 1989-02-28 Analog Devices, Inc. Curvature correction of bipolar bandgap references
KR920010633A (en) * 1990-11-30 1992-06-26 김광호 Reference voltage generation circuit of semiconductor memory device
US5291122A (en) * 1992-06-11 1994-03-01 Analog Devices, Inc. Bandgap voltage reference circuit and method with low TCR resistor in parallel with high TCR and in series with low TCR portions of tail resistor

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9705537A1 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103905028A (en) * 2012-12-25 2014-07-02 中芯国际集成电路制造(上海)有限公司 Signal receiver and signal transmitting device

Also Published As

Publication number Publication date
DE59601894D1 (en) 1999-06-17
CA2228387A1 (en) 1997-02-13
EP0842461B1 (en) 1999-05-12
ES2134629T3 (en) 1999-10-01
DE19528209C1 (en) 1996-08-29
WO1997005537A1 (en) 1997-02-13
ATE180067T1 (en) 1999-05-15

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