EP0747849A1 - Switched capacitor integrator having switchable polarity - Google Patents

Abstract

The SC integrator has a first switch (1) and an integrator (2), which contains an amplifier (3) which is switched by a first circuit network (4). The network (4) connects the non-inverting output of the amplifier (3) via an integration capacitor (5) to the inverting input of the amplifier (3). A first terminal of a storage capacitor (6) is connected to earth. The second terminal of the storage capacitor (6) is connected to the non-inverting output of the amplifier (3) via a first switch (S1) and is connected via a second switch (S2) to the first switch (1). The first switch (1) contains a switching capacitor (7). The first terminal of the capacitor (7) is connected via a third and fourth switch (S3,S4) to earth and to the inverting input of the amplifier (3) respectively. Its second terminal is connected by a fifth switch (S5) to the input voltage and by a sixth switch (S6) to a further voltage potential. Also in the first circuit (1) is a connection via a seventh switch (S7) to a reference voltage (V ref). The second terminal of the storage capacitor (6) is connected by the second switch (S2) directly to the first terminal of the switching capacitor (7).

Description

The invention relates to a SC integrator polarity inversion according to the preamble of claim 1. A SC integrator (S witched C apacity integrator) is known to be an integrator with switched capacitors.

Such an SC integrator is preferably used in sigma-delta modulators, e.g. B. are part of analog / digital converters that are used in electricity meters to analog measurement signals such. B. a mains voltage and an associated electrical current, or their product, such as. B. convert an electrical power belonging to the current in question into digital values.

An SC integrator of the type mentioned at the outset is known from EP 0 607 712 A1 (see there FIG. 5 with the associated description) and is shown in FIG. 1. To reverse the polarity of an integration voltage stored in the integrator, it requires a storage capacitor whose capacitance value is relatively large, namely twice as large as that of an integration capacitor contained in the integrator.

The invention has for its object to improve the known SC integrator so that it, while maintaining its advantages, requires a storage capacitor, the capacitance value is significantly lower and thus space-saving and cheaper in an integrated circuit, for. B. can be produced by means of CMOS technology.

According to the invention, this object is achieved by the features specified in the characterizing part of claim 1. Advantageous embodiments of the invention result from the dependent claims.

Embodiments of the invention are shown in the drawing and are described in more detail below.

Fig. 1

ein Schaltbild des bekannten SC-Integrators,

Fig. 2

ein Schaltbild einer ersten Variante eines erfindungsgemässen SC-Integrators,

Fig. 3

ein Schaltbild einer zweiten Variante des erfindungsgemässen SC-Integrators und

Fig. 4

ein Schaltbild einer dritten Variante des erfindungsgemässen SC-Integrators.

Show it:

Fig. 1

a circuit diagram of the known SC integrator,

Fig. 2

2 shows a circuit diagram of a first variant of an SC integrator according to the invention,

Fig. 3

a circuit diagram of a second variant of the SC integrator according to the invention and

Fig. 4

a circuit diagram of a third variant of the SC integrator according to the invention.

The known SC integrator shown in FIG. 1 and constructed by means of switched capacitances is provided with at least one switch arrangement 1 and one integration arrangement 2, which contains an amplifier 3, which is connected to at least one circuit network 4, through which a non-inverting output of the amplifier 3 is connected via an integration capacitor 5 to an inverting input of the amplifier 3 and in which a first connection of a storage capacitor 6 is connected to ground, the second connection of which is on the one hand via a first switch S1 to the non-inverting output of the amplifier 3 and on the other hand via a second Switch S2 is connected to the switch arrangement 1. The latter in turn contains a switching capacitor 7, the first connection of which is connected to the ground or to the inverting input of the amplifier 3 by means of a third and fourth switch S3 and S4, while its second connection is connected to the input voltage Vin and by means of a fifth switch S5 of a sixth switch S6 is connected to a further voltage potential Vm, which is equal to the ground potential in the known SC integrator. In addition, there is a connection in the switch arrangement 1 from the second connection of the switching capacitor 7 via a seventh switch S7 to a reference voltage Vref. The capacitance value Cs of the storage capacitor 6 in the known integrator must be twice as large as the capacitance value Ci of the integration capacitor 5. The amplifier 3 is preferably an operational amplifier, the non-inverting input of which is connected to ground. Its non-inverting output is connected to a non-inverting input of a comparator 8, the inverting input of which is connected to ground. Every time an output voltage Vo of the amplifier 3 exceeds a value zero, a logic value "1" appears at the output of the comparator 8, which inverts the polarity of the reference voltage Vref via a control circuit, not shown, so that the output voltage Vo decreases again and the Logic value "1" at the output of the comparator 8 disappears again as soon as the output voltage Vo falls below the value zero.

ist, wenn $\text{Cs = 2Ci}$

. Die über den Integrationskondensator 5 anstehende Spannung hat somit, wie beabsichtigt, ihre Polarität geändert und damit ihren Wert von +Vo nach -Vo gewechselt. Dies alles ist für den bekannten Integrator an sich bekannt und ausführlich in der EP 0 607 712 A1 beschrieben. Der Speicherkondensator 6 muss somit einen relativ grossen Kapazitätswert Cs besitzen, der doppelt so gross ist wie derjenige des Integrationskondensators 5. Er benötigt somit in einer integrierten Schaltung relativ viel Platz und verteuert damit die letztere.The integration of the algebraic sum Vin + Vref of the input voltage Vin and the reference voltage Vref is carried out in the SC integrator, both of which can be both positive and negative, so that a total of four combinations + / +, - / -, +/- and - / + are possible. The input voltage + Vin or -Vin are integrated in succession during one sampling period of the integrator and the reference voltage + Vref or -Vref is integrated during another sampling period. If the two switches S5 and S4 are closed, the amplifier 3, which in this case is connected as an inverting amplifier, works as an inverting integrator and its output voltage Vo is then the integrated -Vin voltage when switches S1 and S2 are open. The + Vin voltage is integrated in two phases. In In a first of these phases, the switching capacitor 7 is charged with the input voltage Vin via the closed switches S5 and S3 during a sampling period, which has no effect on the amplifier 3 since the switch S4 is not closed. In addition, switches S6 and S7 are open during this phase. In a subsequent phase, the two switches S5 and S3 are open and the two switches S4 and S6 are closed, which has the consequence that on the one hand the polarity of the voltage Vin present via the switching capacitor 7 is inverted and on the other hand this inverted voltage in the amplifier operating as an inverting integrator 3 is inverted again so that a non-inverted integration voltage appears at the output of the latter. The same happens during further sampling periods with the reference voltage Vref with the difference that the switch S7 is actuated instead of the switch S5. If the polarity of the signal processing is changed, the output voltage Vo of the integrator has a wrong sign at the moment of switching, which must therefore be inverted after the switching, if the integration is to take place correctly. This takes place, again in two phases, by means of the storage capacitor 6 and the two switches S1 and S2. In a first of these phases, the output voltage Vo of the amplifier 3, which is at the same time the voltage across the integration capacitor 5, charges the storage capacitor 6 with a charge Cs · Vo when the switch S2 is open via the closed switch S1, which charge is then reversed in the next phase When the switch S1 is open, the polarity is reloaded into the integration capacitor Ci via the closed switch S2, so that its charge is totally identical $\text{CiVo - CsVo = Vo (Ci - 2Ci) = -VoCi}$

is when $\text{Cs = 2Ci}$

. The voltage present across the integration capacitor 5 has, as intended, changed its polarity and thus changed its value from + Vo to -Vo. All of this is known per se for the known integrator and is described in detail in EP 0 607 712 A1. The storage capacitor 6 must therefore have a relatively large capacitance value Cs, which is twice as large as that of the integration capacitor 5. It therefore requires a relatively large amount of space in an integrated circuit and thus makes the latter more expensive.

The SC integrators according to the invention described below work in principle similarly to the known SC integrator. However, you need a significantly lower capacitance value Cs of the storage capacitor 6, which is thus space-saving and cheaper in an integrated circuit, for. B. can be produced by means of CMOS technology.

, d. h. Cs ist in der ersten Variante bedeutend kleiner als der Wert 2Ci, der im bekannten Integrator erforderlich ist. Dies resultiert aus der Tatsache, dass der Speicherkondensator 6 über den Schalter S2 unmittelbar mit dem Schaltungskondensator 7 verbunden ist. Im Umschaltaugenblick lädt somit die über den Integrationskondensator 5 anstehende Spannung Vo über die beiden geschlossenen Schalter S1 und S2 bei offenem Schalter S4 die beiden Kondensatoren 6 und 7, die mittels der geschlossenen Schalter S2 und S6 parallelgeschaltet sind. In ihnen wird somit während einer ersten Phase eine Ladung $\text{(Cs + Cf)·Vo}$

geladen, die in der nächsten Phase mit umgekehrter Polarität in den Integrationskondensator 5 umgeladen wird, so dass die total dort geladene Ladung gleich $$\text{Ci·Vo - (Cs + Cf)·Vo = Vo·(Ci - 2Ci) = -Vo·Ci}$$

ist, wenn $\text{Cs + Cf = 2Ci}$

. Die Spannung über den Integrationskondensator 5 wird somit im Umschaltaugenblick umgepolt und von +Vo in -Vo umgewandelt, was diesmal jedoch einen kleineren Speicherkondensator Cs erfordert.The first variant of the SC integrator according to the invention shown in FIG. 2 is constructed similarly to the known SC integrator shown in FIG. 1 with the difference that the second connection of the storage capacitor 6 is via the second Switch S2 is connected directly to the first connection of the circuit capacitor 7. In particular, in the first variant there is also the connection via the seventh switch S7 between the reference voltage Vref and the second connection of the switching capacitor 7 and the further voltage potential Vm is equal to the ground potential. In the first variant, the sum Cf + Cs of a capacitance value Cf of the circuit capacitor 7 and a capacitance value Cs of the storage capacitor 6 is twice the capacitance value 2Ci of the integration capacitor 5. It therefore applies $\text{Cs = 2Ci - Cf}$

, ie Cs is significantly smaller in the first variant than the value 2Ci, which is required in the known integrator. This results from the fact that the storage capacitor 6 is connected directly to the switching capacitor 7 via the switch S2. At the instant of changeover, the voltage Vo present across the integration capacitor 5 thus charges the two capacitors 6 and 7, which are connected in parallel by means of the closed switches S2 and S6, via the two closed switches S1 and S2 when the switch S4 is open. During a first phase, a charge is thus created in them $\text{(Cs + Cf) Vo}$

charged, which is charged in the next phase with reverse polarity in the integration capacitor 5, so that the total charge there is the same $$\text{Ci · Vo - (Cs + Cf) · Vo = Vo · (Ci - 2Ci) = -Vo · Ci}$$

is when $\text{Cs + Cf = 2Ci}$

. The voltage across the integration capacitor 5 is thus reversed in the changeover instant and converted from + Vo to -Vo, but this time requires a smaller storage capacitor Cs.

In the first variant, each integration period consists of two time-graded partial integrations, the input voltage Vin being integrated in the first and the reference voltage Vref being integrated positively or negatively in the second. The number of partial integrations per integration period can be reduced to one partial integration per integration period using the second or third variant described below. H. the input voltage Vin and the reference voltage Vref are integrated at the same time, so that the required speed of the amplifier 3 in these two variants is lower than that in the first variant.

von Kapazitätswerten Cf und Cf1 der beiden Schaltungskondensatoren 7 und 9 sowie des Kapazitätswertes Cs des Speicherkondensators 6 ist in der zweiten Variante gleich dem doppelten Kapazitätswert 2Ci des Integrationskondensators 5. In der zweiten Variante wird somit je ein getrennter Schaltungskondensator 7 bzw. 9 für die Eingangsspannung Vin und für die Referenzspannung Vref verwendet. Die Kapazitätswerte Cf und Cf1 der beiden Schaltungskondensatoren 7 und 9 sind vorzugsweise gleich gross. In der zweiten Variante sind die drei Kondensatoren 6. 7 und 9 parallelgeschaltet, wenn die Schalter S2, S6 und S8 geschlossen sind. Im Umschaltaugenblick lädt die über den Integrationskondensator 5 anstehende Spannung Vo über die beiden geschlossenen Schalter S1 und S2 bei offenem Schalter S4 die drei Kondensatoren 6, 7 und 9. In ihnen wird somit während einer ersten Phase eine Ladung $\text{(Cs + Cf + Cf1)·Vo}$

geladen, die in der nächsten Phase mit umgekehrter Polarität in den Integrationskondensator 5 umgeladen wird, so dass die total dort geladene Ladung gleich $$\text{Ci·Vo - (Cs + Cf + Cf1)·Vo = Vo·(Ci - 2Ci) = -Vo·Ci}$$

ist, mit $\text{Cs + Cf + Cf1= 2Ci}$

. Die Spannung über den Integrationskondensator 5 wird somit im Umschaltaugenblick umgepolt und von +Vo in -Vo umgewandelt, was diesmal einen kleinen Speicherkondensator $\text{Cs = 2Ci - Cf - Cf1 = 2Ci - 2Cf}$

erfordert, mit $\text{Cf = Cf1}$

.The second variant of the SC integrator according to the invention shown in FIG. 3 is constructed similarly to the first variant. In particular, the further voltage potential Vm is again the ground potential. However, the switch arrangement 1 contains a further switch S8 and a further switching capacitor 9. The first connections of the two switching capacitors 7 and 9 are connected to one another and a second connection of the further switching capacitor 9 is connected to the ground via the further switch S8. The connection through the seventh This time, switch S7 is present between the reference voltage Vref and the second connection of the further switching capacitor 9. The sum $\text{Cf + Cf1 + Cs}$

of capacitance values Cf and Cf1 of the two circuit capacitors 7 and 9 and of the capacitance value Cs of the storage capacitor 6 is equal to twice the capacitance value 2Ci of the integration capacitor 5 in the second variant. In the second variant, a separate circuit capacitor 7 and 9 for the input voltage Vin and used for the reference voltage Vref. The capacitance values Cf and Cf1 of the two circuit capacitors 7 and 9 are preferably of the same size. In the second variant, the three capacitors 6. 7 and 9 are connected in parallel when the switches S2, S6 and S8 are closed. At the moment of changeover, the voltage Vo present across the integration capacitor 5 charges the three capacitors 6, 7 and 9 via the two closed switches S1 and S2 when the switch S4 is open, thus charging them during a first phase $\text{(Cs + Cf + Cf1) Vo}$

charged, which is charged in the next phase with reverse polarity in the integration capacitor 5, so that the total charge there is the same $$\text{Ci · Vo - (Cs + Cf + Cf1) · Vo = Vo · (Ci - 2Ci) = -Vo · Ci}$$

is with $\text{Cs + Cf + Cf1 = 2Ci}$

. The voltage across the integration capacitor 5 is thus reversed in the changeover instant and converted from + Vo to -Vo, this time a small storage capacitor $\text{Cs = 2Ci - Cf - Cf1 = 2Ci - 2Cf}$

requires with $\text{Cf = Cf1}$

.

The third variant of the SC integrator according to the invention shown in FIG. 4 is constructed similarly to the first variant. In particular, the connection via the seventh switch S7 between the reference voltage Vref and the second connection of the switching capacitor 7 is again present in the first switch arrangement 1.

der ersten Variante. Auf ähnliche Weise kann auch die zweite Variante nach Fig. 3 als differentielle Lösung aufgebaut werden.Compared to the first variant, the third variant differs as follows: This time, the further voltage potential Vm is the reference voltage -Vref provided with the reverse polarity. In the first switch arrangement 1, the second connection of the switching capacitor 7 is additionally connected to the input voltage voltage -Vin provided with the reverse polarity by means of a further switch S9. The amplifier 3 has a push-pull output and its non-inverting input is no longer connected to ground. In addition to the first circuit network 4 mentioned in the first variant and the first switch arrangement 1 mentioned there, the amplifier 3 is also connected to a second circuit network 4a and a second switch arrangement 1a, both of which are connected to one another and to the amplifier 3 in a similar way to that the first two are connected to each other and to the amplifier 3 with the difference that the inverting input of the amplifier 3 is due to its non-inverting input and the non-inverting input Output of the amplifier 3 is replaced by its inverting output. The two circuit networks 4 and 4a and the two switch arrangements 1 and 1a are each constructed identically. The switches S1 to S7 and S9 are controlled in the two circuit networks 4 and 4a or in the two switch arrangements 1 and 1a in such a way that switches of the same name are switched simultaneously during operation. The voltages Vin, -Vref, Vref and -Vin or -Vin, Vref, -Vref and Vin connected to the same names, ie identically numbered switches S5, S6, S7 and S9 are equal in the two switch arrangements 1 and 1a and of opposite polarity . The inverting output of amplifier 3 is connected to the inverting input of comparator 8, which input is therefore no longer connected to ground. The sum Cf + Cs of the capacitance values Cf and Cs of the circuit capacitor 7 of the first and second switch arrangement 1 and 1a and the storage capacitor 6 of the first and second circuit network 4 and 4a is in each case equal to twice the capacitance value 2Ci of the integration capacitor 5 of the relevant first or second circuit network 4 or 4a. The integrator of the third variant works as a differential integrator with differential input and reference voltages, which allows a simultaneous integration of these two voltages. Otherwise the equation applies again $\text{Cs + Cf = 2Ci}$

the first variant. In a similar manner, the second variant according to FIG. 3 can also be constructed as a differential solution.

Claims (6)

SC integrator with switchable polarity and with at least a first switch arrangement (1) and an integration arrangement (2) which contains an amplifier (3) which is connected to at least one first circuit network (4) through which a non-inverting output of the Amplifier (3) is connected via an integration capacitor (5) to an inverting input of the amplifier (3) and in which a first connection of a storage capacitor (6) is connected to ground, the second connection of which is connected via a first switch (S1) to the non-inverting one Output of the amplifier (3) and, on the other hand, is connected via a second switch (S2) to the first switch arrangement (1), which in turn contains a switching capacitor (7), the first connection of which is connected to the by means of a third and fourth switch (S3, S4) Ground or connected to the inverting input of the amplifier (3), while its second connection by means of a fifth switch (S5) is connected to the input voltage (Vin) and by means of a sixth switch (S6) to a further voltage potential (Vm) and also in the first switch arrangement (1) a connection via a seventh switch (S7) to a reference voltage (Vref) is present, characterized in that the second connection of the storage capacitor (6) is connected directly to the first connection of the switching capacitor (7) via the second switch (S2). SC integrator according to Claim 1, in which the connection via the seventh switch (S7) between the reference voltage (Vref) and the second connection of the switching capacitor (7) is present and in which the further voltage potential (Vm) is a ground potential, characterized in that that the sum (Cf + Cs) of the capacitance values (Cf, Cs) of the circuit capacitor (7) and the storage capacitor (6) is equal to twice the capacitance value (2Ci) of the integration capacitor (5). SC integrator according to Claim 1, in which the further voltage potential (Vm) is a ground potential, characterized in that the first switch arrangement (1) contains a further switch (S8) and a further switching capacitor (9), the first connections of the two Circuit capacitors (7, 9) are connected to one another and a second connection of the further circuit capacitor (9) is connected to ground via the further switch (S8), that the connection via the seventh switch (S7) between the reference voltage (Vref) and the second connection of the further circuit capacitor (9) is present and that the sum ( $\text{Cf + Cf1 + Cs}$

) the capacitance values (Cf, Cf1, Cs) of the two switching capacitors (7, 9) and the storage capacitor (6) is equal to twice the capacitance value (2Ci) of the integration capacitor (5). SC integrator according to Claim 3, characterized in that the capacitance values (Cf, Cf1) of the two switching capacitors (7, 9) are of the same size. SC integrator according to Claim 1, characterized in that the amplifier (3) has a push-pull output, that in addition to the first circuit network (4) and the first switch arrangement (1), the amplifier (3) also has a second circuit network (4a) and a second switch arrangement (1a) is connected, both of which are connected to one another and to the amplifier (3) in a similar way to the first two to themselves and are connected to the amplifier (3) with the difference that the inverting input of the amplifier ( 3) is replaced by its non-inverting input and the non-inverting output of the amplifier (3) by its inverting output. SC integrator according to Claim 5, in which the connection via the seventh switch (S7) between the reference voltage (Vref) and the second connection of the circuit capacitor (7) is present in the first switch arrangement (1), characterized in that the two circuit networks (4, 4a) and the two switch arrangements (1, 1a) are each constructed identically, that in each case in the first switch arrangement (1) the further voltage potential (Vm) is the reference voltage (-Vref) with reversed polarity and the second connection of the Circuit capacitor (7) is additionally connected by means of a further switch (S9) to the input voltage voltage (-Vin) provided with reverse polarity, that the switches (S1 to S7, S9) in the two circuit networks (4, 4a) and in the two Switch arrangements (1, 1a) are each controlled in such a way that switches of the same name are switched simultaneously during operation so that the switches (S5, S6 , S7, S9) connected voltages (Vin, -Vref, Vref, -Vin or -Vin, Vref, -Vref, Vin) in the two switch arrangements (1, 1a) are the same size and of opposite polarity and that in each case the sum (Cf + Cs) of the capacitance value (Cf) of the switching capacitor (7) of the first or second switch arrangement (1, 1a) and the capacitance value (Cs) of the storage capacitor (6) of the first or second circuit network (4, 4a) equal to twice the capacitance value (2Ci) of the integration capacitor (5) of the relevant first or second circuit network (4, 4a).

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