EP0724793B1 - Professional system for time multiplexing bidirectional transmission and switching for high-fidelity audio-analog and audio-digital signals and command and control signals - Google Patents

Abstract

PCT No. PCT/FR94/01199 Sec. 371 Date May 16, 1996 Sec. 102(e) Date May 16, 1996 PCT Filed Oct. 17, 1994 PCT Pub. No. WO95/11553 PCT Pub. Date Apr. 27, 1995A system for recording and broadcast studios for time multiplexed bidirectional transmission and switching high-fidelity audio-analog and audio-digital signals and command and control signals. A first bidirectional transmission medium conveys first frames produced by multiplexing the high-fidelity signals and command and control signals between a transmitter and a master receiver. The system also includes a controller with a man-machine interface (26, 32, 33, 34) receiving the high-fidelity signals transmitted by input circuits included in the transmitter and the command and control signals for monitoring in real time the evolution of the various parameters related to the signals, and for controlling in real time the modifications and configuration adaptions in the transmitter.

Description

The present invention relates to a professional system for bidirectional multiplex switching and transmission time for high-fidelity audio-analog signals and digital audio and command and control signals.

Digital signal transmission devices, in particular particular of digital audio signals such as those produced and treated in recording studios, stages and radio, television or concert hall control rooms present, in the case of certain applications, another number of problems.

Today, two groups of transmission devices are used, analog transmission systems and digital transmission systems. The systems of analog transmissions are essentially based on the principle of wire-to-wire electrical wiring. In that case, each of the sources is individually connected to a case which gathers in a single strand, called multipair, all the threads from each source. This multipair is connected to a second box which allows, by branch wiring, to route and distribute signals to different mixing boards. Finally, each agency has its own plug-in panel (called "patch") which allows it to organize its routing and signal assignment. The transmission of return of mixed or processed signals is done by the same multipair of which wires have been reserved for this purpose. Of such devices have drawbacks due to a very large weight and volume of wiring. In addition, they require difficult and costly implementation due the high number of connectors and connections and the obligation to intervene manually on the whole network.

A second group of transmission systems is made up by digital transmission systems. Such an example of system is for example described in patent US-A-5,060,273. This system is based on the principle of signal multiplexing digitized. Sources are generally connected individually on one or more concentration boxes which bring them together in a multipair. This one is connected in a transmitter box which converts each signal by the through pre-amplification circuits. These circuits are remotely controlled from a master receiver by a link specific. Digital signals multiplexed in series are transmitted in light form, in one or more fibers optics, and thus feed several control rooms simultaneously. The digital nature of the signal allows it to be routed by electronic control and memorize different configurations. The transmitter remote control and the signals in the other direction is through a second link in optical fiber. Such a transmission device, although solving previous device problems analog, i.e. less bulk and less weight, has other disadvantages, however, such as particular, the cost, the fragility of the transmission linked to the fragility of optical fibers and the impossibility of reconfiguring at leisure the configurations chosen so that the number of sources can be varied and the number of broadcast channels.

Another device for transmitting digital audio signals is described in US-A-4,922,536. In this device, a bidirectional transmission medium sends frames produced by multiplexing high-fidelity signals between a first time switching end equipment and transmission of signals, said transmitter, and a second equipment time switching and transmission end signals, says receiver. However, there is no description signal processing device in particular by means of of command and control signals for the parameters of the high fidelity signals to act in real time on parameters of said signals.

The aim of the present invention is therefore to propose a professional switching and transmission system bidirectional with time multiplexing for signals high fidelity and command and control signals between a transmitter and receiver, simple to implement and little costly regardless of transmitter and receiver.

Another object of the invention is to propose such a device extremely flexible, the transition from a configuration to a other being capable of being carried out in real time without intervention of a team of workers.

To this end, the invention relates to a professional system for bidirectional switching and transmission with multiplexing at less time for high-fidelity audio-analog signals and digital audio and control signals and controls, such as those produced and processed in studios recording, scenes and control rooms for radio, television or sound systems, or concert halls, including a first two-way transmission support for conveying first frames produced by multiplexing said high fidelity signals and command and control signals between a first switching end device time and signal transmission, said transmitter, and a second time switching end equipment and signal transmission, called master receiver, characterized in what it also includes interface control means human-machine receiving the high-fidelity signals transmitted by input circuits included in the first end equipment and said command and control signals to monitor in real time evolution of different relative parameters to said signals and to control in real time configuration changes and adaptations in said first end equipment by means of said signals command and control.

According to a preferred embodiment of the invention, said man-machine interface control means include means for calculating memorized parameters dynamic to calculate high-fidelity signals for each first respective absolute values, means for memorize said absolute values, means for comparing respectively said first absolute values at second absolute values previously stored, and means for detecting and storing further absolute values large magnitudes among the absolute values compared.

In addition, said man-machine interface control means include related computer processing means to said dynamic storage parameter calculation means and to addressing control means included in said second equipment to process and view in real time different information, control and routing blocks, corresponding respectively to transmission channels allocated in the system respectively to said signals high fidelity and to order in real time configuration changes and adaptations in said first end equipment by means of said signals command and control and this according to orders given by an operator, in particular by means of a pointing device such as mouse.

la figure 1 représente une vue en perspective de l'émetteur et du récepteur incluant le dispositif de traitement de données;

la figure 2 représente une vue schématique des modules d'entrée et sortie standardisés de l'émetteur et du récepteur;

la figure 3 représente un synoptique des circuits de l'émetteur;

La figure 4 représente un synoptique des circuits du récepteur;

la figure 5 représente une impression de l'écran de l'ordinateur permettant la visualisation de toutes les voies;

les figures 6 et 7 représentent respectivement une vue schématique des circuits de l'émetteur et du récepteur permettant de transmettre, à une vitesse élevée de manière bidirectionnelle, les données numériques;

la figure 8 représente les chronogrammes de l'émetteur et du récepteur dans le cas de circuits conformes aux figures 6 et 7; et

la figure 9 représente un schéma du circuit d'un multi-comparateur de données, à mémorisation dynamique.

Other characteristics and advantages of the invention will become apparent on reading the description of an exemplary embodiment and the accompanying drawings in which:

Figure 1 shows a perspective view of the transmitter and receiver including the data processing device;

FIG. 2 represents a schematic view of the standardized input and output modules of the transmitter and the receiver;

Figure 3 shows a block diagram of the transmitter circuits;

Figure 4 shows a block diagram of the receiver circuits;

FIG. 5 represents an impression of the computer screen allowing the visualization of all the channels;

Figures 6 and 7 respectively show a schematic view of the transmitter and receiver circuits for transmitting, at a high speed bidirectionally, the digital data;

FIG. 8 represents the timing diagrams of the transmitter and the receiver in the case of circuits conforming to FIGS. 6 and 7; and

FIG. 9 represents a diagram of the circuit of a multi-data comparator, with dynamic storage.

The switching and bi-directional transmission system time multiplexing for audio signals and command and control, object of the invention, comprises at minus two units, one called transmitter (E), the other called master receiver (RM), linked together by a bidirectional transmission such as cable. The transmitter (E), which constitutes the first end equipment of time transmission and signal transmission occurs generally, as shown in Figure 1, as a box comprising an electronic bus which can receive n modules. The n modules consist of a module responsible for the power supply of the box, of a control module of the transmission and n-2 modules which control either in input, either output each x analog signals or digital. The receiver (RM) has a configuration similar. It may also include a computer system autonomous consisting, for example, of a microcomputer portable, connected to the transmission control module by a parallel link 32. It is also possible to complete this device with a remote screen in order to increase the visual comfort of the user. In practice, the transmitter (E) and the receiver (RM) may have a similar shape to that shown in Figure 1. The input and output, as shown in Figure 2, are made up each of eight lanes, with witnesses for each lane light for clipping signal presence and presence of phantom power. In the example of such input modules and output shown in Figure 2, the first module constitutes an input module, the other two modules constitute output modules whose connection is tailored to the needs of the user. Thanks to this type of module, transmitter and receiver, having a configuration analogous it is possible to make the modular set of so as to vary infinitely the configurations. So, in a first configuration, it is possible to choose eight input modules for the transmitter and eight input modules output for the receiver. In this case, the configuration will have 64 source inputs and 64 source outputs.

In another configuration, it is possible to have, at the transmitter level, five input modules corresponding to 40 source inputs and three output modules corresponding to 24 mix outputs. Similarly, in the receiver, there will be five modules output corresponding to 40 mix outputs and three modules corresponding to 24 mix inputs.

In another configuration, it will still be possible to have for the transmitter three input modules, i.e. 24 inputs sources, an output module, i.e. 8 mix outputs and on the receiver, three output modules, i.e. 24 source outputs, one input module, i.e. 8 mixed inputs and two modules effect type input so as to have 16 effect inputs and two output modules to have 16 effect outputs. On the physical plane, the realization of the transmitter and the receiver is therefore reveals perfectly simple and reliable while providing a many possibilities. Of course, it should be noted that it is possible to link several receivers on the same transmitter as shown in Figure 3. The operation of a such a configuration will be described below.

Signals entering the transmitter through the input circuits shown in Figure 3 follow a path described below. Audio-analog and / or digital audio signals from various sound sources are brought in by appropriate cables on the transmitter input modules and are connected to it. The connection is represented by block 10 called the input circuit. Then, in the case of audio-analog signals, these audio-analog signals are either multiplexed then converted and multiplexed again, either directly converted using a converter analog digital per se known represented in 11 in the Figure 3 then multiplexed by means of digital multiplexing 12 also known. For reasons simplification, for eight input circuits corresponding to an input module, will correspond to a multiplexing circuit 12 digital. Thus, in the example shown in Figure 4, at maximum can be sent to the addressing controller 16, eight different digital audio signals. According to the number of input circuits therefore input modules which will have been used, there will be a corresponding number of output circuits to eight minus the number of input modules. These circuits of output are intended to carry signals generally audio-analog to different elements such as speaker amplifiers, tape recorders, etc., and more generally towards any device likely to treat said signals. Audio-analog input signals, a once converted and multiplexed, are introduced into a device 15 called transmission control device which has two blocks, namely an addressing controller 16 and a transmission synchronizer 18. As shown in the FIG. 4, the receiver (R) comprises, analogously to the transmitter, input circuits shown at 30, conversion circuits shown in 35 and multiplexing represented at 28, a synchronizer of transmission 24 and an addressing controller 25 forming part part of a transmission control device 22. The output circuits corresponding to the output module are as for them connected to the addressing controller by a system of demultiplexing 19 for the transmitter and 27 for the part receiver. These parts of the circuit are intended to receive signals from the transmitter respectively receiver so as to send them to the output circuits to various elements, such as the mixer or devices for the receiver elements. The transmission data frames thus produced by multiplexing the high-fidelity signals between the transmitter (E) and the receiver master (RM) is carried out by means of a transmission medium bidirectional 21 which can be constituted by a cable coaxial of conventional type of the type adapted to the controllers of transmission 15 and 22.

As shown in Figure 4, in addition to the high fidelity signals, command and control signals can be transmitted between the transmitter and the receiver, these signals allowing order changes and adaptations of configuration 17 in transmitter E. These control signals and control come from a control device to human-machine interface including a multi-comparator dynamic storage 26 receiving high-fidelity signals transmitted by input circuits 10 included in the first E end equipment, processing means IT 32, 33, 34 of the values calculated in the multi-comparator 26, said computer processing means also being connected to addressing control means 31 included in the receiver. Thanks to such a device, it becomes possible to process and view in real time different information, control and routing blocks, corresponding respectively to transmission channels (channels 1 to 64) allocated in the system respectively to said high-fidelity signals and to control in real time configuration changes and adaptations in said first end equipment E by means of said signals command and control and this according to orders given by an operator, in particular by means of a pointing device such as a mouse 34. To obtain such a path of signals it is necessary to control so synchronized bidirectional signal transmission between the transmitter and the receiver. These are the controllers 16 and 25 and the transmission synchronizers 18 and 24 respectively of the transmitter and the receiver which control this transmission. So the controller addressing 16 of the transmitter is intended to affect, towards the audio input 10 and output 14 circuits of the transmitter, the control signals 17 of their parameters, to affect the digital audio signals from the input multiplexers 12 to the transmission synchronizer 18 and / or to demultiplexers 19 of the output circuit 14, to affect the digital audio signals from synchronizer 18 to said synchronizers output multiplexers 19. As for the synchronizer of transmission, it concatenates the multiplexing of signals digital audio using a process such as the 2B3Q process, transmits in the transmission member such as a coaxial cable the 2B3Q frame, it deconcatenates and transmits to the controller addressing 16 the digital audio signals and the command from the master receiver by the transmission such as cable 21. Similarly, the transmission synchronizer 24 of the deconcatene receiver and transmits to the addressing controller 25 of the receiver the signals digital audio from the transmitter by the transmission medium 21; it transmits to the multi-comparator 26 all of the digital audio signals coming from the cable; it concatenates the multiplexing of digital audio signals and remote control from the addressing controller 25 according to a process such as the 2B3Q process; it emits in the organ of transmission medium 21 frame 2B3Q. As for the controller address 25 of the master receiver, it affects the signals digital audio from synchronizer 24 to said output multiplexers 27; it affects the signals digital audio input multiplexers 28 to the transmission synchronizer 24 and / or to said multiplexers 27 of the output circuit 29; he receives parallel link 32 control signals 31 parameters input 10 and output 14 audio circuits of the transmitter that it transmits to the transmission synchronizer 24; he receives control signals 31 from parallel link 32 parameters of the input and output circuits 29 and the affects them; it transmits the signals to the multi-comparator 26 digital audio of input circuits 30 and output 29 which would not be transmitted to the transmission synchronizer 24. Thus, such a bidirectional transmission of such amount of data is possible due to the fact that said E, RM, RE end devices include processors 3 and extractors 13 of type 2B3Q for carrying out operations concatenation and deconcatenation respectively after multiplexing and before demultiplexing of the multiplexed frames, and in that the zero value is assigned to an initial value to be fixed in said processors 3 and extractors 13. In indeed, the 2B3Q processors perform the combination of different states of the data coming from them in quartets including one is the zero volt value, the value at which the circuits addressing force the output of the transmission multiplexers thus putting the transmission line in reception mode. To obtain such a result, it is possible to set operates circuits according to Figures 6 and 7. In these circuits, we note that it is better to plan on the side receiver of the optocoupler means 23 placed at different levels on the signal and frame path to guarantee correct galvanic isolation between said equipment end and avoid all ground loop effects. We also note that the clocks and circuits of synchronization of receivers are controlled by loops phase locked on a single time reference. Once the problem of transmission has been resolved bidirectional real-time data, it is suitable for in addition to solving the problem of real-time processing of a plurality of signals. This problem is solved by means control with human-machine interface. These control means are in particular constituted by a multi-comparator with dynamic storage 26 which includes means 26a for dynamic storage parameter calculation to calculate for each of the high-fidelity signals of the first values respective absolute means for storing said b 26b absolute values, 26c means to compare respectively said first absolute values to second values previously stored absolute values, and means 26d for detect and store absolute values of larger magnitudes among the absolute values compared.

• un bus de données cadencé par un bus d'adresse permettant au dispositif d'accéder aux données à traiter;
• un comparateur logique (ex 74HC681), éventuellement associé à un quelconque calculateur;
• deux registres logiques à trois états (ex 74HC374);
• une mémoire vive (ex RAM 6264);
• un opérateur logique quelconque requérant le résultat de la comparaison (ex IBM PC).

An example of a circuit of this multi-comparator is shown in FIG. 9. In this case, the device preferably consists of the following elements:

• a data bus clocked by an address bus allowing the device to access the data to be processed;
• a logic comparator (ex 74HC681), possibly associated with any computer;
• two three-state logic registers (ex 74HC374);
• a random access memory (ex RAM 6264);
• any logical operator requesting the result of the comparison (eg IBM PC).

The operation of such a device shown in Figure 9 is the next.

The operator defines the initial reference data R to R ', which are transmitted to the register.

The comparator receives data P to P 'from the bus and RAM 3 data Q to Q 'whose respective addresses are defined by the address bus. The register receives simultaneously from the bus the data P to P '.

• place le registre en troisième état et, selon le résultat de la comparaison :
• soit autorise le registre à libérer les données P à P' et, simultanément, met la RAM en mode "écriture", ce qui a pour effet de remplacer les données Q à Q', jusqu'ici présente en mémoire, par les données P à P' qui deviennent, de ce fait, les nouvelles données Q à Q' ;
• soit bloque les données P à P' présentes dans le registre, et autorise celui-ci à se mettre à jour. D'autre part, la RAM est placée en mode "lecture" et autorise de ce fait une nouvelle opération de comparaison.

The comparator emits a control pulse which:

• places the register in third state and, according to the result of the comparison:
• either authorizes the register to release the data P to P 'and, simultaneously, puts the RAM in "write" mode, which has the effect of replacing the data Q to Q', hitherto present in memory, by the data P to P 'which therefore become the new data Q to Q';
• either blocks the data P to P 'present in the register, and authorizes the latter to update. On the other hand, the RAM is placed in "read" mode and therefore authorizes a new comparison operation.

As long as the condition of the comparator is not found, the RAM, being in read mode, transmits data to the operator Q to Q so that it performs any processing. We can easily define the frequency and length of operations data entry by the operator.

However, in order to refresh the data Q to Q 'in RAM 3 and to find there the initial reference values R to R ', the operator, by a command pulse, forces the register on its third state, puts the RAM in "write" mode and frees data from the registry to RAM; it can, from this done, put predefined data R to R 'in the RAM, and this simultaneously for all addresses.

In other words, the memorized multi-comparator dynamic 26 receives from synchronizer 24 and controller 25 digital signals and, for each signal, calculates the absolute value, compare this value with the value previously stored and stores the largest value magnitude. These operations take place for each signal and simultaneously for all. Subsequently, it provides the link parallel 32 and at its request the last values stored and periodically receives a reset order from all these values. The parallel link 32 then ensures the exchange with IT equipment 33 with the appropriate software all of the data from multicomparator 26 and all the data coming from the computer 33. The user, next to the data displayed, translates the data from computer 33 in control signals for setting the input 10 and output 14 circuits of the transmitter and the output 29 and input 30 circuits of the master receiver. To do this, it transmits its signals command to controller 25.

Thanks to this processing device, for each channel, it is possible from the computer keyboard to modify, by example, gain, phantom power (48 volts of each channel), modify parameters such as phase, channel cut, gain, label, choice of the route of entry, etc. Therefore, it is possible to act on each channel without any physical intervention, transmission of information and the execution of the order being almost done in real time.

To optimize such a treatment device, it is possible, by example, choose to present the channels on the screen as of a diagram similar to FIG. 5. In this case, each channel is displayed in the form of a meter, a label, its track input, its output path, the presence of power ghost and cutting off the track. To act on one of the tracks, we select by means of a pointing device appropriate (mouse, ball, cursor) the path to be modified and the selected parameter is modified. Of course, it is possible by means of appropriate software to integrate functions known per se such as the functions of saving, loading, etc.

As mentioned above, the device is made up for each site of a circuit including a part dedicated to the transmission (figure 6), the other on reception of the data (figure 7). One of the two sites is defined as master and, from this fact generates the time reference. This master is by convention called the transmitter, the other being the receiver. As mentioned above, the transmitter is preferably consisting of the following: a parallel data bus bidirectional microprocessor type clocked by a bus address 4 allowing the device to access data from each channel to be transmitted, a clock circuit 1 ensuring the timing of the device, one or more circuits of logic multiplexing 6, a synchronization circuit 2 defining the time reference and frequency sampling, a concatenation circuit 3 of data from type 2B3Q and impedance adaptation of cable 9 and a circuit reception detection 7, a deconcatenation circuit 13 2B3Q frame, a data demultiplexing circuit 8, a data and address bus access device. The receiver consists of the same elements as those of the transmitter. However, the clock device ensuring the timing and data addressing is subject to the reference transmitter time transmitted by cable.

• le circuit d'horloge 1 émet dans le circuit de synchronisation 2 la référence temporelle qui définit la période d'échantillonnage. Le circuit de synchronisation 2 crée alors une impulsion qu'il transmet au processeur 3;
• l'horloge 1 cadence, également, le circuit d'adressage 4, qui détermine le cheminement des données à émettre du bus 5 aux multiplexeurs 6;
• les circuits de multiplexage produisent les données à émettre au processeur 3 en les sérialisant, selon les ordres du circuit d'adressage 4; on a représenté les différents états possibles de ces données sérialisées sur la figure 8 (données 1 et 2);
• le processeur 3 combine les données selon un procédé 2B3Q qui puisse produire un diagramme d'état tel que celui de la figure 8. Il émet alors, selon le chronogramme de la figure 8, vers l'adaptateur de ligne 9, la référence temporelle du circuit 2 et les données processées;
• après l'émission de la dernière donnée, le circuit d'adresse force l'état logique des sorties des multiplexeurs sur la valeur du cas 1 de la figure 8, mettant ainsi la ligne de transmission en mode de réception;
• l'adaptateur 9 fournit l'énergie nécessaire à la transmission et garantit l'adaptation d'impédance.

Thus, in the transmission phase, as shown in FIG. 6, the signals will travel according to the following diagram:

• the clock circuit 1 transmits in the synchronization circuit 2 the time reference which defines the sampling period. The synchronization circuit 2 then creates a pulse which it transmits to the processor 3;
• the clock 1 cadence, also, the addressing circuit 4, which determines the routing of the data to be transmitted from the bus 5 to the multiplexers 6;
• the multiplexing circuits produce the data to be transmitted to the processor 3 by serializing it, according to the orders of the addressing circuit 4; the different possible states of these serialized data have been shown in FIG. 8 (data 1 and 2);
• processor 3 combines the data according to a method 2B3Q which can produce a state diagram such as that of FIG. 8. It then transmits, according to the timing diagram of FIG. 8, to the line adapter 9, the time reference of the circuit 2 and the processed data;
• after the transmission of the last datum, the address circuit forces the logic state of the outputs of the multiplexers to the value of case 1 of FIG. 8, thus putting the transmission line in reception mode;
• the adapter 9 supplies the energy necessary for the transmission and guarantees the impedance matching.

• après un délai proportionnel à la longueur du câble, le circuit 7, détectant l'arrivée de signaux de réception, transmet une impulsion au circuit d'horloge 1, qui relance le cadencement du circuit d'adresse 4;
• le processeur 13 réalise l'extraction des données du codage 2B3Q effectué dans le récepteur et les transmet en série vers les démultiplexeurs 8;
• les démultiplexeurs 8 convertissent les données série en données parallèles qu'ils transmettent sur le bus 5;
• le circuit d'adresse 4 détermine le cheminement des données reçues par la transmission dans les démultiplexeurs 8 et le bus 5.

Finally, in the reception phase, as shown in Figure 6, the signals will travel according to the following diagram:

• after a delay proportional to the length of the cable, the circuit 7, detecting the arrival of reception signals, transmits a pulse to the clock circuit 1, which restarts the timing of the address circuit 4;
• the processor 13 extracts the data from the 2B3Q coding carried out in the receiver and transmits it in series to the demultiplexers 8;
• the demultiplexers 8 convert the serial data into parallel data which they transmit on the bus 5;
• the address circuit 4 determines the routing of the data received by the transmission in the demultiplexers 8 and the bus 5.

• le détecteur 7, recevant les données provenant de l'émetteur, transmet, à travers un circuit de couplage optique 54, la référence temporelle au circuit d'horloge 1;
• l'horloge 1 s'asservit sur la référence temporelle par une boucle à verrouillage de phase et transmet au circuit d'adresse 4 les signaux de synchronisation;
• le circuit 13 extrait les données du codage 2B3Q transmis par l'émetteur et émet les données en série vers les démultiplexeurs 8 à travers le couplage optique 54;
• les démultiplexeurs 8 transmettent les données, dans leur format original, au bus selon les adresses du contrôleur 4.

Conversely, the receiver adopts a behavior in accordance with FIG. 7. Thus, during the reception phase:

• the detector 7, receiving the data coming from the transmitter, transmits, through an optical coupling circuit 54, the time reference to the clock circuit 1;
• the clock 1 is slaved to the time reference by a phase locked loop and transmits to the address circuit 4 the synchronization signals;
• the circuit 13 extracts the coding data 2B3Q transmitted by the transmitter and transmits the data in series to the demultiplexers 8 through the optical coupling 54;
• the demultiplexers 8 transmit the data, in their original format, to the bus according to the addresses of the controller 4.

• le circuit d'adressage 4 ayant adressé les données reçues de la transmission, adresse, de par le bus 5, vers le multiplexeur 6, les données à transmettre vers l'émetteur ;
• les circuits de couplage optique 54 assurent la liaison des données en série entre les multiplexeurs 6 et le processeur 3;
• le processus d'émission des données s'effectue alors de la même façon que dans l'émetteur.

Finally, during the issuing phase:

• the addressing circuit 4 having addressed the data received from the transmission, address, from the bus 5, to the multiplexer 6, the data to be transmitted to the transmitter;
• the optical coupling circuits 54 ensure the serial data link between the multiplexers 6 and the processor 3;
• the data transmission process is then carried out in the same way as in the transmitter.

Therefore, we get a transmission controller bidirectional digital data over a coaxial cable of minus 300 meters at speed authorizing the exchange of at least 80 mega-bits per second. As a result, users can react at the speed of the reflex.

According to a preferred embodiment of the invention shown in Figure 5, the system also includes a plurality of second ancillary equipment for time switching and transmission of signals, called RE slave receivers, and a plurality of second transmission media 20, said plurality of second secondary equipment RE being connected to said first equipment E respectively through said plurality second transmission media 20, and said transmission media transmission 20 conveying seconds unidirectionally frames multiplexed in the direction of the first E equipment towards the second additional equipment RE. Furthermore, said means operator interface 26, 32, 33, 34 are included in said second time switching equipment and transmission of RM signals, and said second RM equipment is located in a mixing room and said seconds RE ancillary equipment is located in control rooms recording or broadcasting. Like the master receiver, slave receivers can have an architecture modular and include different standardized modules (input, output, control, power supply) housed in bays.

Claims (9)

1. Professional system of commutation and bidirectional transmission with at least temporal multiplexing for high-fidelity audio-analog and audio-digital signals and command and control signals, such as those produced and processed in recording studios, on stages and in radio stations, television stations or concert halls, comprising a first bidirectional transmission carrier (21) for conveying 'first threads produced by multiplexing said high-fidelity signals and command and control signals between a first terminal equipment of temporal commutation and transmission of signals, called an emitter (E), and a second terminal equipment of temporal commutation and transmission of signals, called a master receiver (RM), characterised in that it also comprises man-machine interface control means (26, 32, 33, 34) which receive the high-fidelity signals transmitted by input circuits (10) included in the first terminal equipment (E) and receive said command and control signals for monitoring, in real time, the evolution of various parameters relating to said signals and for controlling, in real time, modifications and adaptations of configuration (17) in said first terrninal equipment (E) by means of said command and control signals.
2. System according to claim 1, characterised in that said man-machine interface control means comprise means (26a) for calculating the dynamic memorisation parameter in order to calculate, for each of the high-fidelity signals, first respective absolute values, means for memorising (26b) said absolute values, means (26c) for respectively comparing said first absolute values with second absolute values previously memorised, and means (26d) for detecting and memorising the absolute values of greater magnitudes among the absolute values compared.
3. System according to claim 1 or 2, characterised in that said man-machine interface control means comprise data processing means (32, 33, 34) connected to said means for calculating the dynamic memorisation parameter and to addressing control means (31) included in said second equipment for processing and visualising, in real time, various blocks of data, control and routing, respectively corresponding to transmission paths attributed respectively in the system to said high-fidelity signals, and for controlling, in real time, modifications and adaptations of configuration in at least the first terminal equipment (E) by means of said command and control signals, and such depends on orders given by an operator, more especially by means of a pointer device such as a mouse (34).
4. System according to any one of claims 1 to 3, characterised in that said terminal equipments (E, RM, RE) comprise processors (3) and extractors (13) of the 2B3Q type, in order to achieve concatenation and deconcatenation operations respectively after multiplexing and before demultiplexing the multiplexed threads, and in that the value zero is ascribed to an initial value to be set in said processors (3) and extractors (13).
5. System according to any one of claims 1 or 4, characterised in that it also comprises a plurality of second accompanying equipments of temporal commutation and transmission of signals, called slave receivers (RE), and a plurality of second transmission carriers (20), said plurality of second accompanying equipments (RE) being connected to said first equipment (E) respectively through said plurality of second transmission carriers (20), and said transmission carriers (20) conveying unidirectionally second multiplexed threads in the direction of the first equipment (E) towards the second accompanying equipments (RE).
6. System according to claim 5, characterised in that said man-machine interface control means (26, 32, 33, 34) are included in said second equipment of temporal commutation and transmission of signals (RM), and in that said second equipment (RM) is located in a mixing station and said second accompanying equipments (RE) are located in recording or broadcasting stations.
7. System according to any one of claims 1 to 6, characterised in that said first and second transmission carriers (20, 21) are formed by coaxial cabling of conventional type.
8. System according to any one of claims 1 to 7, characterised in that said terminal equipments (E, RM, RE) have a modular structure and comprise various standardised modules (input, output, control, power supply) housed in openings.
9. System according to any one of claims 1 to 8, characterised in that it also comprises means such as optocouplers (23, 14) placed at various levels along the path of the signals and threads in order to ensure correct galvanic insulation between said terminal equipments.

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