EP0609009A3 - Dual gate JFET circuit to control threshold voltage. - Google Patents

Dual gate JFET circuit to control threshold voltage. Download PDF

Info

Publication number
EP0609009A3
EP0609009A3 EP9494300383A EP94300383A EP0609009A3 EP 0609009 A3 EP0609009 A3 EP 0609009A3 EP 9494300383 A EP9494300383 A EP 9494300383A EP 94300383 A EP94300383 A EP 94300383A EP 0609009 A3 EP0609009 A3 EP 0609009A3
Authority
EP
European Patent Office
Prior art keywords
threshold voltage
dual gate
control threshold
gate jfet
jfet circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP9494300383A
Other languages
German (de)
French (fr)
Other versions
EP0609009A2 (en
Inventor
Doug R Farrenkopf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of EP0609009A2 publication Critical patent/EP0609009A2/en
Publication of EP0609009A3 publication Critical patent/EP0609009A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
EP9494300383A 1993-01-28 1994-01-19 Dual gate JFET circuit to control threshold voltage. Withdrawn EP0609009A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US1038093A 1993-01-28 1993-01-28
US10380 1993-01-28

Publications (2)

Publication Number Publication Date
EP0609009A2 EP0609009A2 (en) 1994-08-03
EP0609009A3 true EP0609009A3 (en) 1994-11-02

Family

ID=21745505

Family Applications (1)

Application Number Title Priority Date Filing Date
EP9494300383A Withdrawn EP0609009A3 (en) 1993-01-28 1994-01-19 Dual gate JFET circuit to control threshold voltage.

Country Status (2)

Country Link
EP (1) EP0609009A3 (en)
JP (1) JPH06303118A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2544241A3 (en) 2005-10-12 2013-03-20 Acco Insulated gate field-effect transistor having a dummy gate
US8928410B2 (en) 2008-02-13 2015-01-06 Acco Semiconductor, Inc. Electronic circuits including a MOSFET and a dual-gate JFET
US7863645B2 (en) 2008-02-13 2011-01-04 ACCO Semiconductor Inc. High breakdown voltage double-gate semiconductor device
US9240402B2 (en) 2008-02-13 2016-01-19 Acco Semiconductor, Inc. Electronic circuits including a MOSFET and a dual-gate JFET
US7808415B1 (en) 2009-03-25 2010-10-05 Acco Semiconductor, Inc. Sigma-delta modulator including truncation and applications thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0375124A1 (en) * 1988-12-20 1990-06-27 Tektronix Inc. CMOS comparator bias voltage generator
EP0446595A2 (en) * 1990-03-12 1991-09-18 Texas Instruments Incorporated A buffer circuit
EP0531101A2 (en) * 1991-09-05 1993-03-10 TriQuint Semiconductor, Inc. Low-noise bias circuit for multiple current sources

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0375124A1 (en) * 1988-12-20 1990-06-27 Tektronix Inc. CMOS comparator bias voltage generator
EP0446595A2 (en) * 1990-03-12 1991-09-18 Texas Instruments Incorporated A buffer circuit
EP0531101A2 (en) * 1991-09-05 1993-03-10 TriQuint Semiconductor, Inc. Low-noise bias circuit for multiple current sources

Also Published As

Publication number Publication date
EP0609009A2 (en) 1994-08-03
JPH06303118A (en) 1994-10-28

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