EP0587913B1 - Liquid-crystal display device with addressing scheme to achieve high contrast and high brightness values while maintaining fast switching - Google Patents
Liquid-crystal display device with addressing scheme to achieve high contrast and high brightness values while maintaining fast switching Download PDFInfo
- Publication number
- EP0587913B1 EP0587913B1 EP93906873A EP93906873A EP0587913B1 EP 0587913 B1 EP0587913 B1 EP 0587913B1 EP 93906873 A EP93906873 A EP 93906873A EP 93906873 A EP93906873 A EP 93906873A EP 0587913 B1 EP0587913 B1 EP 0587913B1
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- EP
- European Patent Office
- Prior art keywords
- lines
- line
- selection
- time
- select
- Prior art date
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3622—Control of matrices with row and column drivers using a passive matrix
- G09G3/3625—Control of matrices with row and column drivers using a passive matrix using active addressing
Definitions
- the invention relates to a display device comprising a liquid-crystal material between two supporting plates kept at a defined spacing whose surfaces face each other, a pattern of N line electrodes being arranged on the one surface, and a pattern of column electrodes being arranged on the other surface, which line electrodes cross the column electrodes and the crossing points thus form a matrix of display elements.
- the device comprises a control circuit for supplying data signals to the column electrodes and furthermore comprises a line-scanning circuit for periodic scanning of the line electrodes and supplying suitable line-select voltage signals.
- Such display devices are known and are usually operated by way of multiplex-addressing according to the so-called RMS mode.
- This method of addressing is considered to be the most common for addressing liquid-crystal display devices which are constructed as a matrix of pixels as described above, in which use is not made of one active electronic switch (such as, for example, a thin-film transistor) per pixel.
- the pixels are switched, from a first state to an optically different second state with the aid of the line-scanning circuit which periodically scans the line electrodes using a line-select pulse of magnitude V s and with the aid of the control circuit for supplying data signals to the column electrodes, which control circuit applies data voltages of magnitude ⁇ V d to the column electrodes over the time during which a line electrode is being scanned, in such a way that the optical state which is effected in a display element is determined by the so-called Root Mean Square (RMS) voltage value over the element in question.
- RMS Root Mean Square
- V 2 2 (V s + V d ) 2 /N + (N - 1) * V d 2 /N
- V 1 2 (V s - V d ) 2 /N + (N - 1) * V d 2 /N
- Figure 2 shows, in diagrammatic form, a transmission voltage characteristic of a picture cell belonging to that display device.
- Q 2 N max -1
- the resulting RMS voltage, when using N max lines, over a selected pixel will be equal to V 2
- the resulting RMS voltage over a non-selected pixel will be equal to V 1 .
- FIG. 1 in diagrammatic form, shows part of a matrix-oriented display device 1 having N max selection lines (line electrodes) 2, and describes in principle the functioning of the RMS multiplex-addressing method mentioned earlier.
- the information to be displayed is supplied to the data lines (column electrodes) 3.
- the display elements 4 At the location of the crossing points of the selection lines 2 and the data lines 3 there are the display elements 4. Depending on the information supplied on the data lines 3, the display elements 4 are in an ON state or OFF state.
- the image information (data voltage ⁇ V d ) is applied via the column electrodes.
- line 2 a is selected which, together with the information then present on the data lines 3 a , 3 b , 3 c (i.e. ⁇ V d ) determines the optical state of the pixels 4 aa , 4 bb , 4 cc .
- the display element reacts to the cumulative effect of a number of addressing pulses (or select pulses).
- a liquid-crystal display element in particular reacts in the same way as if it had been addressed by a sinusoidal-wave signal or a stepped-wave signal or the like, having the same RMS voltage value as that of the 'ON' and 'OFF' voltages V 2 and V 1 given by the expressions (1) and (2).
- the maximum number of selection lines N max is related to the value of the ratio V 2 /V 1 (threshold slope).
- the line-select voltage V s in particular will become high (the data or column voltage V d in this addressing scheme should always be chosen to be lower than the threshold voltage of the optical effect).
- DE-A-2 752 602 discloses an electro-optical display system with a matrix of display elements and a drive circuit, the elements containing oppositely positioned electrodes mutually isolated by an eletro-optically activated medium, electrically connected in lines and columns and supplied periodically with control signals.
- a signal independent of the display image is applied to each of the n line electrodes and a further signal is applied to column electrodes dependent on the image and selected from 2 n -1 signals.
- a display device comprising a liquid-crystal material between two supporting plates kept at a defined spacing whose surfaces face each other, a pattern of N line electrodes being arranged on the one surface, and a pattern of column electrodes being arranged on the other surface, the line electrodes crossing the column electrodes and display elements thus being formed at the locations of the crossings, and the device comprising a control circuit for supplying data signals to the column electrodes and furthermore comprises line-scanning circuit for periodic scanning of the line electrodes and supplying line-select voltage signals, wherein during the frame time of the periodic scanning of the line electrodes, a plurality of lines n is selected simultaneously during a selection time (t a ), the line-select voltage signals to be applied during the selection time (t a ) being different for each of the lines to be selected simultaneously, the amplitudes of the line-select voltage signals being equal for each of the lines to be selected simultaneously and the line-select voltage signals of the lines to be selected simultaneously being
- An even number of lines can be selected simultaneously during a selection time, one of the line-select voltage signals to be applied being a unipolar voltage existing for a period which is equal to the selection time and the other line-select voltages being signals of alternating polarity.
- the invention is based on the insight that using a plurality of smaller pulses during the frame time, instead of the single large select pulse per line, is possible if a plurality of lines are selected simultaneously during the frame time.
- Simultaneous selection of a plurality of lines during the frame time leads not only to a select signal having a smaller amplitude compared to standard RMS addressing, but at the same time provides the possibility of splitting the select signal with its associated selection period into a plurality of separate select pulses having a corresponding shortened pulse duration.
- Figure 4a shows voltage waveforms for the line signals and the data signals which can be used to write the information as represented in this figure by means of the designations 'ON' and 'OFF'.
- the line-select voltage signals of the two lines selected simultaneously are mutually orthogonal.
- the amplitude of the line-select voltage signals for the two lines to be selected simultaneously is equal to ⁇ A.
- the amplitude of the data voltages in Figure 4a which are supplied to the columns during the addressing time t a to write the desired information, during one half of the addressing time is equal to ⁇ D and during the other half of the addressing time is equal to 0.
- the actual shape of a data voltage signal is determined by information to be displayed (i.e. the pixels 'ON' or 'OFF').
- Figure 4a gives the four data voltage signals by which the possible information contents of the pixels in question which occur on the selected lines can be effected using the line-select voltage waveforms illustrated: i.e. the combination 'OFF'/'OFF' (column 1), 'OFF'/'ON' (column 2), 'ON'/'OFF' (column 3), 'ON'/'ON' (column 4).
- the pixels 1, 2, 5, 7 of the matrix illustrated in Figure 4a are assumed to be in the 'OFF' state; the pixels 3, 4, 6, 8 are in the 'ON' state.
- Figure 4b shows the resulting voltages over the pixels 1 to 8 inclusive of Figure 4a over the addressing time t a .
- the resulting voltage has been derived as the difference voltage V line - V column ⁇
- Figure 4b shows that the RMS voltage values during the addressing time t a of the pixels 1, 2, 5, 7 which are in the 'OFF' state, are equal to one another.
- the RMS voltage values of the 'ON' elements are equal to one another during t a .
- any 'ON' element and 'OFF' element in the matrix has the same RMS voltage value during the rest of the frame time (that is, during t f - t a ).
- V on 2 ⁇ t a * (A 2 /2 + (A + D) 2 /2) + t a * (N/2 - 1) * D 2 /2 ⁇ / ⁇ t a * N/2 ⁇
- V off 2 ⁇ t a * (A 2 /2 + (A - D) 2 /2) + t a * (N/2 - 1) * D 2 /2 ⁇ / ⁇ t a * N/2 ⁇
- the amplitude A of the line-select voltages for simultaneous selection of two lines is smaller by a factor of 2 1/2 than the select voltage V s required according to standard Alt & Pleshko RMS multiplex addressing (for identical number of lines N of the matrix). All this means that the maximum voltage amplitude (A + D) of an 'ON' element in the case of the addressing scheme described above with simultaneous selection of two lines is significantly smaller than the maximum voltage amplitude (V s + V d ) for the same element in the case of addressing according to the standard Alt & Pleshko principle.
- the complete addressing time t a is in fact composed of two equal timespans t a /2 with associated characteristic voltage values for the line-select signals and the data signals.
- the second selection timespan t a /2 may, for example, be chosen from a point in time following after half the frame time.
- This is illustrated in Figure 5 with the aid of a matrix of 10 lines. For the sake of simplicity, only the line-select voltage signals of the 10 lines during the scanning of the matrix over one frame time are shown. The situation illustrated is that in which two adjacent lines are selected. As has already been indicated earlier, this is not necessary.
- Figure 5a shows the scanning cycle in which the addressing time t a has not been split.
- the line selection period t a has been split into two timespans t a /2, the second half of the total addressing time t a taking place from a point in time which is situated halfway along the frame time.
- Figure 5c shows the addressing scheme according to the standard RMS multiplex method with the selection of a single line.
- the addressing scheme described in Figure 5b results in an addressing method in which the single select pulse of standard Alt & Pleshko multiplex addressing has been replaced by two separate select pulses having smaller amplitudes and preferably occurring at points in time which are uniformly distributed over the frame time.
- the maximum amplitude of the voltage over a pixel (during selection) for this addressing method is smaller than in the case of standard Alt & Pleshko addressing.
- an addressing scheme comprising simultaneous selection of two lines and splitting of the total addressing time t a into two separate selection timespans t a /2 as outlined in Figure 5b, are not sufficient to reduce or eliminate "FRAME RESPONSE", an addressing scheme can be chosen in which more than two lines are selected simultaneously, for example 4, or 6, or 8 etc.
- N of the matrix is a multiple of 'four'. This is, however, not necessary (in analogy with addressing in which two lines are selected simultaneously, as discussed earlier).
- Figure 6a shows voltage waveforms for the line signals which can be used to write the information as illustrated in this Figure.
- Figure 6a shows only three columns i, j, k, with the associated information contents of the pixels 11 to 22 inclusive which correspond to the crossing points of the columns i, j, k and the illustrated first group of four lines to be selected simultaneously.
- the pixels 11, 12, 13, 14 belonging with column i are assumed to be 'OFF', 'OFF', 'ON' and 'OFF', respectively.
- the elements 15, 16, 17, 18 belonging to column j are 'ON', 'OFF', 'OFF' and 'ON', respectively.
- the pixels 19, 20, 21, 22 belonging to column k are 'ON', 'ON', 'OFF' and 'ON', respectively.
- the line-select voltage signals of the four simultaneously selected lines are mutually orthogonal, in such a way that the select signal of one of the four lines to be selected simultaneously has a half-period which corresponds to the addressing time t b .
- this is the first (uppermost) line of the group of lines to be selected simultaneously. It is not necessary, however, for this particular line to have this line-select voltage wave form.
- the amplitude of the line-select voltage signals for the four lines to be selected simultaneously is equal to ⁇ B.
- voltage waveforms illustrated for the four lines can be chosen simultaneously.
- the data wave signals will have to be adjusted and they will be different from those drawn in Figure 6b.
- Figure 6b illustrates in which manner the data signals can be determined in order to write the information as depicted in Figure 6a.
- Pixel 11 should be in the 'OFF' state.
- the data signal applied to pixel 11 during selection should be a data voltage signal which is in phase with the line-select signal of the corresponding selected line.
- This signal is drawn in Figure 6b in the column whose heading reads COLUMN i.
- the amplitude X of this signal (and the amplitude of the line-select signals) are determined by the requirement that the RMS voltage value of the 'OFF' elements must have a determined value while the RMS voltage value of the 'ON' elements should be as large as possible.
- Pixel 12 should be in the 'OFF' state, and in analogy with the situation described above, the data voltage signal to be applied to pixel 12 during selection should be in phase with the line-select signal of the corresponding line.
- This signal is drawn in Figure 6b in the column having the heading COLUMN i. The amplitude of this signal is equal to the amplitude of the above data signal for pixel 11.
- Pixel 13 should be 'ON'. Therefore, a data signal should be applied to pixel 13 during selection, which is in antiphase with the line-select signal of the corresponding line.
- This data signal for pixel 13 again has the same amplitude as the two data signals mentioned earlier of pixels 11 and 12 and is shown in the column whose heading is COLUMN i.
- the data signal for pixel 14 during selection follows on the basis of reasoning analogous to that given for the other pixels in the column i in question. When summed, said four data signals produce the data signal as drawn in Figure 6b in the column whose heading is COLUMN i. During selection of the four lines to which the elements 11, 12, 13, 14 belong, this signal is applied to column i.
- the data signal can be determined which has to be applied to column j in order to produce the required information contents of pixels 15, 16, 17, 18.
- Figure 6b illustrates all these aspects by means of the voltage waveforms during selection for the elements in question and the total voltage (signal j) which, during selection, is applied to column j (see column with heading COLUMN j).
- the column with heading COLUMN k shows the data voltage signals and the total voltage of signal k for the column k in question (see signals drawn in the column with heading COLUMN k).
- data signals should be applied in which 5 levels can be distinguished, namely ⁇ E/2, 0.
- the combination of these levels in a data signal applied to a column 1 during selection is determined by the image contents of the elements in the column 1 in question.
- Figure 7 shows the resulting voltages (defined as V line - V column ) for elements 11 to 22 inclusive of Figure 6a during the selection time t b utilising the line-select signals drawn in Figure 6a and the data signals (signal i, signal j, signal k) drawn in Figure 6b.
- the RMS voltage values during the selection time t b of the 'OFF' elements 11, 12, 16, 17, 21, 14 are equal to one another.
- the RMS voltage values during the selection time t b of the 'ON' elements 15, 19, 20, 13, 18, 22 are equal to one another.
- the RMS voltage value of any 'OFF' element is equal to the RMS voltage value of any 'ON' element.
- V on 2 ⁇ t b * (B 2 + B * E/2 + E 2 /4) + (N/4 - 1) * t b * E 2 /4 ⁇ /(N * t b /4)
- V off 2 ⁇ t b * (B 2 - B * E/2 + E 2 /4) + (N/4 - 1) * t b * E 2 /4 ⁇ /(N * t b /4)
- V on V 1
- V on can be maximised for a given N as a function of B and E.
- the complete addressing time t b is composed of four equal timespans t b /4 with associated characteristic voltage values for the line-select signals and the data signals.
- the selection timespans t b /4 with the associated voltages can be distributed over the frame time.
- Figure 8 This is illustrated in Figure 8 with the aid of a matrix of 12 lines. For the sake of simplicity, only the line-select voltage signals of the 12 lines during the scanning of the matrix over a frame time are shown. The situation illustrated is that in which four adjacent lines are selected simultaneously. As has already been indicated earlier, this is not necessary.
- Figure 8a shows the scanning cycle in which the line selection period t b has not been split.
- the line selection span t b has been split into four timespans t b /4, which are uniformly distributed over the frame time. Other distributions are obviously also possible, for example a uniform distribution over the frame time of two selection timespans which are each equal to t b /2.
- the addressing scheme illustrated in Figure 8b results in an addressing method in which the single select pulse of standard Alt & Pleshko multiplex addressing has been replaced by four separate select pulses having smaller amplitudes and preferably occurring at points in time which are uniformly distributed over the frame time.
- the maximum amplitude of the voltage over the frame time is smaller than in the case of standard Alt & Pleshko addressing.
- simultaneous addressing of four lines it is also possible, as already discussed, to make use of, for example, two separate selection time-spans having an equal duration t b /2 which may or may not be uniformly distributed over the frame time.
- an addressing scheme can be chosen in which more than four lines are selected and the total selection period is again split into a number of selection timespans which may or may not be equal and which are or are not uniformly distributed over the frame time, in analogy to the manner as illustrated with the aid of the addressing schemes in which two or four lines are selected simultaneously.
- line-select voltage signals which can be used in the case of simultaneous selection of eight lines are given in Figure 9.
- the select signals in Figure 9 are again orthogonal, and one of the voltage signals used has a half-period which corresponds to the addressing time (selection time).
- the data signals which are used in combination with said line-select signals can be determined according to the principle described for the case of addressing a matrix with simultaneous selection of four lines (see, inter alia, Figure 6b and relevant text).
- the line-select signals of Figure 9 can again be used to define smaller selection periods than the total selection period t c shown in this figure, for example eight selection timespans of magnitude t c /8. Said eight selection periods may, for example, be uniformly distributed over the frame time, in analogy to the descriptions of the distributions in Figure 8b and Figure 5b.
- Q 2 N -1
- n The table below illustrates for a number of values of n, how many and which voltage levels may occur in the data signals which, in combination with line-select signals whose waveform is indicated in the illustrative embodiments given earlier, will lead to a desired image content.
Description
characterised in that the selection time (ta) for a group of n lines is split into a number of selection time intervals which are distributed over the frame time in such a way that the sum of said time intervals is equal to the selection time (ta) and in such a way that during scanning of the N lines not more than n lines are selected simultaneously, the line-select voltages to be applied to each of the lines to be selected simultaneously during these time intervals being identical to the portions of the original line-select voltage signals of the lines in question which correspond to the time intervals in question.
Claims (9)
- Display device comprising a liquid-crystal material between two supporting plates kept at a defined spacing whose surfaces face each other, a pattern of N line electrodes being arranged on the one surface, and a pattern of column electrodes being arranged on the other surface, the line electrodes crossing the column electrodes and display elements thus being formed at the locations of the crossings, and the device comprising a control circuit for supplying data signals to the column electrodes and furthermore comprises line-scanning circuit for periodic scanning of the line electrodes and supplying line-select voltage signals, wherein during the frame time of the periodic scanning of the line electrodes, a plurality of lines n is selected simultaneously during a selection time (ta), the line-select voltage signals to be applied during the selection time (ta) being different for each of the lines to be selected simultaneously, the amplitudes of the line-select voltage signals being equal for each of the lines to be selected simultaneously and the line-select voltage signals of the lines to be selected simultaneously being mutually orthogonal,
characterised in that the selection time (ta) for a group of n lines is split into a number of selection time intervals which are distributed over the frame time in such a way that the sum of said time intervals is equal to the selection time (ta) and in such a way that during scanning of the N lines not more than n lines are selected simultaneously, the line-select voltages to be applied to each of the lines to be selected simultaneously during these time intervals being identical to the portions of the original line-select voltage signals of the lines in question which correspond to the time intervals in question. - Display device according to claim 1 wherein an odd number of lines is selected during a selection time.
- Display device according to claim 1, wherein an even number of lines is selected simultaneously during a selection time, one of the line-select voltage signals to be applied being a unipolar voltage existing for a period which is equal to the selection time and the other line-select voltages being signals of alternating polarity.
- Display device according to claim 3 wherein said other line-select voltages of alternating polarity have as low a frequency as possible.
- Display device according to claim 3 or claim 4, wherein the selection time is split into a number of time intervals having an equal timespan in such a way that the sum of said time intervals is equal to the selection time, said time intervals being distributed over the frame time and, during the scanning of the N-line matrix, not more than n lines are selected simultaneously, the line-select voltages to be applied to each of the lines to be selected simultaneously during said time intervals being identical with the corresponding portions of the original line-select voltage signals of the lines in question.
- Display device according to any one of claims 1, 4, 5 or 6, wherein 2, 4 or 8 lines are selected simultaneously.
- Display device according to any one of claims 1, 2, 5 or 6, wherein the selection period is split into equal time intervals which are uniformly distributed over the frame time.
- Display device according to any preceding claim, wherein the amplitude Yn of the line-select voltages in the case of simultaneous selection of n lines is given by Yn = N1/2 * Xn/n, Xn being the maximum data voltage occurring in the data signals, and Xn being given by Xn = n1/2 * V1 * {0 5/(1 - N1/2)}1/2, where V1 is equal to the threshold voltage or the effective RMS voltage value of a display element in the 'OFF' state.
- Display device according to any one of claims 1 to 7, wherein the number of lines N of the matrix is not a multiple of the number of lines n to be selected simultaneously, an additional number of virtual or 'dummy' lines nv is attributed to the matrix such that the sum of N and nv is a multiple of n, and the amplitude Yn of the line-select voltages for simultaneous selection of n lines is given by Yn = N1/2 * Xn/n, Xn being the maximum data voltage occurring in the data signals, and Xn being given by Xn = n1/2 * V1 * {0.5/(1 - N1/2)}1/2, where V1 is equal to the threshold voltage or the effective RMS voltage value of a display element in the 'OFF' state.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL9200606 | 1992-04-01 | ||
NL9200606A NL194875C (en) | 1992-04-01 | 1992-04-01 | Display device containing a liquid crystal material. |
PCT/JP1993/000421 WO1993020550A1 (en) | 1992-04-01 | 1993-04-01 | Liquid-crystal display device with addressing scheme to achieve high contrast and high brightness values while maintaining fast switching |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0587913A1 EP0587913A1 (en) | 1994-03-23 |
EP0587913B1 true EP0587913B1 (en) | 1998-10-28 |
Family
ID=19860645
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP93906873A Expired - Lifetime EP0587913B1 (en) | 1992-04-01 | 1993-04-01 | Liquid-crystal display device with addressing scheme to achieve high contrast and high brightness values while maintaining fast switching |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0587913B1 (en) |
JP (1) | JPH06508451A (en) |
KR (1) | KR100244905B1 (en) |
DE (1) | DE69321804T2 (en) |
NL (1) | NL194875C (en) |
WO (1) | WO1993020550A1 (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69214206T2 (en) * | 1991-07-08 | 1997-03-13 | Asahi Glass Co Ltd | Control method for a liquid crystal display element |
US5900856A (en) * | 1992-03-05 | 1999-05-04 | Seiko Epson Corporation | Matrix display apparatus, matrix display control apparatus, and matrix display drive apparatus |
US5877738A (en) * | 1992-03-05 | 1999-03-02 | Seiko Epson Corporation | Liquid crystal element drive method, drive circuit, and display apparatus |
US5959603A (en) * | 1992-05-08 | 1999-09-28 | Seiko Epson Corporation | Liquid crystal element drive method, drive circuit, and display apparatus |
WO1993018501A1 (en) | 1992-03-05 | 1993-09-16 | Seiko Epson Corporation | Method and circuit for driving liquid crystal elements, and display apparatus |
EP1280128A3 (en) | 1994-11-17 | 2003-03-05 | Seiko Epson Corporation | Display device, display device drive method and electronic instrument |
JPH08179731A (en) * | 1994-12-26 | 1996-07-12 | Hitachi Ltd | Data driver, scanning driver, liquid crystal display device and its driving method |
JP3689781B2 (en) * | 1996-08-19 | 2005-08-31 | セイコーエプソン株式会社 | Driving method of liquid crystal device, liquid crystal device and electronic apparatus |
KR102593763B1 (en) | 2023-05-23 | 2023-10-26 | 주식회사 스푼라디오 | Method and server for guiding action of internet broadcasting host based on reaction of listeners |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH623709GA3 (en) * | 1977-10-31 | 1981-06-30 | Method for driving an electrooptic display device |
-
1992
- 1992-04-01 NL NL9200606A patent/NL194875C/en not_active IP Right Cessation
-
1993
- 1993-04-01 JP JP5517308A patent/JPH06508451A/en active Pending
- 1993-04-01 WO PCT/JP1993/000421 patent/WO1993020550A1/en active IP Right Grant
- 1993-04-01 DE DE69321804T patent/DE69321804T2/en not_active Expired - Fee Related
- 1993-04-01 KR KR1019930703675A patent/KR100244905B1/en not_active IP Right Cessation
- 1993-04-01 EP EP93906873A patent/EP0587913B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69321804D1 (en) | 1998-12-03 |
WO1993020550A1 (en) | 1993-10-14 |
NL9200606A (en) | 1993-11-01 |
NL194875B (en) | 2003-01-06 |
EP0587913A1 (en) | 1994-03-23 |
NL194875C (en) | 2003-05-06 |
DE69321804T2 (en) | 1999-05-12 |
KR100244905B1 (en) | 2000-02-15 |
JPH06508451A (en) | 1994-09-22 |
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