EP0534133A1 - Insulating sealing device for lead-in layers of a protection housing - Google Patents
Insulating sealing device for lead-in layers of a protection housing Download PDFInfo
- Publication number
- EP0534133A1 EP0534133A1 EP92114206A EP92114206A EP0534133A1 EP 0534133 A1 EP0534133 A1 EP 0534133A1 EP 92114206 A EP92114206 A EP 92114206A EP 92114206 A EP92114206 A EP 92114206A EP 0534133 A1 EP0534133 A1 EP 0534133A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- layers
- intermediate carrier
- printed conductors
- conductor tracks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000007789 sealing Methods 0.000 title 1
- 239000004020 conductor Substances 0.000 claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims abstract description 7
- 239000002184 metal Substances 0.000 claims abstract description 7
- 238000009413 insulation Methods 0.000 claims description 7
- 239000000919 ceramic Substances 0.000 abstract description 3
- 238000012216 screening Methods 0.000 abstract 3
- 239000010409 thin film Substances 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910020658 PbSn Inorganic materials 0.000 description 1
- 101150071746 Pbsn gene Proteins 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Definitions
- the invention relates to a device for the isolated routing of conductor tracks from a shielding housing, in which a thin-layer multilevel circuit with at least one integrated circuit mounted thereon is arranged on an intermediate carrier.
- Such a device is known (publication: "Thin Film Polyimide Multichip Modules" from Advanced Packaging Systems p. 26).
- a thin-layer multilevel circuit is arranged on an intermediate carrier, for example a ceramic plate, on which at least one integrated circuit is fastened.
- the electrical connections of the integrated circuit are connected via micro wires to thin-film conductors on the multi-level circuit.
- the thin-film multilevel circuit is arranged in a shielding housing, the wall of which is fastened to the intermediate carrier.
- lines running beneath the wall of the shielding housing and embedded in the intermediate carrier are provided.
- the technical problem on which the invention is based is to improve the known device in such a way that the routing of the conductive connections is easier to accomplish.
- this solution has the advantage that the conductor tracks forming the leads do not have to be embedded in the intermediate carrier.
- it is not necessary to produce the insulation layer and the solderable metal layer in separate process steps. Rather, they can be produced in the same operation in the production of the corresponding conductive layers and insulation layers of the thin-layer multilevel circuit.
- the intermediate carrier 1 can be seen, which is attached to a printed circuit (not shown) and its contact surfaces 2 above Legs 3 are connected to conductors of the printed circuit in an electrically conductive manner.
- the thin-film multilevel circuit 5, on which the integrated circuit 6 is fastened, is arranged on the intermediate carrier 1 within the shielding housing 4.
- the electrically conductive connections between the integrated circuit 6 and the thin-layer multilevel circuit 5 are realized by the microwires 7.
- the shielding housing 4 consists of the wall 8 shaped as a frame and the cover 9.
- the insulation layer 10 and the solderable metal layer 11 are arranged between the contact surfaces 2 and the lower end of the wall 8.
- the wall 8 is soldered to the metal layer 11 by means of a solder metal 12.
- the thin-layer multilevel circuit consists, for example, of the alternating arrangement of conductor tracks made of aluminum layers and insulation layers made of polyimide.
- the solderable layer applied to the top polyimide layer consists, for example, of vapor-deposited chromium + nickel + gold.
- a soldering material e.g. PbSn
- PbSn is galvanically applied to this layer by means of a photomask on certain surfaces, for example on which the components or the frame 8 are to be soldered.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
Description
Die Erfindung betrifft eine Vorrichtung zur isolierten Herausführung von Leiterbahnen aus einem Abschirmgehäuse, in dem auf einem Zwischenträger eine Dünnschicht-Mehrebenenschaltung mit wenigstens einer darauf befestigten integrierten Schaltung angeordnet ist.The invention relates to a device for the isolated routing of conductor tracks from a shielding housing, in which a thin-layer multilevel circuit with at least one integrated circuit mounted thereon is arranged on an intermediate carrier.
Eine solche Vorrichtung ist bekannt (Druckschrift: "Thin Film Polyimide Multichip Modules" der Fa. Advanced Packaging Systems S. 26). Bei der bekannten Vorrichtung ist auf einem Zwischenträger, beispielsweise einer Keramikplatte, eine Dünnschicht-Mehrebenenschaltung angeordnet, auf welcher wenigstens eine integrierte Schaltung befestigt ist. Die elektrischen Anschlüsse der integrierten Schaltung sind über Mikrodrähte mit Dünnschichtleitern auf der Mehrebenenschaltung verbunden. Die Dünnschicht-Mehrebenenschaltung ist in einem Abschirmgehäuse angeordnet, dessen Wand auf dem Zwischenträger befestigt ist. Um elektrisch leitende Verbindungen zwischen der Dünnschicht-Mehrebenenschaltung und den am Rand des Zwischenträgers gelegenen Anschlußkontakten zu schaffen, sind unterhalb der Wand des Abschirmgehäuses verlaufende, im Zwischenträger eingebettete Leitungen vorgesehen.Such a device is known (publication: "Thin Film Polyimide Multichip Modules" from Advanced Packaging Systems p. 26). In the known device, a thin-layer multilevel circuit is arranged on an intermediate carrier, for example a ceramic plate, on which at least one integrated circuit is fastened. The electrical connections of the integrated circuit are connected via micro wires to thin-film conductors on the multi-level circuit. The thin-film multilevel circuit is arranged in a shielding housing, the wall of which is fastened to the intermediate carrier. In order to create electrically conductive connections between the thin-film multilevel circuit and the connection contacts located at the edge of the intermediate carrier, lines running beneath the wall of the shielding housing and embedded in the intermediate carrier are provided.
Diese bekannte Art der Herausführung der leitenden Verbindungen aus dem Inneren des Abschirmgehäuses zum Rand des Zwischenträgers macht erhebliche fertigungstechnische Schwierigkeiten, weil diese in dem Zwischenträger eingebetteten Leiterbahnen nur dadurch erzeugt werden können, daß dieser als Dickschicht-Mehrebenenschaltung mit Keramikisolationsschichten hergestellt wird. Die Durchführbarkeit dieses Herstellungsverfahrens wird durch die Breite der Leiterbahnen begrenzt.This known way of leading the conductive connections out of the interior of the shielding housing to the edge of the intermediate carrier causes considerable manufacturing difficulties because these conductor tracks embedded in the intermediate carrier can only be produced by producing them as a thick-layer multilevel circuit with ceramic insulation layers. The feasibility of this manufacturing process is limited by the width of the conductor tracks.
Das der Erfindung zugrundeliegende technische Problem besteht darin, die bekannte Vorrichtung in der Weise zu verbessern, daß die Herausführung der leitenden Verbindungen einfacher zu bewerkstelligen ist.The technical problem on which the invention is based is to improve the known device in such a way that the routing of the conductive connections is easier to accomplish.
Dieses technische Problem ist erfindungsgemäß dadurch gelöst, daß die Leiterbahnen auf der Oberfläche des Zwischenträgers angeordnet sind und zwischen dem Fußpunkt der Abschirmgehäusewand und den Leiterbahnen eine Isolationsschicht und eine lötbare Metallschicht angeordnet sind.This technical problem is solved according to the invention in that the conductor tracks are arranged on the surface of the intermediate carrier and an insulation layer and a solderable metal layer are arranged between the base point of the shielding housing wall and the conductor tracks.
Diese Lösung hat einerseits den Vorteil, daß die die Herausführungen bildenden Leiterbahnen nicht in den Zwischenträger eingebettet werden müssen. Andererseits ist es nicht notwendig, die Isolationsschicht und die lötbare Metallschicht in eigenen Verfahrensschritten herzustellen. Sie können vielmehr im gleichen Arbeitsgang bei der Herstellung der entsprechenden leitenden Schichten und Isolationsschichten der Dünnschicht-Mehrebenenschaltung mit hergestellt werden.On the one hand, this solution has the advantage that the conductor tracks forming the leads do not have to be embedded in the intermediate carrier. On the other hand, it is not necessary to produce the insulation layer and the solderable metal layer in separate process steps. Rather, they can be produced in the same operation in the production of the corresponding conductive layers and insulation layers of the thin-layer multilevel circuit.
Die Erfindung ist nachstehend anhand der Figur erläutert, welche einen Längsschnitt durch ein Ausführungsbeispiel der erfindungsgemäßen Vorrichtung zeigt. In der Figur ist der Zwischenträger 1 zu erkennen, welcher auf einer - nicht gezeigten - gedruckten Schaltung befestigt und dessen Kontaktflächen 2 über Anschlußbeine 3 mit Leiterbahnen der gedruckten Schaltung elektrisch leitend verbunden sind.The invention is explained below with reference to the figure, which shows a longitudinal section through an embodiment of the device according to the invention. In the figure, the
Auf dem Zwischenträger 1 ist innerhalb des Abschirmgehäuses 4 die Dünnschicht-Mehrebenenschaltung 5 angeordnet, auf welcher die integrierte Schaltung 6 befestigt ist. Die elektrisch leitenden Verbindungen zwischen der integrierten Schaltung 6 und der Dünnschicht-Mehrebenenschaltung 5 sind durch die Mikrodrähte 7 verwirklicht.The thin-film
Das Abschirmgehäuse 4 besteht aus der als Rahmen geformten Wand 8 und dem Deckel 9.The
Zwischen den Kontaktflächen 2 und dem unteren Ende der Wand 8 sind die Isolationsschicht 10 und die lötbare Metallschicht 11 angeordnet. Die Wand 8 ist mittels eines Lötmetalls 12 mit der Metallschicht 11 verlötet.The insulation layer 10 and the
Die Dünnschicht-Mehrebenenschaltung besteht beispielsweise aus der abwechselnden Anordnung von Leiterbahnen aus Aluminiumschichten und Isolationsschichten aus Polyimid. Die auf der obersten Polyimidschicht aufgebrachte lötbare Schicht besteht beispielsweise aus aufgedampftem Chrom + Nickel + Gold. Auf diese Schicht wird mittels einer Photomaske auf bestimmte Flächen, beispielsweise an denen die Bauelemente oder der Rahmen 8 angelötet werden sollen, ein Lötwerkstoff (z.B. PbSn) galvanisch aufgebracht.The thin-layer multilevel circuit consists, for example, of the alternating arrangement of conductor tracks made of aluminum layers and insulation layers made of polyimide. The solderable layer applied to the top polyimide layer consists, for example, of vapor-deposited chromium + nickel + gold. A soldering material (e.g. PbSn) is galvanically applied to this layer by means of a photomask on certain surfaces, for example on which the components or the
Claims (1)
dadurch gekennzeichnet,
daß die Leiterbahnen auf der Oberfläche des Zwischenträgers angeordnet sind und zwischen dem Fußpunkt der Abschirmgehäusewand und den Leiterbahnen eine Isolationsschicht und eine lötbare Metallschicht angeordnet ist.Device for the isolated routing of conductor tracks out of a shielding housing, in which a thin-layer multilevel circuit with at least one integrated circuit mounted thereon is arranged on an intermediate carrier,
characterized,
that the conductor tracks are arranged on the surface of the intermediate carrier and an insulation layer and a solderable metal layer is arranged between the base point of the shielding housing wall and the conductor tracks.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4131534 | 1991-09-21 | ||
| DE4131534A DE4131534A1 (en) | 1991-09-21 | 1991-09-21 | DEVICE FOR THE INSULATED LEAD OUT OF PATHWAYS FROM A SHIELDING HOUSING |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP0534133A1 true EP0534133A1 (en) | 1993-03-31 |
Family
ID=6441206
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP92114206A Withdrawn EP0534133A1 (en) | 1991-09-21 | 1992-08-20 | Insulating sealing device for lead-in layers of a protection housing |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP0534133A1 (en) |
| DE (1) | DE4131534A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102007045511B4 (en) * | 2007-09-24 | 2015-03-12 | Continental Automotive Gmbh | Module for integrated control electronics with simplified design |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19522455A1 (en) * | 1995-06-21 | 1997-01-02 | Telefunken Microelectron | Electromagnetic compatibility screening of electronic components esp. integrated circuits in motor vehicles |
| DE102013202037A1 (en) * | 2013-02-07 | 2014-08-07 | Olympus Winter & Ibe Gmbh | Hermetic bushing, method of making a hermetic bushing, circuit board and surgical instrument |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2010429A1 (en) * | 1969-02-28 | 1970-09-10 | Hawker Siddeley Dynamics Ltd., Hatfield, Hertfordshire (Grossbritannien) | Electrical circuit arrangement with a hermetic seal |
| DE3304215A1 (en) * | 1983-01-20 | 1984-07-26 | LGZ Landis & Gyr Zug AG, Zug | Ceramic housing for a hybrid circuit |
| EP0266210A2 (en) * | 1986-10-29 | 1988-05-04 | Kabushiki Kaisha Toshiba | Electronic apparatus comprising a ceramic substrate |
-
1991
- 1991-09-21 DE DE4131534A patent/DE4131534A1/en not_active Withdrawn
-
1992
- 1992-08-20 EP EP92114206A patent/EP0534133A1/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2010429A1 (en) * | 1969-02-28 | 1970-09-10 | Hawker Siddeley Dynamics Ltd., Hatfield, Hertfordshire (Grossbritannien) | Electrical circuit arrangement with a hermetic seal |
| DE3304215A1 (en) * | 1983-01-20 | 1984-07-26 | LGZ Landis & Gyr Zug AG, Zug | Ceramic housing for a hybrid circuit |
| EP0266210A2 (en) * | 1986-10-29 | 1988-05-04 | Kabushiki Kaisha Toshiba | Electronic apparatus comprising a ceramic substrate |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102007045511B4 (en) * | 2007-09-24 | 2015-03-12 | Continental Automotive Gmbh | Module for integrated control electronics with simplified design |
Also Published As
| Publication number | Publication date |
|---|---|
| DE4131534A1 (en) | 1993-04-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP1601016B1 (en) | Apparatus in screw pressure contact with a power semiconductor module | |
| DE10316355B3 (en) | Flexible spring-loaded outer contact system for semiconductor module carrying heavy load has housing with frame members at sides carrying contact points for contact springs | |
| DE2752438C2 (en) | Integrated circuit carrier | |
| EP1450404B1 (en) | Assembly in pressure contact with a power semiconductor module | |
| EP1843393A2 (en) | Pressure contact type power semiconductor module | |
| WO1998007193A1 (en) | Multichip module | |
| DE69737320T2 (en) | Semiconductor device | |
| DE10258570A1 (en) | Housing for power semiconductor modules | |
| DE102013201931B4 (en) | Laser component and method for its manufacture | |
| DE3416348C2 (en) | ||
| DE19727548A1 (en) | Electronic control unit | |
| DE102005050534B4 (en) | The power semiconductor module | |
| EP0645953B1 (en) | Method of producing a two or multilayer wiring structure and two or multilayer structure made thereof | |
| DE19961116A1 (en) | PCB arrangement | |
| DE19816794A1 (en) | Printed circuit board system, for electronic combination instrument | |
| DE3930858C2 (en) | module Design | |
| EP0534133A1 (en) | Insulating sealing device for lead-in layers of a protection housing | |
| DE3614087C2 (en) | Semiconductor device assembly and method for electrically connecting an IC chip | |
| DE3545560A1 (en) | ELECTRICAL PRESSURE FITTING SOCKET FOR A DIRECT CONNECTION TO A SEMICONDUCTOR CHIP | |
| DE10302022A1 (en) | Chip scale package comprises conductive layers formed on upper and lower chip surfaces and electrode surfaces on same side surfaces of conductive layers | |
| DE102017211336A1 (en) | Power module with surface-mounted electrical contacting elements | |
| WO1998000865A1 (en) | Module for an electrical device | |
| DE102016101757A1 (en) | CIRCUIT MODULE WITH SURFACE MOUNTABLE SURFACE BLOCKS FOR CONNECTING A PCB | |
| EP0278485B1 (en) | Process for making a digitalization board | |
| EP1005703A1 (en) | Method for producing electrically conductive cross connections between two layers of wiring on a substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE CH DE ES FR GB IT LI NL SE |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 19931213 |