EP0501718A1

EP0501718A1 - Colour television camera apparatus and colour television signal generating methods

Info

Publication number: EP0501718A1
Application number: EP92301519A
Authority: EP
Inventors: Kazuyoshi c/o Patents Division Miyamoto; Takashi C/O Patents Division Asaida
Original assignee: Sony Corp
Current assignee: Sony Corp
Priority date: 1991-02-25
Filing date: 1992-02-24
Publication date: 1992-09-02
Anticipated expiration: 2012-02-24
Also published as: KR920017489A; US5255081A; KR100247371B1; EP0501718B1; JPH04269091A; DE69219641D1; JP2936760B2; DE69219641T2

Abstract

In a colour television camera apparatus, a 2fs-rate luminance signal and fs-rate chrominance signals are selectively generated by a matrix circuit (8), in conformity with a plurality of standard systems, from 2fs-rate three-colour image pick-up signals generated by an image signal pick-up unit (3, 4). The fs-rate chrominance signals are modulated by a modulating circuit (12) into fs-rate modulated chrominance signals which are converted by a rate converter (13) into 2fs-rate modulated chrominance signals. The 2fs-rate luminance signals and the 2fs-rate modulated chrominance signals are combined by an adder (14) into 2fs-rate digital composite video signals which are converted by a D/A converter (15) into analogue composite video signals. In this manner, analogue composite video signals, in which the bandwidth of the luminance signals has been enhanced up to the sampling frequency fs, may be selectively output in conformity with a plurality of standard systems.

Description

This invention relates to colour television camera apparatus and colour television signal generating methods.
In a solid-state imaging device comprising a solid-state image sensor having a discrete pixel structure, including for example charge-coupled devices (CCDs), used as image pick-up means, since the solid-state image sensor itself represents a sampling system, aliasing components from spatial sampling frequencies fs are mixed into image pick-up output signals of the solid-state image sensor.
In a colour television camera device, known arrangements for generating a colour image include a two CCD type solid-state image pick-up device for forming three colour images with a solid-state image sensor forming a green colour image and a solid-state image sensor with a colour coding filter forming red colour pixels and blue colour pixels of a colour image, and a three CCD type solid-state image pick-up device form forming three colour images by separate solid-state image sensors.
There is also known a so-called spatial pixel shifting method, in which, to improve the resolution in the above-mentioned multiple CCD imaging devices, the solid-state image sensor for forming a red colour image and the solid-state image sensor for forming a blue colour image are shifted with respect to the solid-state imaging device for forming a green colour image by one-half the pixel sampling period. With this spatial pixel shifting method, it becomes possible with an analogue output multiple CCD imaging device to realize high resolution exceeding the upper limit imposed by the number of pixels of the solid-state image sensors.
On the other hand, in a colour television camera device for digitally processing image pick-up output signals, digital signal processing is effected using a clock rate equal to approximately four times the colour sub-carrier frequency f_sc. In this case, the output bandwidth of composite video signals CS, produced on mixing luminance signals Y with modulated chrominance signals MOD.C, is limited to less than 2fs, for preventing the composite video signals from being affected by high harmonics of the colour sub-carrier frequency f_sc. In general, a clock rate equal to four times the colour sub-carrier frequency f_sc, is adopted in a colour television camera device of the NTSC system, while a clock rate fs equal to 908 or 944 times the horizontal scanning frequency f_H of the PAL system, is used in a colour television camera device of the PAL system.
Meanwhile, to improve television picture quality, attempts are being made to increase the bandwidth range of television signals. However, with a colour television camera device for digitally processing the image pick-up output signals from a solid state image sensor having a discrete pixel structure, such as CCDs, as described above, if the output bandwidth of the composite video signals is increased to more than 2fs, colour signal components may be suppressed unnecessarily, or distortion due to higher harmonics may be produced in the colour sub-carrier signals, thereby deteriorating the picture quality.
On the other hand, with a colour television device for digitally processing image output signals, as described above, where the clock rate fs is equal to 4f_sc in the NTSC system, or the clock rate fs is equal to 908f_H or 944f_H in the PAL system it is necessary to construct the digital signal processor differently, depending on the television system and hence the clock rate.
According to the present invention there is provided a colour television camera apparatus comprising:
image signal generating means for generating digital three-colour image signals at 2fs-rate (where fs≃4f_sc, and f_sc is the sampling clock rate);
luminance signal generating means for selectively generating a digital luminance signal at 2fs-rate for a plurality of video standard systems from the digital three-colour image signals;
chrominance signal generating means for selectively generating a digital chrominance signal at fs-rate for the plurality of video standard systems from the digital three-colour image signals;
modulating means for modulating said fs-rate digital chrominance signals;
rate converting means for converting modulated chrominance signals from said modulating means into 2fs-rate signals, said rate converting means including filter means having a plurality of transfer functions, said transfer function being selected according to the selected video standard system;
composite video signal generating means for generating a digital composite video signal at 2fs-rate according to the 2fs-rate digital luminance signal and the 2fs-rate modulated chrominance signal from the rate converting means; and
digital-to-analogue converting means for converting said 2fs-rate digital composite video signal into an analogue signal.
In an embodiment of the colour television camera apparatus according to the present invention, 2fs-rate digital luminance signals are selectively generated by luminance signal generating means from 2fs-rate digital three-colour image pick-up signals from image pick-up signal generating means in conformity with a plurality of standard systems. The fs-rate digital chrominance signals are selectively generated by chrominance signal generating means in conformity with different standard systems. The fs-rate modulated chrominance signals are generated from the fs-rate digital chrominance signals and are converted by rate converting means into 2fs-rate modulated chrominance signals. The 2fs-rate digital composite video signals are generated by composite video signal generating means from the 2fs-rate digital luminance signals and the 2fs-rate modulated chrominance signals, and are converted into corresponding analogue signals by digital/analogue converting means for outputting analogue composite video signals.
The rate converting means effects rate conversion of the digital chrominance signals generated by the chrominance signal generating means using transfer functions selected in conformity with the different standard systems for converting the fs-rate modulated chrominance signals from the modulating means into 2fs-rate modulated chrominance signals.
According to the present invention there is also provided a colour television signal generating method, said method comprising:
generating digital three-colour image signals at 2fs-rate (where fs≃4f_sc, and f_sc is the sampling clock rate);
selectively generating a digital luminance signal at 2fs-rate for a plurality of video standard systems from the digital three-colour image signals;
selectively generating a digital chrominance signal at fs-rate for the plurality of video standard systems from the digital three-colour image signals;
modulating said fs-rate digital chrominance signals;
converting the modulated chrominance signals into 2fs-rate signals by filtering the demodulated chrominance signal using selected transfer functions according to the selected video standard system;
generating digital composite video signal at 2fs-rate from the 2fs-rate digital luminance signal and the 2fs-rate modulated chrominance signal; and
converting said 2fs-rate digital composite video signal into an analogue signal.
The invention will now be described by way of example with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which:

Figure 1 is a block diagram of an embodiment of colour television camera apparatus according to the present invention;
Figure 2 is a schematic view of an array of CCD image sensors in the apparatus of Figure 1;
Figures 3A to 3J are graphs for illustrating the imaging operation of the apparatus of Figure 1 for the NTSC system;
Figures 4A to 4J are graphs for illustrating the imaging operation of the apparatus of Figure 1 for the PAL system;
Figures 4 and 6 are equivalent block diagrams showing low-pass filters in the apparatus of Figure 1;
Figure 7 is a block diagram showing an example of a first filter block forming the low-pass filter of Figure 6;
Figure 8 is an equivalent block diagram showing a digital filter in the apparatus of Figure 1; and
Figure 9 is a graph showing the signal spectrum of the video composite signals generated by a known colour television camera apparatus.

In the colour television apparatus shown in Figure 1, the present invention is applied to a three CCD chip type solid state imaging device in which imaging light L_i incident from an imaging lens 1 via an optical low-pass filter 2 is separated by a colour separating prism 3 into three colour light components for forming three colour images on three CCD image sensors 4R, 4G and 4B, and in which analogue composite video signals of the NTSC system or the PAL system may be selectively derived.
In the present embodiment, the three CCD image sensors 4R, 4G and 4B, making up an image pick-up of the apparatus, are arranged on the basis of the spatial pixel shifting system, so that the CCD image sensor 4R for red colour image sensing and the CCD image sensor 4B for blue colour image sensing are shifted by one half the spatial pixel sampling period τ_s with respect to the CCD image sensor 4G for green colour image sensing.
The three CCD image sensors 4R, 4G and 4B are driven by a CCD driving circuit, not shown, so that pixel image charges are read with read-out clocks of sampling frequencies fs as set in accordance with first to third operating modes which will be explained below.
In the first operating mode, which is that for an NTSC system image pick-up, the pixel image charges are read with read-out clocks of the sampling frequency fs equal to four times the colour subcarrier frequency f_sc of the NTSC system. In the second and third operating modes, which are those for a PAL system image pick-up, the pixel image charges are read with read-out clocks of the sampling frequency fs equal to 908 times the horizontal scanning frequency f_H of the PAL system, and with read-out clocks of the sampling frequency fs equal to 944 times the horizontal scanning frequency f_H of the PAL system, respectively.
The three colour object images are spatially sampled by the three CCD image sensors 4R, 4G and 4B, arranged in accordance with the above mentioned spatial pixel shifting system, such that the green colour image is spatially sampled with a spatial shift of τ_s/2 by the green colour image sensing CCD image sensor 4G with respect to the red colour image and the blue colour image spatially sampled by the red and blue colour image sensing CCD image sensors 4R and 4B. Thus the component of the sampling frequency fs of the green colour image pick-up output signal S_G* from the CCD image sensor 4G is reversely phased with respect to the component of the sampling frequency fs of the green colour image pick-up output signal S_R* from the CCD image sensor 4R and the component of the sampling frequency fs of the blue colour image pick-up output signal S_B* from the CCD image sensor 4B, as indicated in the signal spectrum charts of Figures 3A and 4A.
It is noted that Figure 3A shows signal spectra of the three colour image pick-up output signals S_R*, S_G* and S_B*, produced by the CCD image sensors 4R, 4G and 4B, respectively, when operating in the first mode, that is when performing image pick-up according to the NTSC system, while Figure 4A shows signal spectra of the three colour image pick-up output signals S_R*, S_G* and S_B* produced by the CCD image sensors 4R, 4G and 4B, respectively, when operating in the second or third mode, that is when performing image pick-up according to the PAL system.
The image pick-up output signals S_R*, S_G* and S_B*, read from the CCD image sensors 4R, 4G and 4B by read-out clocks of the sampling frequency fs, are supplied via buffer amplifiers 5R, 5G and 5B to analogue/ digital converters 6R, 6G and 6B, respectively.
Each of the A/ D converters 6R, 6G and 6B is supplied, by timing generators not shown, with clocks having a clock rate equal to the sampling rates fs of the image pick-up output signals S_R*, S_G* and S_B*, that is the clock frequencies fs equal to that of read-out clocks of the CCD image sensors 4R, 4G and 4B. The A/ D converters 6R, 6G and 6B directly digitize the image pick-up output signals S_R*, S_G* and S_B* at the clock rates fs for generating the digital colour signals D_R*, D_G* and D_B* having the same signal spectra as those of the image pickup output signals S_R*, S_G* and S_B* shown in Figures 3A and 4A.
The digital colour signals D_R*, D_G* and D_B*, produced by the A/ D converters 6R, 6G and 6B, are supplied to interpolators 7R, 7G and 7B, which interpolate the fs-rate image pick-up output signals S_R*, S_G* and S_B* to generate 2fs clock rate digital colour signal D_R**, D_G** and D_B**.
That is, in the present colour television camera device, image pick-up signal generating means for outputting the digital colour signals D_R**, D_G** and D_B** as 2fs-rate three colour digital image pick-up output signals having the frequency distribution as shown in Figures 3B or 4B is formed by an image pick-up made up of the three CCD image sensors 4R, 4G and 4B arranged in accordance with the spatial pixel shifting system, the A/ D converters 6R, 6G and 6B for digitizing the image pick-up output signals S_R*, S_G* and S_B* read from the CCD image sensors 4R, 4G and 4B at the sampling rate fs, and the interpolators 7R, 7G and 7B for interpolating the digital colour signals D_R*, D_G* and D_B* from the A/ D converters 6R, 6G and 6B for generating the 2fs-rate digital colour signals D_R**, D_G** and D_B**.
The three colour image pick-up output signals S_R*, S_G* and S_B* from the CCD image sensors 4R, 4G and 4B, arranged in accordance with the above mentioned spatial pixel shifting system, cannot be processed directly, because the green colour image pick-up output signal S_G* is π out of phase relative to the red and blue image pick-up output signals S_R* and R_B*. However, as a result of the above mentioned interpolating operation by the interpolators 7R, 7G and 7B for generating the digital colour signals D_R**, D_G** and D_B**, the three colour image pick-up output signals S_R*, S_GT* and S_B* are in-phase with one another, and hence may be digitally processed.
If a solid-state image sensor having a number of pixels large enough to assure high resolution without using the spatial pixel shifting system were used as the image pick-up of the image pick-up output signal generator, the 2fs-rate digital three colour image pickup output signals may be produced by the A/D converters without necessitating the interpolating operations.
The 2fs-rate digital colour signals D_R**, D_G** and D_B** from the interpolators 7R, 7G and 7B forming the image signal pick-up output generators are supplied to a matrix circuit 8.
The matrix circuit 8 generates 2fs-rate digital luminance signals D_Y** and fs-rate digital chrominance signals D_C1*, D_C2* by performing a matrix processing operation on the 2fs-rate digital colour signals D_R**, D_G** and D_B**. When forming the fs-rate digital chrominance signals D_CT*, D_C2* by the matrix circuit 8, the 2fs-rate digital colour signals D_R**, D_G** and D_B** are down-sampled by a prefilter having a zero point at least at the frequency fs for generating the fs rate digital chrominance signals D_C1*, D_C2*.
Meanwhile, the matrix operation to be performed by the matrix circuit 8 is changed over depending on the first to third operating modes. In the first operating mode, the matrix circuit 8 performs the processing operation in accordance with the NTSC system for generating the 2fs-rate digital luminance signals D_Y** and the fs rate digital chrominance signals D_C1*, D_C2*, as shown in Figure 3C. In the second and the third operating modes, the matrix circuit 8 performs the processing operation in accordance with the PAL system for generating the 2fs-rate digital luminance signals D_Y** and the fs-rate digital chrominance signals D_U1*, D_V2*, as shown in Figure 4C.
The matrix circuit 8 transmits the 2fs-rate digital luminance signal D_Y** via a delay circuit 9 to an addition circuit 14 while also outputting the 2fs-rate digital luminance signals D_Y** at an output terminal 21. The matrix circuit 8 also transmits the fs-rate digital chrominance signals D_C1(D_I*/D_V*), D_C2*(D_Q*/D_U*), generated by downsampling the 2fs-rate digital colour signals D_R**, D_G** and D_B**, to a modulating circuit 12 via low- pass filters 10 and 11.
The low-pass filter 10, supplied with the digital chrominance signals D_C1*, that is the digital chrominance signal D_I* of the first operating mode according to the NTSC system, or the digital chrominance signal D_V* of the second or third operating mode according to the PAL system, performs a filtering operation, represented by a transfer function H₁₀(z) given by: $H₁₀(z) = \frac{1}{2⁸} (z⁻²+2z⁻¹+1)²(z⁻⁴+2z⁻²+1) (-z⁻⁶+2z⁻⁴+2z⁻³+z⁻²-1)$
on the digital chrominance signals D_C1*, and is made up of first to fourth filter blocks 10A, 10B, 10C and 10D, as shown in the equivalent block diagram of Figure 5.
The first filter block 10A performs a filtering operation, represented by a transfer function H_10A (z) given by: $H_{10A} (z) = \frac{1}{2²} (-z⁻⁶+2z⁻⁴+2z⁻³+z⁻²-1)$
on the digital chrominance signal D_C1* (D_I*/D_V*) supplied from the matrix circuit 8. The first filter block 10A transmits output signals to the second filter block 10B.
The second filter block 10B performs a filtering operation, represented by a transfer function H_10B (z) given by: $H_{10B} (z) = \frac{1}{2²} (-z⁻⁴+2z⁻²+1)$
on output signals of the first filter block 10A. The second filter block 10B transmits output signals to the third filter block 10C.
The third filter block 10C performs a filtering operation, represented by a transfer function H_10C(z) given by: $H_{10C} (z) = \frac{1}{2²} (-z⁻²+2z⁻¹+1)$
on output signals of the second filter block 10B. The third filter block 10C transmits output signals to the fourth filter block 10D.
The fourth filter block 10D performs a filtering operation, represented by a transfer function H_10D(z) given by: $H_{10D} (z) = \frac{1}{2²} (-z⁻²+2z⁻¹+1)$
on output signals of the third block 10C. The fourth filter block 10D transmits output signals to the modulating circuit 12.
The low-pass filter 11, supplied with the digital chrominance signals D_C2*, that is the digital chrominance signal D_Q* of the first operating mode according to the NTSC system, or the digital chrominance signal D_U* of the second or third operating mode according to the PAL system, performs a filtering operation, represented by a transfer function H_11Q(z) given by: $H_{11Q} (z) = \frac{1}{2¹¹} (z⁻³+1) (z⁻¹+1) (3z⁻⁴+2z⁻²+3) (z⁻²+2z⁻¹+1)$
$(z⁻⁴+2z⁻²+1) (-z⁻³+2z⁻⁵+2z⁻⁴+z⁻³-1)$
on the digital chrominance signals D_Q* of the PAL system, and a filtering operation, represented by a transfer function H_11U (z) given by: $H_{11U} (z) = \frac{1}{2⁸} (z⁻²+2z⁻¹+1)²(z⁻⁴+2z⁻²+1) (-z⁻⁶+2z⁻⁴+2z⁻³+z⁻²-1)$
on the digital chrominance signals D_U* of the PAL system, and is made up of first to seventh filter blocks 11A, 11B, 11C, 11D, 11E, 11F and 11G, as shown in the equivalent block diagram of Figure 6.
The first filter block 11A performs filtering operations, represented by two difference transfer functions H_11AQ(z), H_11AU(z), which are changed over between the first operating mode and the second or third operating mode, on the digital chrominance signals D_C2* (D_Q*/D_U*) supplied from the matrix circuit 8. The first filter block 11A transmits output signals to the second filter block 11B.
That is, in the first operation mode, the first filter block 11A performs a filtering operation, represented by the transfer function H_11AQ(z), given by equation (8) below, on the digital chrominance signal D_C2* generated by the matrix circuit 8, that is the digital chrominance signals D_Q* of the NTSC system, and transmits output signals to the second filter block 11B. $H_{11AQ} (z) = \frac{1}{2²} (-z⁻⁸+2z⁻⁵+2z⁻⁴+z⁻³-1)$
On the other hand, in the second and third operation mode, the first filter block 11A performs a filtering operation, represented by the transfer function H_11AU(z), given by equation (9) below, on the digital chrominance signals D_C2* generated by the matrix circuit 8, that is the digital chrominance signals D_U* of the PAL system, and transmits output signals to the second filter block 11B. $H_{11AU} (z) = \frac{1}{2²} (-z⁻⁶+2z⁻⁴+2z⁻³+z⁻²-1)$
The second filter block 11B performs a filtering operation represented by a transfer function H_11B(z) given by: $H_{11B} (z) = \frac{1}{2²} (z⁻⁴+2z⁻²+1)$
on output signals of the first filter block 11A. The second filter block 11B transmits output signals to the third filter block 11C.
The third filter block 11C performs a filtering operation, represented by a transfer function H_11C(z) given by: $H_{11C} (z) = \frac{1}{2²} (z⁻²+2z⁻¹+1)$
on output signals of the second filter block 11B. The third filter block 11C transmits output signals to the fourth filter block 11D and to the fifth filter block 11E.
The fourth filter block 11D performs a filtering operation, represented by a transfer function H_10D(z) given by: $H_{11D} (z) = \frac{1}{2²} (z⁻²+2z⁻¹+1)$
on output signals of the third filter block 11C. In the second and third operating modes, the fourth filter block 11D transmits output signals to the modulating circuit 12.
In the first operating mode, the fifth filter block 11E performs a filtering operation, represented by a filtering operation represented by the transfer function H_11E(z) given by: $H_{11E} (z) = \frac{1}{2³} (3z⁻⁴+2z⁻²+3)$
on the output signals of the third filter block 11C, and transmits output signals to the sixth filter block 11F.
In the first operating mode, the sixth filter block 11F performs a filtering operation, represented by a filtering operation, represented by the transfer function H_11F(z) given by: $H_{11F} (z) = \frac{1}{2} (z⁻¹+1)$
on the output signals of the fifth filter block 11E, and transmits output signals to the seventh filter block 11G.
In the first operating mode, the seventh filter block 11G performs a filtering operation, represented by a filtering operation represented by the function H_11G(z) given by: $H_{11G} (z) = \frac{1}{2} (z⁻³+1)$
on the output signals of the sixth filter block 11F, and transmits output signals to the modulating circuit 12.
The first filter block 11A of the low-pass filter 11 is arranged as shown for example in Figure 7.
The first filter block 11A includes first to eighth tandem connected delay circuits 101 to 108, each for delaying input signals by one sampling period. The output signals of the first and second delay circuits 101 and 102 are selectively applied via a first switching circuit 111 to the third delay circuit 103, while the output signals of the sixth and seventh delay circuits 106 and 107 are selectively applied via a second switching circuit 112 to the eighth delay circuit 108.
The first filter block 11A includes first to fourth adders 121 to 124, and output signals of the third and fourth delay circuits 103 and 104 are summed by the first adder 121, while an output signal of the first adder 121 and an output signal of the fifth delay circuit 105 are summed together by the second adder 122. The input signal to the first delay circuit 101 and the output signal of the eighth delay circuit 108 are summed together by the third adder 123. The addition output signal of the third adder 122 is subtracted by the fourth adder 124 from a signal produced by multiplying the output signal of the second adder 122 by a coefficient "2" by a coefficient circuit 130, for supplying a predetermined filtered output.
By changing over the first switching circuit 111 for supplying output signals of the second delay circuit 102 to the third delay circuit 103 and by changing over the second switching circuit 112 for supplying output signals of the seventh delay circuit 107 to the eighth delay circuit 108, the filtering operation as shown by the transfer function H_11AQ(z) of equation (8) may be performed in the above described first operating mode by the above described first filter block 11A on the NTSC system digital chrominance signals D_Q* generated by the matrix circuit 8.
Also, changing over the first switching circuit 111 for supplying output signals of the first delay circuit 101 to the third delay circuit 103, and by changing over the second switching circuit 112 for supplying output signals of the sixth delay circuit 106 to the eight delay circuit 108, the filtering operation as shown by the transfer function H_11AU(z) shown by equation (9) may be performed in the above described second and third operating modes by the above described first filter block 11A on the PAL system digital chrominance signals D_U* generated by the matrix circuit 8.
The modulating circuit 12 effects quadrature two-phase modulation of the colour sub-carrier with the fs rate digital chrominance signals D_C1*(D_I*/D_V*), D_C2*(D_Q*/D_U*) of the signal spectra shown in Figures 3D or 4D, which are supplied thereto from the matrix circuit 8 via the low- pass filters 10 and 11.
The fs-rate modulation chrominance signals MOD.C_* obtained from the modulating circuit 11 correspond to modulated colour signals containing odd harmonics of the colour sub-carrier frequency f_sc of the NTSC system, and having the frequency distribution as shown in Figure 3E, in the first operating mode, while corresponding to the modulated colour signals containing signal components of a difference frequency fs-f_sc and a sum frequency fs+f_sc of the sampling frequency fs and the colour sub-carrier frequency f_sc of the PAL system and having the frequency distribution as shown in Figure 4E, in the second and third operating modes. The fs-rate modulated chrominance signals MOD.C_* produced by the modulating circuit 11 are supplied to the addition circuit 14 via a rate converter 13 to the addition circuit 14, while being outputted at a signal output terminal 23.
Meanwhile, since the fs-rate modulated chrominance signals MOD.C_*, produced by the modulating circuit 11, contain odd harmonics of the colour sub-carrier frequency f_sc of the NTSC system in the first operating mode, as mentioned hereinabove, the composite video signals would be affected by the 3f_sc frequency components. On the other hand, since the fs-rate modulated chrominance signals MOD.C_* contain signal components of the difference frequency fs-f_sc and the sum frequency fs+f_sc of the sampling frequency fs and the colour sub-carrier frequency f_sc of the PAL system, the composite video signals would be affected by the frequency component fs-f_sc.
In consideration of this, the rate converter 13 effects digital filtering on the fs-rate modulated chrominance signals MOD.C_*, produced by the modulating circuit 11, for extracting the f_sc and 7f_sc frequency components, by means of filter characteristics thereof shown in Figure 3F, in the first operating mode, for generating modulated chrominance signals MOD.C_** having a rate of 2fs corresponding to the 8f_sc frequency distribution as shown in Figure 3G, while extracting the f_sc and 2fs-f_sc frequency components by filter characteristics thereof shown in Figure 4F, in the second and third operating modes, for generating 2fs-rate modulated chrominance signals MOD.C_** having the frequency distribution as shown in Figure 3G.
Meanwhile, the rate converter 13 is formed by a digital filter transmitting the colour sub-carrier frequency f_sc and attenuating the frequency fs-f_sc component. It suffices if the digital filter used in the rate converter 13 has filter characteristics in which the differential coefficient is approximately zero at the frequency f_sc and there exists at lease one zero point in the vicinity of the frequency fs-f_sc.
In the first operating mode, the digital filter employed in the rate converter 13 effects digital filtering shown by a transfer function H_13A(z) as given for example by: $H_{13A} (z) = \frac{1}{2⁶} (-11z⁻⁶+33z⁻⁴+64z⁻³+33z⁻²-11)$
In the second operating mode, the digital filter employed in the rate converter 13 effects digital filtering given by a transfer function H_13B(z), for example: $H_{13B} (z) = \frac{1}{2³} (-3z⁻⁶+2z⁻⁴+8z⁻³+2z⁻²-3)$
In the third operating mode, the digital filter employed in the rate converter 13 effects digital filtering given by a transfer function H_13c(z), example; $H_{13c} (z) = \frac{1}{2⁵} (-9z⁻⁶+12z⁻⁴+32z⁻³+12z⁻²-9)$
As the rate converter 13 for effecting digital filtering operations depending on the various operating modes, a digital filter comprising first to eleventh delay circuits 201 to 211, first to eighth switching units 221 to 228, first to sixth adders 231 to 236 and first to eighth coefficient circuits 241 to 248, as shown in Figure 8, is employed.
In the digital filter shown in Figure 8, the first to eleventh delay circuits 201 to 211 delay input signals by one-half a sampling period. The second to fourth delay circuits 202 to 204 are connected in tandem to the first delay circuit 201 supplied with the modulated chrominance signals MOD.C_* from the modulating circuit 11.
The first switching unit 221 selectively transmits an output signal of the first delay circuit 201 or an output signal of the third delay circuit 203 to a first adder 231. The first switching unit 221 is changed over for transmitting the output signals of the third delay circuit 203 to the first adder 231 in the first operating mode, and for transmitting the output signals of the first delay circuit 201 to the first adder 231 in the second and third operating modes.
The first adder 231 sums the output signal of the second delay circuit 202 with the output signal of the first delay circuit 201 or with the output signal of the third delay circuit 203, as selected by the switching unit 221. The sum output signal by the first adder 231 is supplied to first to fifth coefficient circuits 241 to 245.
The first coefficient circuit 241 multiplies the output of the first adder 231 by a coefficient "1" and transmits an output signal to the second switching unit 222.
The second coefficient circuit 242 multiplies the output of the first adder 231 by a coefficient "4" and transmits an output signal to the second switching unit 222.
The third coefficient circuit 243 multiplies the output of the first adder 231 by a coefficient "32" and transmits an output signal to the third switching unit 223.
The fourth coefficient circuit 244 multiplies the output of the first adder 231 by a coefficient "8" and transmits an output signal to the third switching unit 223.
The fifth coefficient circuit 245 multiplies the output of the first adder 231 by a coefficient "2" and transmits an output signal to the fifth delay circuit 205.
The second switching unit 222 transmits an output signal of the first coefficient circuit 241 and an output signal of the second coefficient circuit 242 selectively to the second adder 232. The second switching unit is changed over for transmitting an output signal of the first coefficient circuit 241 to the second adder 232 in the first operating mode and for transmitting an output signal from the second coefficient circuit 242 to the second adder 232 in the third operating mode.
The third switching unit 223 transmits an output signal of the third coefficient circuit 243 and an output signal of the fourth coefficient circuit 244 selectively to the second adder 232. The third switching unit 223 is changed over for transmitting an output signal of the third coefficient circuit 243 to the second adder 232 in the first operating mode and for transmitting an output signal from the fourth coefficient circuit 244 to the second adder 232 in the third operating mode.
The second adder 232 sums a signal supplied via the second switching unit 222 and a signal supplied via the third switching unit 223. The second adder 232 transmits a sum output signal to the fourth switching unit 224 via the sixth delay circuit 206.
The fourth switching unit 224 transmits an output signal of the fifth delay circuit 205 and an output signal of the sixth delay circuit 206 selectively to the third adder 233. The fourth switching unit 244 is changed over for transmitting an output signal of the fifth delay circuit 205 to the third adder 233 in the second operating mode and for transmitting an output signal from the sixth delay circuit 206 to the third adder 233 in the first and third operating modes.
The fourth adder 234 sums the modulated chrominance signal MOD.C_* from the modulating circuit 12 and an output signal of the third delay circuit 203. A sum output signal of the fourth adder 234 is supplied to the sixth to eighth coefficient circuits 246 to 248.
The sixth coefficient circuit 246 multiplies the output of the fourth adder 234 by a coefficient "1" and transmits an output signal to the fifth adder 235.
The seventh coefficient circuit 247 multiplies the output of the fourth adder 234 by a coefficient "2" and transmits an output signal to the fifth adder 235, while transmitting the same output signal to the sixth adder 236 via the seventh delay circuit 207.
The eighth coefficient circuit 248 multiplies the output of the fourth adder 234 by a coefficient "8" and transmits an output signal to the fifth adder 235.
The fifth switching unit 225 transmits an output signal of the seventh coefficient circuit 247 and an output signal of the eighth coefficient circuit 248 selectively to the fifth adder 235. The fifth switching unit 225 is changed over for transmitting an output signal of the seventh coefficient circuit 247 to the fifth adder 235 in the second operating mode, and for transmitting an output signal from the eighth coefficient circuit 248 to the fifth adder 225 in the first and third operating modes.
The fifth adder 235 sums an output signal of the sixth coefficient circuit 246 and an output signal supplied from the fifth switching unit 225. An output from the fifth adder 235 is transmitted via the eighth delay circuit 208 to the sixth switching unit 236 and to the sixth switching unit 226.
The sixth adder 236 sums an output signal of the seventh delay circuit 207 and an output signal supplied from the eighth delay unit 208. An output from the sixth adder 236 is transmitted via the ninth delay circuit 209 to the sixth switching unit 226.
The sixth switching unit 226 transmits an output signal of the eighth delay circuit 208 and an output signal of the ninth delay circuit 209 selectively to the third adder 233. The sixth switching unit 226 is changed over from transmitting an output signal of the ninth delay circuit 209 to the third adder 233 in the first operating mode and for transmitting an output signal from the eighth delay circuit 208 to the third adder 233 in the second and third operating modes.
The seventh switching unit 227 transmits an output signal of the third delay circuit 203 and an output signal of the fourth delay circuit 204 selectively to the eighth switching unit 228. The seventh switching unit 227 is changed over for transmitting an output signal of the fourth delay circuit 204 to the eighth switching unit 228 in the first operating mode, and for transmitting an output signal from the third delay circuit 203 to the eighth switching unit 228 in the second and third operating modes.
The third adder 233 sums an output signal of the fourth switching unit 224 and an output signal supplied from the sixth switching unit 226. An output from the third adder 223 is transmitted via the tenth delay circuit 210 to the eighth switching unit 238.
The eighth switching unit 228 selectively outputs a signal supplied from the seventh switching unit 227 or an output from the third adder 233 via the eleventh delay circuit 211.
With the above described digital filter, the first to sixth switching units 231 to 236 are changed over depending on the various operating modes, so that digital filtering operations given by the transfer functions H_13A(z) as indicated by equation (16), H_13B(z) as indicated by equation (17), and H_13c(z) as indicated by equation (18) will be effected in the first, second and third operating modes, respectively.
The rate converter 13 effects digital filtering on the fs rate modulated chrominance signals MOD. C_*, produced by the modulating circuit 11, for producing 2fs-rate modulated chrominance signals MOD.C_** in the first to third operating modes, which signals MOD.C_** are transmitted to the addition circuit 14.
The addition circuit 14 sums the 2fs-rate modulated chrominance signals MOD.C_**, produced by the rate converter 13, with the 2fs-rate digital luminance signals D_Y** transmitted from the matrix circuit 8 via the delay circuit 9, for generating 2fs-rate digital composite video signals D_CS** having the frequency distribution shown in Figures 3H or 4H. These 2fs-rate digital composite video signals D_CS** are supplied to a digital/analogue (D/A) converter 15.
Meanwhile, the delay circuit 9 delays the digital luminance signals D_Y** by a delay time corresponding to a processing time required for generating the 2fs-rate modulated chrominance signals MOD.C_** from the digital chrominance signals D_C1*, D_C2* from the matrix circuit 8.
The D/A converter 15 converts the 2fs-rate digital composite video signals D_CS** into corresponding analogue signals which are supplied to a post-filter 16 having low-pass filter characteristics of transmitting low components less than approximately 4fs_sc or fs, as shown in Figure 3I or Figure 4I. In this manner, analogue composite video signals CS conforming to the NTSC system or to the PAL system are selectively outputted at the signal output terminal 23.
Since the analogue composite video signals CS, from the signal output terminal 23, have been converted from the 2fs-rate digital composite video signals D_CS**, the bandwidth of the luminance signals Y is enlarged to the sampling rate fs, as shown in Figure 3J or Figure 4J, for generating a high resolution picture.
Since the 2fs-rate modulated chrominance signals MOD.C_**, produced by the rate converter 13, are generated by interpolation by a digital filter transmitting the colour sub-carrier frequency component f_sc and attenuating the fs-f_sc frequency component, so that they are free from the 3f_sc frequency component, as shown in Figure 3G, when performing an imaging operation in the first operating mode in accordance with the NTSC system. The result is that the analogue composite video signals CS, converted into the analogue signals from the 2fs-rate digital composite video signals D_CS** produced by summing the 2fs-rate modulated chrominance signals MOD.C_** to the 2fs-rate digital luminance signals D_y**, are not accompanied by distortion due to high harmonics contained in the colour sub-carrier signals.
On the other hand, when performing an imaging operation in the second or third operating mode in accordance with the PAL system, it becomes possible, by converting the 2fs-rate digital composite video signals D_CS** into corresponding analogue signals by digital/analogue converting means, and by bandwidth-limiting the analogue signals by the low-pass post-filter transmitting the low range components lower than fs, as shown in Figure 41, to produce the analogue composite video signals CS of the PAL system which are free from aliasing components as shown in Figure 4J, and in which the bandwidth of the luminance signals has been enlarged up to fs to give a high resolution picture.
In the colour television camera device of the present invention, the 2fs-rate digital luminance signals are selectively formed by luminance signal generating means, in conformity with a plurality of standard systems, from the 2fs-rate digital three colour image pick-up signals, generated from imaging signal generating means, while fs-rate digital chrominance signals are selectively formed by chrominance signal generating means, in conformity with a plurality of standard systems, and these fs-rate digital chrominance signals are converted by rate converting means into 2fs-rate modulated chrominance signals. The 2fs-rate digital composite video signals are formed by composite video signal forming means from the 2fs-rate digital luminance signals and 2fs-rate modulated chrominance signals, and are converted by digital analogue converting means into analogue signals for selectively outputting analogue composite video signals in conformity with a plurality of standard systems. The rate converting means effects rate conversion of the digital chrominance signals generated by the chrominance signal forming means using a plurality of transfer functions selected in conformity with the different standard systems for converting the fs-rate modulated chrominance signals from the modulating means into 2fs-rate modulated chrominance signals. The 2fs-rate digital composite video signals, generated from the 2fs-rate digital luminance signals and the 2fs-rate modulated video signals, are converted into the analogue form by digital analogue converting means, for generating analogue composite video signals which are free from distortion due to high harmonics of the colour sub-carrier signals, and in which the bandwidth of the luminance signals has been enhanced to fs to give a high resolution picture.
It will be seen from above that the present invention provides a colour television camera device for digitally processing an imaging output from a solid state sensor having a discrete pixel structure, such as CCDs, in which a plurality of high resolution composite video signals free from excessive suppression of colour signal components or distortion due to high harmonic components of the colour sub-carrier signal may be produced in conformity with different standard systems.

Claims

A colour television camera apparatus comprising: image signal generating means (6, 7) for generating digital three-colour image signals at 2fs-rate (where fs≃4f_sc, and f_sc is the sampling clock rate);
luminance signal generating means (8) for selectively generating a digital luminance signal at 2fs-rate for a plurality of video standard systems from the digital three-colour image signals;
chrominance signal generating means (8) for selectively generating a digital chrominance signal at fs-rate for the plurality of video standard systems from the digital three-colour image signals;
modulating means (12) for modulating said fs-rate digital chrominance signals;
rate converting means (13) for converting modulated chrominance signals from said modulating means (12) into 2fs-rate signals, said rate converting means (13) including filter means having a plurality of transfer functions, said transfer function being selected according to the selected video standard system;
composite video signal generating means (14) for generating a digital composite video signal at 2fs-rate according to the 2fs-rate digital luminance signal and the 2fs-rate modulated chrominance signal from the rate converting means; and
digital-to-analogue converting means (15) for converting said 2fs-rate digital composite video signal into an analogue signal.
A colour television camera apparatus according to claim 1 wherein said image signal generating means (6, 7) comprises three CCD image sensors (4), analogue-to-digital converting means (6) for converting output signals from said three CCD image sensors (4) into digital image signals, and interpolating means (7) for generating the digital three-colour image signal at 2fs-rate by interpolating the digital image signals from said analogue-to-digital converting means.
A colour television camera apparatus according to claim 1 wherein said plurality of video standard systems are the NTSC system and the PAL system.
A colour television camera apparatus according to claim 1 further comprising an output terminal (21) for outputting the 2fs-rate luminance signal.
A colour television camera apparatus according to claim 3 wherein said PAL system comprises a first PAL system having a 908f_H (where f_H is the horizontal scanning frequency) clock rate, and a second PAL system having a 944f_H clock rate.
A colour television camera apparatus according to claim 1 wherein said chrominance signal generating means (8) has down-sampling means having a filter having a zero point at least at the frequency fs, for generating the fs rate digital chrominance signals.
A colour television camera apparatus according to claim 3 further comprising first low-pass filter means (10) connected to a first chrominance output terminal of the chrominance signal generating means (8) for filtering an output signal from the first chrominance output terminal, said first low-pass filter means (10) having a transfer function given by: $H₁₀(z) = \frac{1}{2⁸} (z⁻²+2z⁻¹+1)²(z⁻⁴+2z⁻²+1) (-z⁻⁶+2z⁻⁴+2z⁻³+z⁻²-1)$
second low-pass filter means (11) connected to a second chrominance output terminal of the chrominance signal generating means (8) for filtering an output signal from the second chrominance output terminal, said second low-pass filter means (11) having a transfer given by: $H_{11Q} (z) = \frac{1}{2¹¹} (z⁻³+1) (z⁻¹+1) (3z⁻⁴+2z⁻²+3) (z⁻²+2z⁻¹+1) (z⁻⁴+2z⁻²+1) (-z⁻⁸+2z⁻⁵+2z⁻⁴+z⁻³-1)$
and $H_{11U} (z) = \frac{1}{2⁸} (z⁻²+2z⁻¹+1)²(z⁻⁴+2z⁻²+1) (-z⁻⁶+2z⁻⁴+2z⁻³+z⁻²-1)$
said transfer function H_11Q(z) is selected when the NTSC mode is selected, said transfer function H_11U(z) is selected when the PAL mode is selected, and the output signal of the first and second low-pass filter means (10, 11) is supplied to the modulating means (12).
A colour television camera apparatus according to claim 5 wherein said plurality of transfer functions are: $H_{13A} (z) = \frac{1}{2⁶} (-11z⁻⁶+33z⁻⁴+64z⁻³+33z⁻²-11)$
$H_{13B} (z) = \frac{1}{2³} (-3z⁻⁶+2z⁻⁴+8z⁻³+2z⁻²-3)$
and $H_{13C} (z) = \frac{1}{2⁵} (-9z⁻⁶+12z⁻⁴+32z⁻³+12z⁻²-9),$
said transfer function H_13A(z) is selected when the NTSC mode is selected, said transfer function H_13B(z) is selected when the first PAL mode is selected, said transfer function H_13C(z) is selected when the second PAL mode is selected.
A colour television signal generating method, said method comprising:
generating digital three-colour image signals at 2fs-rate (where fs≃4f_sc, and f_sc is the sampling clock rate);
selectively generating a digital luminance signal at 2fs-rate for a plurality of video standard systems from the digital three-colour image signals;
selectively generating a digital chrominance signal at fs-rate for the plurality of video standard systems from the digital three-colour image signals;
modulating said fs-rate digital chrominance signals;
converting the modulated chrominance signals into 2fs-rate signals by filtering the demodulated chrominance signal using selected transfer functions according to the selected video standard system;
generating digital composite video signal at 2fs-rate from the 2fs-rate digital luminance signal and the 2fs-rate modulated chrominance signal; and
converting said 2fs-rate digital composite video signal into an analogue signal.
A colour television signal generating method according to claim 9 wherein said plurality of video standard systems are the NTSC system and the PAL system.